pinctrl-wmt.c 15 KB

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  1. /*
  2. * Pinctrl driver for the Wondermedia SoC's
  3. *
  4. * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. */
  15. #include <linux/err.h>
  16. #include <linux/gpio/driver.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/irq.h>
  20. #include <linux/module.h>
  21. #include <linux/of.h>
  22. #include <linux/of_irq.h>
  23. #include <linux/pinctrl/consumer.h>
  24. #include <linux/pinctrl/machine.h>
  25. #include <linux/pinctrl/pinconf.h>
  26. #include <linux/pinctrl/pinconf-generic.h>
  27. #include <linux/pinctrl/pinctrl.h>
  28. #include <linux/pinctrl/pinmux.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/slab.h>
  31. #include "pinctrl-wmt.h"
  32. static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg,
  33. u32 mask)
  34. {
  35. u32 val;
  36. val = readl_relaxed(data->base + reg);
  37. val |= mask;
  38. writel_relaxed(val, data->base + reg);
  39. }
  40. static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg,
  41. u32 mask)
  42. {
  43. u32 val;
  44. val = readl_relaxed(data->base + reg);
  45. val &= ~mask;
  46. writel_relaxed(val, data->base + reg);
  47. }
  48. enum wmt_func_sel {
  49. WMT_FSEL_GPIO_IN = 0,
  50. WMT_FSEL_GPIO_OUT = 1,
  51. WMT_FSEL_ALT = 2,
  52. WMT_FSEL_COUNT = 3,
  53. };
  54. static const char * const wmt_functions[WMT_FSEL_COUNT] = {
  55. [WMT_FSEL_GPIO_IN] = "gpio_in",
  56. [WMT_FSEL_GPIO_OUT] = "gpio_out",
  57. [WMT_FSEL_ALT] = "alt",
  58. };
  59. static int wmt_pmx_get_functions_count(struct pinctrl_dev *pctldev)
  60. {
  61. return WMT_FSEL_COUNT;
  62. }
  63. static const char *wmt_pmx_get_function_name(struct pinctrl_dev *pctldev,
  64. unsigned selector)
  65. {
  66. return wmt_functions[selector];
  67. }
  68. static int wmt_pmx_get_function_groups(struct pinctrl_dev *pctldev,
  69. unsigned selector,
  70. const char * const **groups,
  71. unsigned * const num_groups)
  72. {
  73. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  74. /* every pin does every function */
  75. *groups = data->groups;
  76. *num_groups = data->ngroups;
  77. return 0;
  78. }
  79. static int wmt_set_pinmux(struct wmt_pinctrl_data *data, unsigned func,
  80. unsigned pin)
  81. {
  82. u32 bank = WMT_BANK_FROM_PIN(pin);
  83. u32 bit = WMT_BIT_FROM_PIN(pin);
  84. u32 reg_en = data->banks[bank].reg_en;
  85. u32 reg_dir = data->banks[bank].reg_dir;
  86. if (reg_dir == NO_REG) {
  87. dev_err(data->dev, "pin:%d no direction register defined\n",
  88. pin);
  89. return -EINVAL;
  90. }
  91. /*
  92. * If reg_en == NO_REG, we assume it is a dedicated GPIO and cannot be
  93. * disabled (as on VT8500) and that no alternate function is available.
  94. */
  95. switch (func) {
  96. case WMT_FSEL_GPIO_IN:
  97. if (reg_en != NO_REG)
  98. wmt_setbits(data, reg_en, BIT(bit));
  99. wmt_clearbits(data, reg_dir, BIT(bit));
  100. break;
  101. case WMT_FSEL_GPIO_OUT:
  102. if (reg_en != NO_REG)
  103. wmt_setbits(data, reg_en, BIT(bit));
  104. wmt_setbits(data, reg_dir, BIT(bit));
  105. break;
  106. case WMT_FSEL_ALT:
  107. if (reg_en == NO_REG) {
  108. dev_err(data->dev, "pin:%d no alt function available\n",
  109. pin);
  110. return -EINVAL;
  111. }
  112. wmt_clearbits(data, reg_en, BIT(bit));
  113. }
  114. return 0;
  115. }
  116. static int wmt_pmx_set_mux(struct pinctrl_dev *pctldev,
  117. unsigned func_selector,
  118. unsigned group_selector)
  119. {
  120. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  121. u32 pinnum = data->pins[group_selector].number;
  122. return wmt_set_pinmux(data, func_selector, pinnum);
  123. }
  124. static void wmt_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
  125. struct pinctrl_gpio_range *range,
  126. unsigned offset)
  127. {
  128. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  129. /* disable by setting GPIO_IN */
  130. wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, offset);
  131. }
  132. static int wmt_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
  133. struct pinctrl_gpio_range *range,
  134. unsigned offset,
  135. bool input)
  136. {
  137. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  138. wmt_set_pinmux(data, (input ? WMT_FSEL_GPIO_IN : WMT_FSEL_GPIO_OUT),
  139. offset);
  140. return 0;
  141. }
  142. static struct pinmux_ops wmt_pinmux_ops = {
  143. .get_functions_count = wmt_pmx_get_functions_count,
  144. .get_function_name = wmt_pmx_get_function_name,
  145. .get_function_groups = wmt_pmx_get_function_groups,
  146. .set_mux = wmt_pmx_set_mux,
  147. .gpio_disable_free = wmt_pmx_gpio_disable_free,
  148. .gpio_set_direction = wmt_pmx_gpio_set_direction,
  149. };
  150. static int wmt_get_groups_count(struct pinctrl_dev *pctldev)
  151. {
  152. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  153. return data->ngroups;
  154. }
  155. static const char *wmt_get_group_name(struct pinctrl_dev *pctldev,
  156. unsigned selector)
  157. {
  158. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  159. return data->groups[selector];
  160. }
  161. static int wmt_get_group_pins(struct pinctrl_dev *pctldev,
  162. unsigned selector,
  163. const unsigned **pins,
  164. unsigned *num_pins)
  165. {
  166. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  167. *pins = &data->pins[selector].number;
  168. *num_pins = 1;
  169. return 0;
  170. }
  171. static int wmt_pctl_find_group_by_pin(struct wmt_pinctrl_data *data, u32 pin)
  172. {
  173. int i;
  174. for (i = 0; i < data->npins; i++) {
  175. if (data->pins[i].number == pin)
  176. return i;
  177. }
  178. return -EINVAL;
  179. }
  180. static int wmt_pctl_dt_node_to_map_func(struct wmt_pinctrl_data *data,
  181. struct device_node *np,
  182. u32 pin, u32 fnum,
  183. struct pinctrl_map **maps)
  184. {
  185. int group;
  186. struct pinctrl_map *map = *maps;
  187. if (fnum >= ARRAY_SIZE(wmt_functions)) {
  188. dev_err(data->dev, "invalid wm,function %d\n", fnum);
  189. return -EINVAL;
  190. }
  191. group = wmt_pctl_find_group_by_pin(data, pin);
  192. if (group < 0) {
  193. dev_err(data->dev, "unable to match pin %d to group\n", pin);
  194. return group;
  195. }
  196. map->type = PIN_MAP_TYPE_MUX_GROUP;
  197. map->data.mux.group = data->groups[group];
  198. map->data.mux.function = wmt_functions[fnum];
  199. (*maps)++;
  200. return 0;
  201. }
  202. static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
  203. struct device_node *np,
  204. u32 pin, u32 pull,
  205. struct pinctrl_map **maps)
  206. {
  207. int group;
  208. unsigned long *configs;
  209. struct pinctrl_map *map = *maps;
  210. if (pull > 2) {
  211. dev_err(data->dev, "invalid wm,pull %d\n", pull);
  212. return -EINVAL;
  213. }
  214. group = wmt_pctl_find_group_by_pin(data, pin);
  215. if (group < 0) {
  216. dev_err(data->dev, "unable to match pin %d to group\n", pin);
  217. return group;
  218. }
  219. configs = kzalloc(sizeof(*configs), GFP_KERNEL);
  220. if (!configs)
  221. return -ENOMEM;
  222. switch (pull) {
  223. case 0:
  224. configs[0] = PIN_CONFIG_BIAS_DISABLE;
  225. break;
  226. case 1:
  227. configs[0] = PIN_CONFIG_BIAS_PULL_DOWN;
  228. break;
  229. case 2:
  230. configs[0] = PIN_CONFIG_BIAS_PULL_UP;
  231. break;
  232. default:
  233. configs[0] = PIN_CONFIG_BIAS_DISABLE;
  234. dev_err(data->dev, "invalid pull state %d - disabling\n", pull);
  235. }
  236. map->type = PIN_MAP_TYPE_CONFIGS_PIN;
  237. map->data.configs.group_or_pin = data->groups[group];
  238. map->data.configs.configs = configs;
  239. map->data.configs.num_configs = 1;
  240. (*maps)++;
  241. return 0;
  242. }
  243. static void wmt_pctl_dt_free_map(struct pinctrl_dev *pctldev,
  244. struct pinctrl_map *maps,
  245. unsigned num_maps)
  246. {
  247. int i;
  248. for (i = 0; i < num_maps; i++)
  249. if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
  250. kfree(maps[i].data.configs.configs);
  251. kfree(maps);
  252. }
  253. static int wmt_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
  254. struct device_node *np,
  255. struct pinctrl_map **map,
  256. unsigned *num_maps)
  257. {
  258. struct pinctrl_map *maps, *cur_map;
  259. struct property *pins, *funcs, *pulls;
  260. u32 pin, func, pull;
  261. int num_pins, num_funcs, num_pulls, maps_per_pin;
  262. int i, err;
  263. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  264. pins = of_find_property(np, "wm,pins", NULL);
  265. if (!pins) {
  266. dev_err(data->dev, "missing wmt,pins property\n");
  267. return -EINVAL;
  268. }
  269. funcs = of_find_property(np, "wm,function", NULL);
  270. pulls = of_find_property(np, "wm,pull", NULL);
  271. if (!funcs && !pulls) {
  272. dev_err(data->dev, "neither wm,function nor wm,pull specified\n");
  273. return -EINVAL;
  274. }
  275. /*
  276. * The following lines calculate how many values are defined for each
  277. * of the properties.
  278. */
  279. num_pins = pins->length / sizeof(u32);
  280. num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0;
  281. num_pulls = pulls ? (pulls->length / sizeof(u32)) : 0;
  282. if (num_funcs > 1 && num_funcs != num_pins) {
  283. dev_err(data->dev, "wm,function must have 1 or %d entries\n",
  284. num_pins);
  285. return -EINVAL;
  286. }
  287. if (num_pulls > 1 && num_pulls != num_pins) {
  288. dev_err(data->dev, "wm,pull must have 1 or %d entries\n",
  289. num_pins);
  290. return -EINVAL;
  291. }
  292. maps_per_pin = 0;
  293. if (num_funcs)
  294. maps_per_pin++;
  295. if (num_pulls)
  296. maps_per_pin++;
  297. cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps),
  298. GFP_KERNEL);
  299. if (!maps)
  300. return -ENOMEM;
  301. for (i = 0; i < num_pins; i++) {
  302. err = of_property_read_u32_index(np, "wm,pins", i, &pin);
  303. if (err)
  304. goto fail;
  305. if (pin >= (data->nbanks * 32)) {
  306. dev_err(data->dev, "invalid wm,pins value\n");
  307. err = -EINVAL;
  308. goto fail;
  309. }
  310. if (num_funcs) {
  311. err = of_property_read_u32_index(np, "wm,function",
  312. (num_funcs > 1 ? i : 0), &func);
  313. if (err)
  314. goto fail;
  315. err = wmt_pctl_dt_node_to_map_func(data, np, pin, func,
  316. &cur_map);
  317. if (err)
  318. goto fail;
  319. }
  320. if (num_pulls) {
  321. err = of_property_read_u32_index(np, "wm,pull",
  322. (num_pulls > 1 ? i : 0), &pull);
  323. if (err)
  324. goto fail;
  325. err = wmt_pctl_dt_node_to_map_pull(data, np, pin, pull,
  326. &cur_map);
  327. if (err)
  328. goto fail;
  329. }
  330. }
  331. *map = maps;
  332. *num_maps = num_pins * maps_per_pin;
  333. return 0;
  334. /*
  335. * The fail path removes any maps that have been allocated. The fail path is
  336. * only called from code after maps has been kzalloc'd. It is also safe to
  337. * pass 'num_pins * maps_per_pin' as the map count even though we probably
  338. * failed before all the mappings were read as all maps are allocated at once,
  339. * and configs are only allocated for .type = PIN_MAP_TYPE_CONFIGS_PIN - there
  340. * is no failpath where a config can be allocated without .type being set.
  341. */
  342. fail:
  343. wmt_pctl_dt_free_map(pctldev, maps, num_pins * maps_per_pin);
  344. return err;
  345. }
  346. static struct pinctrl_ops wmt_pctl_ops = {
  347. .get_groups_count = wmt_get_groups_count,
  348. .get_group_name = wmt_get_group_name,
  349. .get_group_pins = wmt_get_group_pins,
  350. .dt_node_to_map = wmt_pctl_dt_node_to_map,
  351. .dt_free_map = wmt_pctl_dt_free_map,
  352. };
  353. static int wmt_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
  354. unsigned long *config)
  355. {
  356. return -ENOTSUPP;
  357. }
  358. static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
  359. unsigned long *configs, unsigned num_configs)
  360. {
  361. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  362. enum pin_config_param param;
  363. u16 arg;
  364. u32 bank = WMT_BANK_FROM_PIN(pin);
  365. u32 bit = WMT_BIT_FROM_PIN(pin);
  366. u32 reg_pull_en = data->banks[bank].reg_pull_en;
  367. u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg;
  368. int i;
  369. if ((reg_pull_en == NO_REG) || (reg_pull_cfg == NO_REG)) {
  370. dev_err(data->dev, "bias functions not supported on pin %d\n",
  371. pin);
  372. return -EINVAL;
  373. }
  374. for (i = 0; i < num_configs; i++) {
  375. param = pinconf_to_config_param(configs[i]);
  376. arg = pinconf_to_config_argument(configs[i]);
  377. if ((param == PIN_CONFIG_BIAS_PULL_DOWN) ||
  378. (param == PIN_CONFIG_BIAS_PULL_UP)) {
  379. if (arg == 0)
  380. param = PIN_CONFIG_BIAS_DISABLE;
  381. }
  382. switch (param) {
  383. case PIN_CONFIG_BIAS_DISABLE:
  384. wmt_clearbits(data, reg_pull_en, BIT(bit));
  385. break;
  386. case PIN_CONFIG_BIAS_PULL_DOWN:
  387. wmt_clearbits(data, reg_pull_cfg, BIT(bit));
  388. wmt_setbits(data, reg_pull_en, BIT(bit));
  389. break;
  390. case PIN_CONFIG_BIAS_PULL_UP:
  391. wmt_setbits(data, reg_pull_cfg, BIT(bit));
  392. wmt_setbits(data, reg_pull_en, BIT(bit));
  393. break;
  394. default:
  395. dev_err(data->dev, "unknown pinconf param\n");
  396. return -EINVAL;
  397. }
  398. } /* for each config */
  399. return 0;
  400. }
  401. static struct pinconf_ops wmt_pinconf_ops = {
  402. .pin_config_get = wmt_pinconf_get,
  403. .pin_config_set = wmt_pinconf_set,
  404. };
  405. static struct pinctrl_desc wmt_desc = {
  406. .owner = THIS_MODULE,
  407. .name = "pinctrl-wmt",
  408. .pctlops = &wmt_pctl_ops,
  409. .pmxops = &wmt_pinmux_ops,
  410. .confops = &wmt_pinconf_ops,
  411. };
  412. static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
  413. {
  414. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  415. u32 bank = WMT_BANK_FROM_PIN(offset);
  416. u32 bit = WMT_BIT_FROM_PIN(offset);
  417. u32 reg_dir = data->banks[bank].reg_dir;
  418. u32 val;
  419. val = readl_relaxed(data->base + reg_dir);
  420. if (val & BIT(bit))
  421. return GPIOF_DIR_OUT;
  422. else
  423. return GPIOF_DIR_IN;
  424. }
  425. static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)
  426. {
  427. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  428. u32 bank = WMT_BANK_FROM_PIN(offset);
  429. u32 bit = WMT_BIT_FROM_PIN(offset);
  430. u32 reg_data_in = data->banks[bank].reg_data_in;
  431. if (reg_data_in == NO_REG) {
  432. dev_err(data->dev, "no data in register defined\n");
  433. return -EINVAL;
  434. }
  435. return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit));
  436. }
  437. static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset,
  438. int val)
  439. {
  440. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  441. u32 bank = WMT_BANK_FROM_PIN(offset);
  442. u32 bit = WMT_BIT_FROM_PIN(offset);
  443. u32 reg_data_out = data->banks[bank].reg_data_out;
  444. if (reg_data_out == NO_REG) {
  445. dev_err(data->dev, "no data out register defined\n");
  446. return;
  447. }
  448. if (val)
  449. wmt_setbits(data, reg_data_out, BIT(bit));
  450. else
  451. wmt_clearbits(data, reg_data_out, BIT(bit));
  452. }
  453. static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  454. {
  455. return pinctrl_gpio_direction_input(chip->base + offset);
  456. }
  457. static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
  458. int value)
  459. {
  460. wmt_gpio_set_value(chip, offset, value);
  461. return pinctrl_gpio_direction_output(chip->base + offset);
  462. }
  463. static struct gpio_chip wmt_gpio_chip = {
  464. .label = "gpio-wmt",
  465. .owner = THIS_MODULE,
  466. .request = gpiochip_generic_request,
  467. .free = gpiochip_generic_free,
  468. .get_direction = wmt_gpio_get_direction,
  469. .direction_input = wmt_gpio_direction_input,
  470. .direction_output = wmt_gpio_direction_output,
  471. .get = wmt_gpio_get_value,
  472. .set = wmt_gpio_set_value,
  473. .can_sleep = false,
  474. };
  475. int wmt_pinctrl_probe(struct platform_device *pdev,
  476. struct wmt_pinctrl_data *data)
  477. {
  478. int err;
  479. struct resource *res;
  480. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  481. data->base = devm_ioremap_resource(&pdev->dev, res);
  482. if (IS_ERR(data->base))
  483. return PTR_ERR(data->base);
  484. wmt_desc.pins = data->pins;
  485. wmt_desc.npins = data->npins;
  486. data->gpio_chip = wmt_gpio_chip;
  487. data->gpio_chip.parent = &pdev->dev;
  488. data->gpio_chip.of_node = pdev->dev.of_node;
  489. data->gpio_chip.ngpio = data->nbanks * 32;
  490. platform_set_drvdata(pdev, data);
  491. data->dev = &pdev->dev;
  492. data->pctl_dev = devm_pinctrl_register(&pdev->dev, &wmt_desc, data);
  493. if (IS_ERR(data->pctl_dev)) {
  494. dev_err(&pdev->dev, "Failed to register pinctrl\n");
  495. return PTR_ERR(data->pctl_dev);
  496. }
  497. err = gpiochip_add_data(&data->gpio_chip, data);
  498. if (err) {
  499. dev_err(&pdev->dev, "could not add GPIO chip\n");
  500. return err;
  501. }
  502. err = gpiochip_add_pin_range(&data->gpio_chip, dev_name(data->dev),
  503. 0, 0, data->nbanks * 32);
  504. if (err)
  505. goto fail_range;
  506. dev_info(&pdev->dev, "Pin controller initialized\n");
  507. return 0;
  508. fail_range:
  509. gpiochip_remove(&data->gpio_chip);
  510. return err;
  511. }
  512. int wmt_pinctrl_remove(struct platform_device *pdev)
  513. {
  514. struct wmt_pinctrl_data *data = platform_get_drvdata(pdev);
  515. gpiochip_remove(&data->gpio_chip);
  516. return 0;
  517. }