pme.c 12 KB

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  1. /*
  2. * PCIe Native PME support
  3. *
  4. * Copyright (C) 2007 - 2009 Intel Corp
  5. * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
  6. * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License V2. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/pci.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/slab.h>
  16. #include <linux/init.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/device.h>
  19. #include <linux/pcieport_if.h>
  20. #include <linux/pm_runtime.h>
  21. #include "../pci.h"
  22. #include "portdrv.h"
  23. /*
  24. * If this switch is set, MSI will not be used for PCIe PME signaling. This
  25. * causes the PCIe port driver to use INTx interrupts only, but it turns out
  26. * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
  27. * wake-up from system sleep states.
  28. */
  29. bool pcie_pme_msi_disabled;
  30. static int __init pcie_pme_setup(char *str)
  31. {
  32. if (!strncmp(str, "nomsi", 5))
  33. pcie_pme_msi_disabled = true;
  34. return 1;
  35. }
  36. __setup("pcie_pme=", pcie_pme_setup);
  37. enum pme_suspend_level {
  38. PME_SUSPEND_NONE = 0,
  39. PME_SUSPEND_WAKEUP,
  40. PME_SUSPEND_NOIRQ,
  41. };
  42. struct pcie_pme_service_data {
  43. spinlock_t lock;
  44. struct pcie_device *srv;
  45. struct work_struct work;
  46. enum pme_suspend_level suspend_level;
  47. };
  48. /**
  49. * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
  50. * @dev: PCIe root port or event collector.
  51. * @enable: Enable or disable the interrupt.
  52. */
  53. void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
  54. {
  55. if (enable)
  56. pcie_capability_set_word(dev, PCI_EXP_RTCTL,
  57. PCI_EXP_RTCTL_PMEIE);
  58. else
  59. pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
  60. PCI_EXP_RTCTL_PMEIE);
  61. }
  62. /**
  63. * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
  64. * @bus: PCI bus to scan.
  65. *
  66. * Scan given PCI bus and all buses under it for devices asserting PME#.
  67. */
  68. static bool pcie_pme_walk_bus(struct pci_bus *bus)
  69. {
  70. struct pci_dev *dev;
  71. bool ret = false;
  72. list_for_each_entry(dev, &bus->devices, bus_list) {
  73. /* Skip PCIe devices in case we started from a root port. */
  74. if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
  75. if (dev->pme_poll)
  76. dev->pme_poll = false;
  77. pci_wakeup_event(dev);
  78. pm_request_resume(&dev->dev);
  79. ret = true;
  80. }
  81. if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
  82. ret = true;
  83. }
  84. return ret;
  85. }
  86. /**
  87. * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
  88. * @bus: Secondary bus of the bridge.
  89. * @devfn: Device/function number to check.
  90. *
  91. * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
  92. * PCIe PME message. In such that case the bridge should use the Requester ID
  93. * of device/function number 0 on its secondary bus.
  94. */
  95. static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
  96. {
  97. struct pci_dev *dev;
  98. bool found = false;
  99. if (devfn)
  100. return false;
  101. dev = pci_dev_get(bus->self);
  102. if (!dev)
  103. return false;
  104. if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
  105. down_read(&pci_bus_sem);
  106. if (pcie_pme_walk_bus(bus))
  107. found = true;
  108. up_read(&pci_bus_sem);
  109. }
  110. pci_dev_put(dev);
  111. return found;
  112. }
  113. /**
  114. * pcie_pme_handle_request - Find device that generated PME and handle it.
  115. * @port: Root port or event collector that generated the PME interrupt.
  116. * @req_id: PCIe Requester ID of the device that generated the PME.
  117. */
  118. static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
  119. {
  120. u8 busnr = req_id >> 8, devfn = req_id & 0xff;
  121. struct pci_bus *bus;
  122. struct pci_dev *dev;
  123. bool found = false;
  124. /* First, check if the PME is from the root port itself. */
  125. if (port->devfn == devfn && port->bus->number == busnr) {
  126. if (port->pme_poll)
  127. port->pme_poll = false;
  128. if (pci_check_pme_status(port)) {
  129. pm_request_resume(&port->dev);
  130. found = true;
  131. } else {
  132. /*
  133. * Apparently, the root port generated the PME on behalf
  134. * of a non-PCIe device downstream. If this is done by
  135. * a root port, the Requester ID field in its status
  136. * register may contain either the root port's, or the
  137. * source device's information (PCI Express Base
  138. * Specification, Rev. 2.0, Section 6.1.9).
  139. */
  140. down_read(&pci_bus_sem);
  141. found = pcie_pme_walk_bus(port->subordinate);
  142. up_read(&pci_bus_sem);
  143. }
  144. goto out;
  145. }
  146. /* Second, find the bus the source device is on. */
  147. bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
  148. if (!bus)
  149. goto out;
  150. /* Next, check if the PME is from a PCIe-PCI bridge. */
  151. found = pcie_pme_from_pci_bridge(bus, devfn);
  152. if (found)
  153. goto out;
  154. /* Finally, try to find the PME source on the bus. */
  155. down_read(&pci_bus_sem);
  156. list_for_each_entry(dev, &bus->devices, bus_list) {
  157. pci_dev_get(dev);
  158. if (dev->devfn == devfn) {
  159. found = true;
  160. break;
  161. }
  162. pci_dev_put(dev);
  163. }
  164. up_read(&pci_bus_sem);
  165. if (found) {
  166. /* The device is there, but we have to check its PME status. */
  167. found = pci_check_pme_status(dev);
  168. if (found) {
  169. if (dev->pme_poll)
  170. dev->pme_poll = false;
  171. pci_wakeup_event(dev);
  172. pm_request_resume(&dev->dev);
  173. }
  174. pci_dev_put(dev);
  175. } else if (devfn) {
  176. /*
  177. * The device is not there, but we can still try to recover by
  178. * assuming that the PME was reported by a PCIe-PCI bridge that
  179. * used devfn different from zero.
  180. */
  181. dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
  182. busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
  183. found = pcie_pme_from_pci_bridge(bus, 0);
  184. }
  185. out:
  186. if (!found)
  187. dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
  188. }
  189. /**
  190. * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
  191. * @work: Work structure giving access to service data.
  192. */
  193. static void pcie_pme_work_fn(struct work_struct *work)
  194. {
  195. struct pcie_pme_service_data *data =
  196. container_of(work, struct pcie_pme_service_data, work);
  197. struct pci_dev *port = data->srv->port;
  198. u32 rtsta;
  199. spin_lock_irq(&data->lock);
  200. for (;;) {
  201. if (data->suspend_level != PME_SUSPEND_NONE)
  202. break;
  203. pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
  204. if (rtsta == (u32) ~0)
  205. break;
  206. if (rtsta & PCI_EXP_RTSTA_PME) {
  207. /*
  208. * Clear PME status of the port. If there are other
  209. * pending PMEs, the status will be set again.
  210. */
  211. pcie_clear_root_pme_status(port);
  212. spin_unlock_irq(&data->lock);
  213. pcie_pme_handle_request(port, rtsta & 0xffff);
  214. spin_lock_irq(&data->lock);
  215. continue;
  216. }
  217. /* No need to loop if there are no more PMEs pending. */
  218. if (!(rtsta & PCI_EXP_RTSTA_PENDING))
  219. break;
  220. spin_unlock_irq(&data->lock);
  221. cpu_relax();
  222. spin_lock_irq(&data->lock);
  223. }
  224. if (data->suspend_level == PME_SUSPEND_NONE)
  225. pcie_pme_interrupt_enable(port, true);
  226. spin_unlock_irq(&data->lock);
  227. }
  228. /**
  229. * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
  230. * @irq: Interrupt vector.
  231. * @context: Interrupt context pointer.
  232. */
  233. static irqreturn_t pcie_pme_irq(int irq, void *context)
  234. {
  235. struct pci_dev *port;
  236. struct pcie_pme_service_data *data;
  237. u32 rtsta;
  238. unsigned long flags;
  239. port = ((struct pcie_device *)context)->port;
  240. data = get_service_data((struct pcie_device *)context);
  241. spin_lock_irqsave(&data->lock, flags);
  242. pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
  243. if (rtsta == (u32) ~0 || !(rtsta & PCI_EXP_RTSTA_PME)) {
  244. spin_unlock_irqrestore(&data->lock, flags);
  245. return IRQ_NONE;
  246. }
  247. pcie_pme_interrupt_enable(port, false);
  248. spin_unlock_irqrestore(&data->lock, flags);
  249. /* We don't use pm_wq, because it's freezable. */
  250. schedule_work(&data->work);
  251. return IRQ_HANDLED;
  252. }
  253. /**
  254. * pcie_pme_set_native - Set the PME interrupt flag for given device.
  255. * @dev: PCI device to handle.
  256. * @ign: Ignored.
  257. */
  258. static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
  259. {
  260. dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
  261. device_set_run_wake(&dev->dev, true);
  262. dev->pme_interrupt = true;
  263. return 0;
  264. }
  265. /**
  266. * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
  267. * @port: PCIe root port or event collector to handle.
  268. *
  269. * For each device below given root port, including the port itself (or for each
  270. * root complex integrated endpoint if @port is a root complex event collector)
  271. * set the flag indicating that it can signal run-time wake-up events via PCIe
  272. * PME interrupts.
  273. */
  274. static void pcie_pme_mark_devices(struct pci_dev *port)
  275. {
  276. pcie_pme_set_native(port, NULL);
  277. if (port->subordinate) {
  278. pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
  279. } else {
  280. struct pci_bus *bus = port->bus;
  281. struct pci_dev *dev;
  282. /* Check if this is a root port event collector. */
  283. if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
  284. return;
  285. down_read(&pci_bus_sem);
  286. list_for_each_entry(dev, &bus->devices, bus_list)
  287. if (pci_is_pcie(dev)
  288. && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  289. pcie_pme_set_native(dev, NULL);
  290. up_read(&pci_bus_sem);
  291. }
  292. }
  293. /**
  294. * pcie_pme_probe - Initialize PCIe PME service for given root port.
  295. * @srv: PCIe service to initialize.
  296. */
  297. static int pcie_pme_probe(struct pcie_device *srv)
  298. {
  299. struct pci_dev *port;
  300. struct pcie_pme_service_data *data;
  301. int ret;
  302. data = kzalloc(sizeof(*data), GFP_KERNEL);
  303. if (!data)
  304. return -ENOMEM;
  305. spin_lock_init(&data->lock);
  306. INIT_WORK(&data->work, pcie_pme_work_fn);
  307. data->srv = srv;
  308. set_service_data(srv, data);
  309. port = srv->port;
  310. pcie_pme_interrupt_enable(port, false);
  311. pcie_clear_root_pme_status(port);
  312. ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
  313. if (ret) {
  314. kfree(data);
  315. } else {
  316. pcie_pme_mark_devices(port);
  317. pcie_pme_interrupt_enable(port, true);
  318. }
  319. return ret;
  320. }
  321. static bool pcie_pme_check_wakeup(struct pci_bus *bus)
  322. {
  323. struct pci_dev *dev;
  324. if (!bus)
  325. return false;
  326. list_for_each_entry(dev, &bus->devices, bus_list)
  327. if (device_may_wakeup(&dev->dev)
  328. || pcie_pme_check_wakeup(dev->subordinate))
  329. return true;
  330. return false;
  331. }
  332. /**
  333. * pcie_pme_suspend - Suspend PCIe PME service device.
  334. * @srv: PCIe service device to suspend.
  335. */
  336. static int pcie_pme_suspend(struct pcie_device *srv)
  337. {
  338. struct pcie_pme_service_data *data = get_service_data(srv);
  339. struct pci_dev *port = srv->port;
  340. bool wakeup, wake_irq_enabled = false;
  341. int ret;
  342. if (device_may_wakeup(&port->dev)) {
  343. wakeup = true;
  344. } else {
  345. down_read(&pci_bus_sem);
  346. wakeup = pcie_pme_check_wakeup(port->subordinate);
  347. up_read(&pci_bus_sem);
  348. }
  349. spin_lock_irq(&data->lock);
  350. if (wakeup) {
  351. ret = enable_irq_wake(srv->irq);
  352. if (ret == 0) {
  353. data->suspend_level = PME_SUSPEND_WAKEUP;
  354. wake_irq_enabled = true;
  355. }
  356. }
  357. if (!wake_irq_enabled) {
  358. pcie_pme_interrupt_enable(port, false);
  359. pcie_clear_root_pme_status(port);
  360. data->suspend_level = PME_SUSPEND_NOIRQ;
  361. }
  362. spin_unlock_irq(&data->lock);
  363. synchronize_irq(srv->irq);
  364. return 0;
  365. }
  366. /**
  367. * pcie_pme_resume - Resume PCIe PME service device.
  368. * @srv - PCIe service device to resume.
  369. */
  370. static int pcie_pme_resume(struct pcie_device *srv)
  371. {
  372. struct pcie_pme_service_data *data = get_service_data(srv);
  373. spin_lock_irq(&data->lock);
  374. if (data->suspend_level == PME_SUSPEND_NOIRQ) {
  375. struct pci_dev *port = srv->port;
  376. pcie_clear_root_pme_status(port);
  377. pcie_pme_interrupt_enable(port, true);
  378. } else {
  379. disable_irq_wake(srv->irq);
  380. }
  381. data->suspend_level = PME_SUSPEND_NONE;
  382. spin_unlock_irq(&data->lock);
  383. return 0;
  384. }
  385. /**
  386. * pcie_pme_remove - Prepare PCIe PME service device for removal.
  387. * @srv - PCIe service device to remove.
  388. */
  389. static void pcie_pme_remove(struct pcie_device *srv)
  390. {
  391. pcie_pme_suspend(srv);
  392. free_irq(srv->irq, srv);
  393. kfree(get_service_data(srv));
  394. }
  395. static struct pcie_port_service_driver pcie_pme_driver = {
  396. .name = "pcie_pme",
  397. .port_type = PCI_EXP_TYPE_ROOT_PORT,
  398. .service = PCIE_PORT_SERVICE_PME,
  399. .probe = pcie_pme_probe,
  400. .suspend = pcie_pme_suspend,
  401. .resume = pcie_pme_resume,
  402. .remove = pcie_pme_remove,
  403. };
  404. /**
  405. * pcie_pme_service_init - Register the PCIe PME service driver.
  406. */
  407. static int __init pcie_pme_service_init(void)
  408. {
  409. return pcie_port_service_register(&pcie_pme_driver);
  410. }
  411. device_initcall(pcie_pme_service_init);