i2c.c 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307
  1. /*
  2. * I2C Link Layer for Samsung S3FWRN5 NCI based Driver
  3. *
  4. * Copyright (C) 2015 Samsung Electrnoics
  5. * Robert Baldyga <r.baldyga@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2 or later, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/i2c.h>
  20. #include <linux/gpio.h>
  21. #include <linux/delay.h>
  22. #include <linux/of_gpio.h>
  23. #include <linux/of_irq.h>
  24. #include <linux/module.h>
  25. #include <net/nfc/nfc.h>
  26. #include "s3fwrn5.h"
  27. #define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c"
  28. #define S3FWRN5_I2C_MAX_PAYLOAD 32
  29. #define S3FWRN5_EN_WAIT_TIME 150
  30. struct s3fwrn5_i2c_phy {
  31. struct i2c_client *i2c_dev;
  32. struct nci_dev *ndev;
  33. unsigned int gpio_en;
  34. unsigned int gpio_fw_wake;
  35. struct mutex mutex;
  36. enum s3fwrn5_mode mode;
  37. unsigned int irq_skip:1;
  38. };
  39. static void s3fwrn5_i2c_set_wake(void *phy_id, bool wake)
  40. {
  41. struct s3fwrn5_i2c_phy *phy = phy_id;
  42. mutex_lock(&phy->mutex);
  43. gpio_set_value(phy->gpio_fw_wake, wake);
  44. msleep(S3FWRN5_EN_WAIT_TIME/2);
  45. mutex_unlock(&phy->mutex);
  46. }
  47. static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode)
  48. {
  49. struct s3fwrn5_i2c_phy *phy = phy_id;
  50. mutex_lock(&phy->mutex);
  51. if (phy->mode == mode)
  52. goto out;
  53. phy->mode = mode;
  54. gpio_set_value(phy->gpio_en, 1);
  55. gpio_set_value(phy->gpio_fw_wake, 0);
  56. if (mode == S3FWRN5_MODE_FW)
  57. gpio_set_value(phy->gpio_fw_wake, 1);
  58. if (mode != S3FWRN5_MODE_COLD) {
  59. msleep(S3FWRN5_EN_WAIT_TIME);
  60. gpio_set_value(phy->gpio_en, 0);
  61. msleep(S3FWRN5_EN_WAIT_TIME/2);
  62. }
  63. phy->irq_skip = true;
  64. out:
  65. mutex_unlock(&phy->mutex);
  66. }
  67. static enum s3fwrn5_mode s3fwrn5_i2c_get_mode(void *phy_id)
  68. {
  69. struct s3fwrn5_i2c_phy *phy = phy_id;
  70. enum s3fwrn5_mode mode;
  71. mutex_lock(&phy->mutex);
  72. mode = phy->mode;
  73. mutex_unlock(&phy->mutex);
  74. return mode;
  75. }
  76. static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb)
  77. {
  78. struct s3fwrn5_i2c_phy *phy = phy_id;
  79. int ret;
  80. mutex_lock(&phy->mutex);
  81. phy->irq_skip = false;
  82. ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len);
  83. if (ret == -EREMOTEIO) {
  84. /* Retry, chip was in standby */
  85. usleep_range(110000, 120000);
  86. ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len);
  87. }
  88. mutex_unlock(&phy->mutex);
  89. if (ret < 0)
  90. return ret;
  91. if (ret != skb->len)
  92. return -EREMOTEIO;
  93. return 0;
  94. }
  95. static const struct s3fwrn5_phy_ops i2c_phy_ops = {
  96. .set_wake = s3fwrn5_i2c_set_wake,
  97. .set_mode = s3fwrn5_i2c_set_mode,
  98. .get_mode = s3fwrn5_i2c_get_mode,
  99. .write = s3fwrn5_i2c_write,
  100. };
  101. static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy)
  102. {
  103. struct sk_buff *skb;
  104. size_t hdr_size;
  105. size_t data_len;
  106. char hdr[4];
  107. int ret;
  108. hdr_size = (phy->mode == S3FWRN5_MODE_NCI) ?
  109. NCI_CTRL_HDR_SIZE : S3FWRN5_FW_HDR_SIZE;
  110. ret = i2c_master_recv(phy->i2c_dev, hdr, hdr_size);
  111. if (ret < 0)
  112. return ret;
  113. if (ret < hdr_size)
  114. return -EBADMSG;
  115. data_len = (phy->mode == S3FWRN5_MODE_NCI) ?
  116. ((struct nci_ctrl_hdr *)hdr)->plen :
  117. ((struct s3fwrn5_fw_header *)hdr)->len;
  118. skb = alloc_skb(hdr_size + data_len, GFP_KERNEL);
  119. if (!skb)
  120. return -ENOMEM;
  121. memcpy(skb_put(skb, hdr_size), hdr, hdr_size);
  122. if (data_len == 0)
  123. goto out;
  124. ret = i2c_master_recv(phy->i2c_dev, skb_put(skb, data_len), data_len);
  125. if (ret != data_len) {
  126. kfree_skb(skb);
  127. return -EBADMSG;
  128. }
  129. out:
  130. return s3fwrn5_recv_frame(phy->ndev, skb, phy->mode);
  131. }
  132. static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id)
  133. {
  134. struct s3fwrn5_i2c_phy *phy = phy_id;
  135. int ret = 0;
  136. if (!phy || !phy->ndev) {
  137. WARN_ON_ONCE(1);
  138. return IRQ_NONE;
  139. }
  140. mutex_lock(&phy->mutex);
  141. if (phy->irq_skip)
  142. goto out;
  143. switch (phy->mode) {
  144. case S3FWRN5_MODE_NCI:
  145. case S3FWRN5_MODE_FW:
  146. ret = s3fwrn5_i2c_read(phy);
  147. break;
  148. case S3FWRN5_MODE_COLD:
  149. ret = -EREMOTEIO;
  150. break;
  151. }
  152. out:
  153. mutex_unlock(&phy->mutex);
  154. return IRQ_HANDLED;
  155. }
  156. static int s3fwrn5_i2c_parse_dt(struct i2c_client *client)
  157. {
  158. struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client);
  159. struct device_node *np = client->dev.of_node;
  160. if (!np)
  161. return -ENODEV;
  162. phy->gpio_en = of_get_named_gpio(np, "s3fwrn5,en-gpios", 0);
  163. if (!gpio_is_valid(phy->gpio_en))
  164. return -ENODEV;
  165. phy->gpio_fw_wake = of_get_named_gpio(np, "s3fwrn5,fw-gpios", 0);
  166. if (!gpio_is_valid(phy->gpio_fw_wake))
  167. return -ENODEV;
  168. return 0;
  169. }
  170. static int s3fwrn5_i2c_probe(struct i2c_client *client,
  171. const struct i2c_device_id *id)
  172. {
  173. struct s3fwrn5_i2c_phy *phy;
  174. int ret;
  175. phy = devm_kzalloc(&client->dev, sizeof(*phy), GFP_KERNEL);
  176. if (!phy)
  177. return -ENOMEM;
  178. mutex_init(&phy->mutex);
  179. phy->mode = S3FWRN5_MODE_COLD;
  180. phy->irq_skip = true;
  181. phy->i2c_dev = client;
  182. i2c_set_clientdata(client, phy);
  183. ret = s3fwrn5_i2c_parse_dt(client);
  184. if (ret < 0)
  185. return ret;
  186. ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->gpio_en,
  187. GPIOF_OUT_INIT_HIGH, "s3fwrn5_en");
  188. if (ret < 0)
  189. return ret;
  190. ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->gpio_fw_wake,
  191. GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake");
  192. if (ret < 0)
  193. return ret;
  194. ret = s3fwrn5_probe(&phy->ndev, phy, &phy->i2c_dev->dev, &i2c_phy_ops,
  195. S3FWRN5_I2C_MAX_PAYLOAD);
  196. if (ret < 0)
  197. return ret;
  198. ret = devm_request_threaded_irq(&client->dev, phy->i2c_dev->irq, NULL,
  199. s3fwrn5_i2c_irq_thread_fn, IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
  200. S3FWRN5_I2C_DRIVER_NAME, phy);
  201. if (ret)
  202. s3fwrn5_remove(phy->ndev);
  203. return ret;
  204. }
  205. static int s3fwrn5_i2c_remove(struct i2c_client *client)
  206. {
  207. struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client);
  208. s3fwrn5_remove(phy->ndev);
  209. return 0;
  210. }
  211. static struct i2c_device_id s3fwrn5_i2c_id_table[] = {
  212. {S3FWRN5_I2C_DRIVER_NAME, 0},
  213. {}
  214. };
  215. MODULE_DEVICE_TABLE(i2c, s3fwrn5_i2c_id_table);
  216. static const struct of_device_id of_s3fwrn5_i2c_match[] = {
  217. { .compatible = "samsung,s3fwrn5-i2c", },
  218. {}
  219. };
  220. MODULE_DEVICE_TABLE(of, of_s3fwrn5_i2c_match);
  221. static struct i2c_driver s3fwrn5_i2c_driver = {
  222. .driver = {
  223. .owner = THIS_MODULE,
  224. .name = S3FWRN5_I2C_DRIVER_NAME,
  225. .of_match_table = of_match_ptr(of_s3fwrn5_i2c_match),
  226. },
  227. .probe = s3fwrn5_i2c_probe,
  228. .remove = s3fwrn5_i2c_remove,
  229. .id_table = s3fwrn5_i2c_id_table,
  230. };
  231. module_i2c_driver(s3fwrn5_i2c_driver);
  232. MODULE_LICENSE("GPL");
  233. MODULE_DESCRIPTION("I2C driver for Samsung S3FWRN5");
  234. MODULE_AUTHOR("Robert Baldyga <r.baldyga@samsung.com>");