mdio-mux-bcm-iproc.c 6.1 KB

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  1. /*
  2. * Copyright 2016 Broadcom
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License, version 2, as
  6. * published by the Free Software Foundation (the "GPL").
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License version 2 (GPLv2) for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * version 2 (GPLv2) along with this source code.
  15. */
  16. #include <linux/platform_device.h>
  17. #include <linux/device.h>
  18. #include <linux/of_mdio.h>
  19. #include <linux/module.h>
  20. #include <linux/phy.h>
  21. #include <linux/mdio-mux.h>
  22. #include <linux/delay.h>
  23. #define MDIO_PARAM_OFFSET 0x00
  24. #define MDIO_PARAM_MIIM_CYCLE 29
  25. #define MDIO_PARAM_INTERNAL_SEL 25
  26. #define MDIO_PARAM_BUS_ID 22
  27. #define MDIO_PARAM_C45_SEL 21
  28. #define MDIO_PARAM_PHY_ID 16
  29. #define MDIO_PARAM_PHY_DATA 0
  30. #define MDIO_READ_OFFSET 0x04
  31. #define MDIO_READ_DATA_MASK 0xffff
  32. #define MDIO_ADDR_OFFSET 0x08
  33. #define MDIO_CTRL_OFFSET 0x0C
  34. #define MDIO_CTRL_WRITE_OP 0x1
  35. #define MDIO_CTRL_READ_OP 0x2
  36. #define MDIO_STAT_OFFSET 0x10
  37. #define MDIO_STAT_DONE 1
  38. #define BUS_MAX_ADDR 32
  39. #define EXT_BUS_START_ADDR 16
  40. struct iproc_mdiomux_desc {
  41. void *mux_handle;
  42. void __iomem *base;
  43. struct device *dev;
  44. struct mii_bus *mii_bus;
  45. };
  46. static int iproc_mdio_wait_for_idle(void __iomem *base, bool result)
  47. {
  48. unsigned int timeout = 1000; /* loop for 1s */
  49. u32 val;
  50. do {
  51. val = readl(base + MDIO_STAT_OFFSET);
  52. if ((val & MDIO_STAT_DONE) == result)
  53. return 0;
  54. usleep_range(1000, 2000);
  55. } while (timeout--);
  56. return -ETIMEDOUT;
  57. }
  58. /* start_miim_ops- Program and start MDIO transaction over mdio bus.
  59. * @base: Base address
  60. * @phyid: phyid of the selected bus.
  61. * @reg: register offset to be read/written.
  62. * @val :0 if read op else value to be written in @reg;
  63. * @op: Operation that need to be carried out.
  64. * MDIO_CTRL_READ_OP: Read transaction.
  65. * MDIO_CTRL_WRITE_OP: Write transaction.
  66. *
  67. * Return value: Successful Read operation returns read reg values and write
  68. * operation returns 0. Failure operation returns negative error code.
  69. */
  70. static int start_miim_ops(void __iomem *base,
  71. u16 phyid, u32 reg, u16 val, u32 op)
  72. {
  73. u32 param;
  74. int ret;
  75. writel(0, base + MDIO_CTRL_OFFSET);
  76. ret = iproc_mdio_wait_for_idle(base, 0);
  77. if (ret)
  78. goto err;
  79. param = readl(base + MDIO_PARAM_OFFSET);
  80. param |= phyid << MDIO_PARAM_PHY_ID;
  81. param |= val << MDIO_PARAM_PHY_DATA;
  82. if (reg & MII_ADDR_C45)
  83. param |= BIT(MDIO_PARAM_C45_SEL);
  84. writel(param, base + MDIO_PARAM_OFFSET);
  85. writel(reg, base + MDIO_ADDR_OFFSET);
  86. writel(op, base + MDIO_CTRL_OFFSET);
  87. ret = iproc_mdio_wait_for_idle(base, 1);
  88. if (ret)
  89. goto err;
  90. if (op == MDIO_CTRL_READ_OP)
  91. ret = readl(base + MDIO_READ_OFFSET) & MDIO_READ_DATA_MASK;
  92. err:
  93. return ret;
  94. }
  95. static int iproc_mdiomux_read(struct mii_bus *bus, int phyid, int reg)
  96. {
  97. struct iproc_mdiomux_desc *md = bus->priv;
  98. int ret;
  99. ret = start_miim_ops(md->base, phyid, reg, 0, MDIO_CTRL_READ_OP);
  100. if (ret < 0)
  101. dev_err(&bus->dev, "mdiomux read operation failed!!!");
  102. return ret;
  103. }
  104. static int iproc_mdiomux_write(struct mii_bus *bus,
  105. int phyid, int reg, u16 val)
  106. {
  107. struct iproc_mdiomux_desc *md = bus->priv;
  108. int ret;
  109. /* Write val at reg offset */
  110. ret = start_miim_ops(md->base, phyid, reg, val, MDIO_CTRL_WRITE_OP);
  111. if (ret < 0)
  112. dev_err(&bus->dev, "mdiomux write operation failed!!!");
  113. return ret;
  114. }
  115. static int mdio_mux_iproc_switch_fn(int current_child, int desired_child,
  116. void *data)
  117. {
  118. struct iproc_mdiomux_desc *md = data;
  119. u32 param, bus_id;
  120. bool bus_dir;
  121. /* select bus and its properties */
  122. bus_dir = (desired_child < EXT_BUS_START_ADDR);
  123. bus_id = bus_dir ? desired_child : (desired_child - EXT_BUS_START_ADDR);
  124. param = (bus_dir ? 1 : 0) << MDIO_PARAM_INTERNAL_SEL;
  125. param |= (bus_id << MDIO_PARAM_BUS_ID);
  126. writel(param, md->base + MDIO_PARAM_OFFSET);
  127. return 0;
  128. }
  129. static int mdio_mux_iproc_probe(struct platform_device *pdev)
  130. {
  131. struct iproc_mdiomux_desc *md;
  132. struct mii_bus *bus;
  133. struct resource *res;
  134. int rc;
  135. md = devm_kzalloc(&pdev->dev, sizeof(*md), GFP_KERNEL);
  136. if (!md)
  137. return -ENOMEM;
  138. md->dev = &pdev->dev;
  139. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  140. md->base = devm_ioremap_resource(&pdev->dev, res);
  141. if (IS_ERR(md->base)) {
  142. dev_err(&pdev->dev, "failed to ioremap register\n");
  143. return PTR_ERR(md->base);
  144. }
  145. md->mii_bus = mdiobus_alloc();
  146. if (!md->mii_bus) {
  147. dev_err(&pdev->dev, "mdiomux bus alloc failed\n");
  148. return -ENOMEM;
  149. }
  150. bus = md->mii_bus;
  151. bus->priv = md;
  152. bus->name = "iProc MDIO mux bus";
  153. snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%d", pdev->name, pdev->id);
  154. bus->parent = &pdev->dev;
  155. bus->read = iproc_mdiomux_read;
  156. bus->write = iproc_mdiomux_write;
  157. bus->phy_mask = ~0;
  158. bus->dev.of_node = pdev->dev.of_node;
  159. rc = mdiobus_register(bus);
  160. if (rc) {
  161. dev_err(&pdev->dev, "mdiomux registration failed\n");
  162. goto out;
  163. }
  164. platform_set_drvdata(pdev, md);
  165. rc = mdio_mux_init(md->dev, mdio_mux_iproc_switch_fn,
  166. &md->mux_handle, md, md->mii_bus);
  167. if (rc) {
  168. dev_info(md->dev, "mdiomux initialization failed\n");
  169. goto out_register;
  170. }
  171. dev_info(md->dev, "iProc mdiomux registered\n");
  172. return 0;
  173. out_register:
  174. mdiobus_unregister(bus);
  175. out:
  176. mdiobus_free(bus);
  177. return rc;
  178. }
  179. static int mdio_mux_iproc_remove(struct platform_device *pdev)
  180. {
  181. struct iproc_mdiomux_desc *md = dev_get_platdata(&pdev->dev);
  182. mdio_mux_uninit(md->mux_handle);
  183. mdiobus_unregister(md->mii_bus);
  184. mdiobus_free(md->mii_bus);
  185. return 0;
  186. }
  187. static const struct of_device_id mdio_mux_iproc_match[] = {
  188. {
  189. .compatible = "brcm,mdio-mux-iproc",
  190. },
  191. {},
  192. };
  193. MODULE_DEVICE_TABLE(of, mdio_mux_iproc_match);
  194. static struct platform_driver mdiomux_iproc_driver = {
  195. .driver = {
  196. .name = "mdio-mux-iproc",
  197. .of_match_table = mdio_mux_iproc_match,
  198. },
  199. .probe = mdio_mux_iproc_probe,
  200. .remove = mdio_mux_iproc_remove,
  201. };
  202. module_platform_driver(mdiomux_iproc_driver);
  203. MODULE_DESCRIPTION("iProc MDIO Mux Bus Driver");
  204. MODULE_AUTHOR("Pramod Kumar <pramod.kumar@broadcom.com>");
  205. MODULE_LICENSE("GPL v2");