netcp_ethss.c 93 KB

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  1. /*
  2. * Keystone GBE and XGBE subsystem code
  3. *
  4. * Copyright (C) 2014 Texas Instruments Incorporated
  5. * Authors: Sandeep Nair <sandeep_n@ti.com>
  6. * Sandeep Paulraj <s-paulraj@ti.com>
  7. * Cyril Chemparathy <cyril@ti.com>
  8. * Santosh Shilimkar <santosh.shilimkar@ti.com>
  9. * Wingman Kwok <w-kwok2@ti.com>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation version 2.
  14. *
  15. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  16. * kind, whether express or implied; without even the implied warranty
  17. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. */
  20. #include <linux/io.h>
  21. #include <linux/module.h>
  22. #include <linux/of_mdio.h>
  23. #include <linux/of_address.h>
  24. #include <linux/if_vlan.h>
  25. #include <linux/ethtool.h>
  26. #include "cpsw_ale.h"
  27. #include "netcp.h"
  28. #define NETCP_DRIVER_NAME "TI KeyStone Ethernet Driver"
  29. #define NETCP_DRIVER_VERSION "v1.0"
  30. #define GBE_IDENT(reg) ((reg >> 16) & 0xffff)
  31. #define GBE_MAJOR_VERSION(reg) (reg >> 8 & 0x7)
  32. #define GBE_MINOR_VERSION(reg) (reg & 0xff)
  33. #define GBE_RTL_VERSION(reg) ((reg >> 11) & 0x1f)
  34. /* 1G Ethernet SS defines */
  35. #define GBE_MODULE_NAME "netcp-gbe"
  36. #define GBE_SS_VERSION_14 0x4ed21104
  37. #define GBE_SS_REG_INDEX 0
  38. #define GBE_SGMII34_REG_INDEX 1
  39. #define GBE_SM_REG_INDEX 2
  40. /* offset relative to base of GBE_SS_REG_INDEX */
  41. #define GBE13_SGMII_MODULE_OFFSET 0x100
  42. /* offset relative to base of GBE_SM_REG_INDEX */
  43. #define GBE13_HOST_PORT_OFFSET 0x34
  44. #define GBE13_SLAVE_PORT_OFFSET 0x60
  45. #define GBE13_EMAC_OFFSET 0x100
  46. #define GBE13_SLAVE_PORT2_OFFSET 0x200
  47. #define GBE13_HW_STATS_OFFSET 0x300
  48. #define GBE13_ALE_OFFSET 0x600
  49. #define GBE13_HOST_PORT_NUM 0
  50. #define GBE13_NUM_ALE_ENTRIES 1024
  51. /* 1G Ethernet NU SS defines */
  52. #define GBENU_MODULE_NAME "netcp-gbenu"
  53. #define GBE_SS_ID_NU 0x4ee6
  54. #define GBE_SS_ID_2U 0x4ee8
  55. #define IS_SS_ID_MU(d) \
  56. ((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \
  57. (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U))
  58. #define IS_SS_ID_NU(d) \
  59. (GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU)
  60. #define GBENU_SS_REG_INDEX 0
  61. #define GBENU_SM_REG_INDEX 1
  62. #define GBENU_SGMII_MODULE_OFFSET 0x100
  63. #define GBENU_HOST_PORT_OFFSET 0x1000
  64. #define GBENU_SLAVE_PORT_OFFSET 0x2000
  65. #define GBENU_EMAC_OFFSET 0x2330
  66. #define GBENU_HW_STATS_OFFSET 0x1a000
  67. #define GBENU_ALE_OFFSET 0x1e000
  68. #define GBENU_HOST_PORT_NUM 0
  69. #define GBENU_NUM_ALE_ENTRIES 1024
  70. #define GBENU_SGMII_MODULE_SIZE 0x100
  71. /* 10G Ethernet SS defines */
  72. #define XGBE_MODULE_NAME "netcp-xgbe"
  73. #define XGBE_SS_VERSION_10 0x4ee42100
  74. #define XGBE_SS_REG_INDEX 0
  75. #define XGBE_SM_REG_INDEX 1
  76. #define XGBE_SERDES_REG_INDEX 2
  77. /* offset relative to base of XGBE_SS_REG_INDEX */
  78. #define XGBE10_SGMII_MODULE_OFFSET 0x100
  79. /* offset relative to base of XGBE_SM_REG_INDEX */
  80. #define XGBE10_HOST_PORT_OFFSET 0x34
  81. #define XGBE10_SLAVE_PORT_OFFSET 0x64
  82. #define XGBE10_EMAC_OFFSET 0x400
  83. #define XGBE10_ALE_OFFSET 0x700
  84. #define XGBE10_HW_STATS_OFFSET 0x800
  85. #define XGBE10_HOST_PORT_NUM 0
  86. #define XGBE10_NUM_ALE_ENTRIES 1024
  87. #define GBE_TIMER_INTERVAL (HZ / 2)
  88. /* Soft reset register values */
  89. #define SOFT_RESET_MASK BIT(0)
  90. #define SOFT_RESET BIT(0)
  91. #define DEVICE_EMACSL_RESET_POLL_COUNT 100
  92. #define GMACSL_RET_WARN_RESET_INCOMPLETE -2
  93. #define MACSL_RX_ENABLE_CSF BIT(23)
  94. #define MACSL_ENABLE_EXT_CTL BIT(18)
  95. #define MACSL_XGMII_ENABLE BIT(13)
  96. #define MACSL_XGIG_MODE BIT(8)
  97. #define MACSL_GIG_MODE BIT(7)
  98. #define MACSL_GMII_ENABLE BIT(5)
  99. #define MACSL_FULLDUPLEX BIT(0)
  100. #define GBE_CTL_P0_ENABLE BIT(2)
  101. #define GBE13_REG_VAL_STAT_ENABLE_ALL 0xff
  102. #define XGBE_REG_VAL_STAT_ENABLE_ALL 0xf
  103. #define GBE_STATS_CD_SEL BIT(28)
  104. #define GBE_PORT_MASK(x) (BIT(x) - 1)
  105. #define GBE_MASK_NO_PORTS 0
  106. #define GBE_DEF_1G_MAC_CONTROL \
  107. (MACSL_GIG_MODE | MACSL_GMII_ENABLE | \
  108. MACSL_ENABLE_EXT_CTL | MACSL_RX_ENABLE_CSF)
  109. #define GBE_DEF_10G_MAC_CONTROL \
  110. (MACSL_XGIG_MODE | MACSL_XGMII_ENABLE | \
  111. MACSL_ENABLE_EXT_CTL | MACSL_RX_ENABLE_CSF)
  112. #define GBE_STATSA_MODULE 0
  113. #define GBE_STATSB_MODULE 1
  114. #define GBE_STATSC_MODULE 2
  115. #define GBE_STATSD_MODULE 3
  116. #define GBENU_STATS0_MODULE 0
  117. #define GBENU_STATS1_MODULE 1
  118. #define GBENU_STATS2_MODULE 2
  119. #define GBENU_STATS3_MODULE 3
  120. #define GBENU_STATS4_MODULE 4
  121. #define GBENU_STATS5_MODULE 5
  122. #define GBENU_STATS6_MODULE 6
  123. #define GBENU_STATS7_MODULE 7
  124. #define GBENU_STATS8_MODULE 8
  125. #define XGBE_STATS0_MODULE 0
  126. #define XGBE_STATS1_MODULE 1
  127. #define XGBE_STATS2_MODULE 2
  128. /* s: 0-based slave_port */
  129. #define SGMII_BASE(d, s) \
  130. (((s) < 2) ? (d)->sgmii_port_regs : (d)->sgmii_port34_regs)
  131. #define GBE_TX_QUEUE 648
  132. #define GBE_TXHOOK_ORDER 0
  133. #define GBE_DEFAULT_ALE_AGEOUT 30
  134. #define SLAVE_LINK_IS_XGMII(s) ((s)->link_interface >= XGMII_LINK_MAC_PHY)
  135. #define NETCP_LINK_STATE_INVALID -1
  136. #define GBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
  137. offsetof(struct gbe##_##rb, rn)
  138. #define GBENU_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
  139. offsetof(struct gbenu##_##rb, rn)
  140. #define XGBE_SET_REG_OFS(p, rb, rn) p->rb##_ofs.rn = \
  141. offsetof(struct xgbe##_##rb, rn)
  142. #define GBE_REG_ADDR(p, rb, rn) (p->rb + p->rb##_ofs.rn)
  143. #define HOST_TX_PRI_MAP_DEFAULT 0x00000000
  144. struct xgbe_ss_regs {
  145. u32 id_ver;
  146. u32 synce_count;
  147. u32 synce_mux;
  148. u32 control;
  149. };
  150. struct xgbe_switch_regs {
  151. u32 id_ver;
  152. u32 control;
  153. u32 emcontrol;
  154. u32 stat_port_en;
  155. u32 ptype;
  156. u32 soft_idle;
  157. u32 thru_rate;
  158. u32 gap_thresh;
  159. u32 tx_start_wds;
  160. u32 flow_control;
  161. u32 cppi_thresh;
  162. };
  163. struct xgbe_port_regs {
  164. u32 blk_cnt;
  165. u32 port_vlan;
  166. u32 tx_pri_map;
  167. u32 sa_lo;
  168. u32 sa_hi;
  169. u32 ts_ctl;
  170. u32 ts_seq_ltype;
  171. u32 ts_vlan;
  172. u32 ts_ctl_ltype2;
  173. u32 ts_ctl2;
  174. u32 control;
  175. };
  176. struct xgbe_host_port_regs {
  177. u32 blk_cnt;
  178. u32 port_vlan;
  179. u32 tx_pri_map;
  180. u32 src_id;
  181. u32 rx_pri_map;
  182. u32 rx_maxlen;
  183. };
  184. struct xgbe_emac_regs {
  185. u32 id_ver;
  186. u32 mac_control;
  187. u32 mac_status;
  188. u32 soft_reset;
  189. u32 rx_maxlen;
  190. u32 __reserved_0;
  191. u32 rx_pause;
  192. u32 tx_pause;
  193. u32 em_control;
  194. u32 __reserved_1;
  195. u32 tx_gap;
  196. u32 rsvd[4];
  197. };
  198. struct xgbe_host_hw_stats {
  199. u32 rx_good_frames;
  200. u32 rx_broadcast_frames;
  201. u32 rx_multicast_frames;
  202. u32 __rsvd_0[3];
  203. u32 rx_oversized_frames;
  204. u32 __rsvd_1;
  205. u32 rx_undersized_frames;
  206. u32 __rsvd_2;
  207. u32 overrun_type4;
  208. u32 overrun_type5;
  209. u32 rx_bytes;
  210. u32 tx_good_frames;
  211. u32 tx_broadcast_frames;
  212. u32 tx_multicast_frames;
  213. u32 __rsvd_3[9];
  214. u32 tx_bytes;
  215. u32 tx_64byte_frames;
  216. u32 tx_65_to_127byte_frames;
  217. u32 tx_128_to_255byte_frames;
  218. u32 tx_256_to_511byte_frames;
  219. u32 tx_512_to_1023byte_frames;
  220. u32 tx_1024byte_frames;
  221. u32 net_bytes;
  222. u32 rx_sof_overruns;
  223. u32 rx_mof_overruns;
  224. u32 rx_dma_overruns;
  225. };
  226. struct xgbe_hw_stats {
  227. u32 rx_good_frames;
  228. u32 rx_broadcast_frames;
  229. u32 rx_multicast_frames;
  230. u32 rx_pause_frames;
  231. u32 rx_crc_errors;
  232. u32 rx_align_code_errors;
  233. u32 rx_oversized_frames;
  234. u32 rx_jabber_frames;
  235. u32 rx_undersized_frames;
  236. u32 rx_fragments;
  237. u32 overrun_type4;
  238. u32 overrun_type5;
  239. u32 rx_bytes;
  240. u32 tx_good_frames;
  241. u32 tx_broadcast_frames;
  242. u32 tx_multicast_frames;
  243. u32 tx_pause_frames;
  244. u32 tx_deferred_frames;
  245. u32 tx_collision_frames;
  246. u32 tx_single_coll_frames;
  247. u32 tx_mult_coll_frames;
  248. u32 tx_excessive_collisions;
  249. u32 tx_late_collisions;
  250. u32 tx_underrun;
  251. u32 tx_carrier_sense_errors;
  252. u32 tx_bytes;
  253. u32 tx_64byte_frames;
  254. u32 tx_65_to_127byte_frames;
  255. u32 tx_128_to_255byte_frames;
  256. u32 tx_256_to_511byte_frames;
  257. u32 tx_512_to_1023byte_frames;
  258. u32 tx_1024byte_frames;
  259. u32 net_bytes;
  260. u32 rx_sof_overruns;
  261. u32 rx_mof_overruns;
  262. u32 rx_dma_overruns;
  263. };
  264. struct gbenu_ss_regs {
  265. u32 id_ver;
  266. u32 synce_count; /* NU */
  267. u32 synce_mux; /* NU */
  268. u32 control; /* 2U */
  269. u32 __rsvd_0[2]; /* 2U */
  270. u32 rgmii_status; /* 2U */
  271. u32 ss_status; /* 2U */
  272. };
  273. struct gbenu_switch_regs {
  274. u32 id_ver;
  275. u32 control;
  276. u32 __rsvd_0[2];
  277. u32 emcontrol;
  278. u32 stat_port_en;
  279. u32 ptype; /* NU */
  280. u32 soft_idle;
  281. u32 thru_rate; /* NU */
  282. u32 gap_thresh; /* NU */
  283. u32 tx_start_wds; /* NU */
  284. u32 eee_prescale; /* 2U */
  285. u32 tx_g_oflow_thresh_set; /* NU */
  286. u32 tx_g_oflow_thresh_clr; /* NU */
  287. u32 tx_g_buf_thresh_set_l; /* NU */
  288. u32 tx_g_buf_thresh_set_h; /* NU */
  289. u32 tx_g_buf_thresh_clr_l; /* NU */
  290. u32 tx_g_buf_thresh_clr_h; /* NU */
  291. };
  292. struct gbenu_port_regs {
  293. u32 __rsvd_0;
  294. u32 control;
  295. u32 max_blks; /* 2U */
  296. u32 mem_align1;
  297. u32 blk_cnt;
  298. u32 port_vlan;
  299. u32 tx_pri_map; /* NU */
  300. u32 pri_ctl; /* 2U */
  301. u32 rx_pri_map;
  302. u32 rx_maxlen;
  303. u32 tx_blks_pri; /* NU */
  304. u32 __rsvd_1;
  305. u32 idle2lpi; /* 2U */
  306. u32 lpi2idle; /* 2U */
  307. u32 eee_status; /* 2U */
  308. u32 __rsvd_2;
  309. u32 __rsvd_3[176]; /* NU: more to add */
  310. u32 __rsvd_4[2];
  311. u32 sa_lo;
  312. u32 sa_hi;
  313. u32 ts_ctl;
  314. u32 ts_seq_ltype;
  315. u32 ts_vlan;
  316. u32 ts_ctl_ltype2;
  317. u32 ts_ctl2;
  318. };
  319. struct gbenu_host_port_regs {
  320. u32 __rsvd_0;
  321. u32 control;
  322. u32 flow_id_offset; /* 2U */
  323. u32 __rsvd_1;
  324. u32 blk_cnt;
  325. u32 port_vlan;
  326. u32 tx_pri_map; /* NU */
  327. u32 pri_ctl;
  328. u32 rx_pri_map;
  329. u32 rx_maxlen;
  330. u32 tx_blks_pri; /* NU */
  331. u32 __rsvd_2;
  332. u32 idle2lpi; /* 2U */
  333. u32 lpi2wake; /* 2U */
  334. u32 eee_status; /* 2U */
  335. u32 __rsvd_3;
  336. u32 __rsvd_4[184]; /* NU */
  337. u32 host_blks_pri; /* NU */
  338. };
  339. struct gbenu_emac_regs {
  340. u32 mac_control;
  341. u32 mac_status;
  342. u32 soft_reset;
  343. u32 boff_test;
  344. u32 rx_pause;
  345. u32 __rsvd_0[11]; /* NU */
  346. u32 tx_pause;
  347. u32 __rsvd_1[11]; /* NU */
  348. u32 em_control;
  349. u32 tx_gap;
  350. };
  351. /* Some hw stat regs are applicable to slave port only.
  352. * This is handled by gbenu_et_stats struct. Also some
  353. * are for SS version NU and some are for 2U.
  354. */
  355. struct gbenu_hw_stats {
  356. u32 rx_good_frames;
  357. u32 rx_broadcast_frames;
  358. u32 rx_multicast_frames;
  359. u32 rx_pause_frames; /* slave */
  360. u32 rx_crc_errors;
  361. u32 rx_align_code_errors; /* slave */
  362. u32 rx_oversized_frames;
  363. u32 rx_jabber_frames; /* slave */
  364. u32 rx_undersized_frames;
  365. u32 rx_fragments; /* slave */
  366. u32 ale_drop;
  367. u32 ale_overrun_drop;
  368. u32 rx_bytes;
  369. u32 tx_good_frames;
  370. u32 tx_broadcast_frames;
  371. u32 tx_multicast_frames;
  372. u32 tx_pause_frames; /* slave */
  373. u32 tx_deferred_frames; /* slave */
  374. u32 tx_collision_frames; /* slave */
  375. u32 tx_single_coll_frames; /* slave */
  376. u32 tx_mult_coll_frames; /* slave */
  377. u32 tx_excessive_collisions; /* slave */
  378. u32 tx_late_collisions; /* slave */
  379. u32 rx_ipg_error; /* slave 10G only */
  380. u32 tx_carrier_sense_errors; /* slave */
  381. u32 tx_bytes;
  382. u32 tx_64B_frames;
  383. u32 tx_65_to_127B_frames;
  384. u32 tx_128_to_255B_frames;
  385. u32 tx_256_to_511B_frames;
  386. u32 tx_512_to_1023B_frames;
  387. u32 tx_1024B_frames;
  388. u32 net_bytes;
  389. u32 rx_bottom_fifo_drop;
  390. u32 rx_port_mask_drop;
  391. u32 rx_top_fifo_drop;
  392. u32 ale_rate_limit_drop;
  393. u32 ale_vid_ingress_drop;
  394. u32 ale_da_eq_sa_drop;
  395. u32 __rsvd_0[3];
  396. u32 ale_unknown_ucast;
  397. u32 ale_unknown_ucast_bytes;
  398. u32 ale_unknown_mcast;
  399. u32 ale_unknown_mcast_bytes;
  400. u32 ale_unknown_bcast;
  401. u32 ale_unknown_bcast_bytes;
  402. u32 ale_pol_match;
  403. u32 ale_pol_match_red; /* NU */
  404. u32 ale_pol_match_yellow; /* NU */
  405. u32 __rsvd_1[44];
  406. u32 tx_mem_protect_err;
  407. /* following NU only */
  408. u32 tx_pri0;
  409. u32 tx_pri1;
  410. u32 tx_pri2;
  411. u32 tx_pri3;
  412. u32 tx_pri4;
  413. u32 tx_pri5;
  414. u32 tx_pri6;
  415. u32 tx_pri7;
  416. u32 tx_pri0_bcnt;
  417. u32 tx_pri1_bcnt;
  418. u32 tx_pri2_bcnt;
  419. u32 tx_pri3_bcnt;
  420. u32 tx_pri4_bcnt;
  421. u32 tx_pri5_bcnt;
  422. u32 tx_pri6_bcnt;
  423. u32 tx_pri7_bcnt;
  424. u32 tx_pri0_drop;
  425. u32 tx_pri1_drop;
  426. u32 tx_pri2_drop;
  427. u32 tx_pri3_drop;
  428. u32 tx_pri4_drop;
  429. u32 tx_pri5_drop;
  430. u32 tx_pri6_drop;
  431. u32 tx_pri7_drop;
  432. u32 tx_pri0_drop_bcnt;
  433. u32 tx_pri1_drop_bcnt;
  434. u32 tx_pri2_drop_bcnt;
  435. u32 tx_pri3_drop_bcnt;
  436. u32 tx_pri4_drop_bcnt;
  437. u32 tx_pri5_drop_bcnt;
  438. u32 tx_pri6_drop_bcnt;
  439. u32 tx_pri7_drop_bcnt;
  440. };
  441. #define GBENU_HW_STATS_REG_MAP_SZ 0x200
  442. struct gbe_ss_regs {
  443. u32 id_ver;
  444. u32 synce_count;
  445. u32 synce_mux;
  446. };
  447. struct gbe_ss_regs_ofs {
  448. u16 id_ver;
  449. u16 control;
  450. };
  451. struct gbe_switch_regs {
  452. u32 id_ver;
  453. u32 control;
  454. u32 soft_reset;
  455. u32 stat_port_en;
  456. u32 ptype;
  457. u32 soft_idle;
  458. u32 thru_rate;
  459. u32 gap_thresh;
  460. u32 tx_start_wds;
  461. u32 flow_control;
  462. };
  463. struct gbe_switch_regs_ofs {
  464. u16 id_ver;
  465. u16 control;
  466. u16 soft_reset;
  467. u16 emcontrol;
  468. u16 stat_port_en;
  469. u16 ptype;
  470. u16 flow_control;
  471. };
  472. struct gbe_port_regs {
  473. u32 max_blks;
  474. u32 blk_cnt;
  475. u32 port_vlan;
  476. u32 tx_pri_map;
  477. u32 sa_lo;
  478. u32 sa_hi;
  479. u32 ts_ctl;
  480. u32 ts_seq_ltype;
  481. u32 ts_vlan;
  482. u32 ts_ctl_ltype2;
  483. u32 ts_ctl2;
  484. };
  485. struct gbe_port_regs_ofs {
  486. u16 port_vlan;
  487. u16 tx_pri_map;
  488. u16 sa_lo;
  489. u16 sa_hi;
  490. u16 ts_ctl;
  491. u16 ts_seq_ltype;
  492. u16 ts_vlan;
  493. u16 ts_ctl_ltype2;
  494. u16 ts_ctl2;
  495. u16 rx_maxlen; /* 2U, NU */
  496. };
  497. struct gbe_host_port_regs {
  498. u32 src_id;
  499. u32 port_vlan;
  500. u32 rx_pri_map;
  501. u32 rx_maxlen;
  502. };
  503. struct gbe_host_port_regs_ofs {
  504. u16 port_vlan;
  505. u16 tx_pri_map;
  506. u16 rx_maxlen;
  507. };
  508. struct gbe_emac_regs {
  509. u32 id_ver;
  510. u32 mac_control;
  511. u32 mac_status;
  512. u32 soft_reset;
  513. u32 rx_maxlen;
  514. u32 __reserved_0;
  515. u32 rx_pause;
  516. u32 tx_pause;
  517. u32 __reserved_1;
  518. u32 rx_pri_map;
  519. u32 rsvd[6];
  520. };
  521. struct gbe_emac_regs_ofs {
  522. u16 mac_control;
  523. u16 soft_reset;
  524. u16 rx_maxlen;
  525. };
  526. struct gbe_hw_stats {
  527. u32 rx_good_frames;
  528. u32 rx_broadcast_frames;
  529. u32 rx_multicast_frames;
  530. u32 rx_pause_frames;
  531. u32 rx_crc_errors;
  532. u32 rx_align_code_errors;
  533. u32 rx_oversized_frames;
  534. u32 rx_jabber_frames;
  535. u32 rx_undersized_frames;
  536. u32 rx_fragments;
  537. u32 __pad_0[2];
  538. u32 rx_bytes;
  539. u32 tx_good_frames;
  540. u32 tx_broadcast_frames;
  541. u32 tx_multicast_frames;
  542. u32 tx_pause_frames;
  543. u32 tx_deferred_frames;
  544. u32 tx_collision_frames;
  545. u32 tx_single_coll_frames;
  546. u32 tx_mult_coll_frames;
  547. u32 tx_excessive_collisions;
  548. u32 tx_late_collisions;
  549. u32 tx_underrun;
  550. u32 tx_carrier_sense_errors;
  551. u32 tx_bytes;
  552. u32 tx_64byte_frames;
  553. u32 tx_65_to_127byte_frames;
  554. u32 tx_128_to_255byte_frames;
  555. u32 tx_256_to_511byte_frames;
  556. u32 tx_512_to_1023byte_frames;
  557. u32 tx_1024byte_frames;
  558. u32 net_bytes;
  559. u32 rx_sof_overruns;
  560. u32 rx_mof_overruns;
  561. u32 rx_dma_overruns;
  562. };
  563. #define GBE_MAX_HW_STAT_MODS 9
  564. #define GBE_HW_STATS_REG_MAP_SZ 0x100
  565. struct gbe_slave {
  566. void __iomem *port_regs;
  567. void __iomem *emac_regs;
  568. struct gbe_port_regs_ofs port_regs_ofs;
  569. struct gbe_emac_regs_ofs emac_regs_ofs;
  570. int slave_num; /* 0 based logical number */
  571. int port_num; /* actual port number */
  572. atomic_t link_state;
  573. bool open;
  574. struct phy_device *phy;
  575. u32 link_interface;
  576. u32 mac_control;
  577. u8 phy_port_t;
  578. struct device_node *phy_node;
  579. struct list_head slave_list;
  580. };
  581. struct gbe_priv {
  582. struct device *dev;
  583. struct netcp_device *netcp_device;
  584. struct timer_list timer;
  585. u32 num_slaves;
  586. u32 ale_entries;
  587. u32 ale_ports;
  588. bool enable_ale;
  589. u8 max_num_slaves;
  590. u8 max_num_ports; /* max_num_slaves + 1 */
  591. u8 num_stats_mods;
  592. struct netcp_tx_pipe tx_pipe;
  593. int host_port;
  594. u32 rx_packet_max;
  595. u32 ss_version;
  596. u32 stats_en_mask;
  597. void __iomem *ss_regs;
  598. void __iomem *switch_regs;
  599. void __iomem *host_port_regs;
  600. void __iomem *ale_reg;
  601. void __iomem *sgmii_port_regs;
  602. void __iomem *sgmii_port34_regs;
  603. void __iomem *xgbe_serdes_regs;
  604. void __iomem *hw_stats_regs[GBE_MAX_HW_STAT_MODS];
  605. struct gbe_ss_regs_ofs ss_regs_ofs;
  606. struct gbe_switch_regs_ofs switch_regs_ofs;
  607. struct gbe_host_port_regs_ofs host_port_regs_ofs;
  608. struct cpsw_ale *ale;
  609. unsigned int tx_queue_id;
  610. const char *dma_chan_name;
  611. struct list_head gbe_intf_head;
  612. struct list_head secondary_slaves;
  613. struct net_device *dummy_ndev;
  614. u64 *hw_stats;
  615. u32 *hw_stats_prev;
  616. const struct netcp_ethtool_stat *et_stats;
  617. int num_et_stats;
  618. /* Lock for updating the hwstats */
  619. spinlock_t hw_stats_lock;
  620. };
  621. struct gbe_intf {
  622. struct net_device *ndev;
  623. struct device *dev;
  624. struct gbe_priv *gbe_dev;
  625. struct netcp_tx_pipe tx_pipe;
  626. struct gbe_slave *slave;
  627. struct list_head gbe_intf_list;
  628. unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
  629. };
  630. static struct netcp_module gbe_module;
  631. static struct netcp_module xgbe_module;
  632. /* Statistic management */
  633. struct netcp_ethtool_stat {
  634. char desc[ETH_GSTRING_LEN];
  635. int type;
  636. u32 size;
  637. int offset;
  638. };
  639. #define GBE_STATSA_INFO(field) \
  640. { \
  641. "GBE_A:"#field, GBE_STATSA_MODULE, \
  642. FIELD_SIZEOF(struct gbe_hw_stats, field), \
  643. offsetof(struct gbe_hw_stats, field) \
  644. }
  645. #define GBE_STATSB_INFO(field) \
  646. { \
  647. "GBE_B:"#field, GBE_STATSB_MODULE, \
  648. FIELD_SIZEOF(struct gbe_hw_stats, field), \
  649. offsetof(struct gbe_hw_stats, field) \
  650. }
  651. #define GBE_STATSC_INFO(field) \
  652. { \
  653. "GBE_C:"#field, GBE_STATSC_MODULE, \
  654. FIELD_SIZEOF(struct gbe_hw_stats, field), \
  655. offsetof(struct gbe_hw_stats, field) \
  656. }
  657. #define GBE_STATSD_INFO(field) \
  658. { \
  659. "GBE_D:"#field, GBE_STATSD_MODULE, \
  660. FIELD_SIZEOF(struct gbe_hw_stats, field), \
  661. offsetof(struct gbe_hw_stats, field) \
  662. }
  663. static const struct netcp_ethtool_stat gbe13_et_stats[] = {
  664. /* GBE module A */
  665. GBE_STATSA_INFO(rx_good_frames),
  666. GBE_STATSA_INFO(rx_broadcast_frames),
  667. GBE_STATSA_INFO(rx_multicast_frames),
  668. GBE_STATSA_INFO(rx_pause_frames),
  669. GBE_STATSA_INFO(rx_crc_errors),
  670. GBE_STATSA_INFO(rx_align_code_errors),
  671. GBE_STATSA_INFO(rx_oversized_frames),
  672. GBE_STATSA_INFO(rx_jabber_frames),
  673. GBE_STATSA_INFO(rx_undersized_frames),
  674. GBE_STATSA_INFO(rx_fragments),
  675. GBE_STATSA_INFO(rx_bytes),
  676. GBE_STATSA_INFO(tx_good_frames),
  677. GBE_STATSA_INFO(tx_broadcast_frames),
  678. GBE_STATSA_INFO(tx_multicast_frames),
  679. GBE_STATSA_INFO(tx_pause_frames),
  680. GBE_STATSA_INFO(tx_deferred_frames),
  681. GBE_STATSA_INFO(tx_collision_frames),
  682. GBE_STATSA_INFO(tx_single_coll_frames),
  683. GBE_STATSA_INFO(tx_mult_coll_frames),
  684. GBE_STATSA_INFO(tx_excessive_collisions),
  685. GBE_STATSA_INFO(tx_late_collisions),
  686. GBE_STATSA_INFO(tx_underrun),
  687. GBE_STATSA_INFO(tx_carrier_sense_errors),
  688. GBE_STATSA_INFO(tx_bytes),
  689. GBE_STATSA_INFO(tx_64byte_frames),
  690. GBE_STATSA_INFO(tx_65_to_127byte_frames),
  691. GBE_STATSA_INFO(tx_128_to_255byte_frames),
  692. GBE_STATSA_INFO(tx_256_to_511byte_frames),
  693. GBE_STATSA_INFO(tx_512_to_1023byte_frames),
  694. GBE_STATSA_INFO(tx_1024byte_frames),
  695. GBE_STATSA_INFO(net_bytes),
  696. GBE_STATSA_INFO(rx_sof_overruns),
  697. GBE_STATSA_INFO(rx_mof_overruns),
  698. GBE_STATSA_INFO(rx_dma_overruns),
  699. /* GBE module B */
  700. GBE_STATSB_INFO(rx_good_frames),
  701. GBE_STATSB_INFO(rx_broadcast_frames),
  702. GBE_STATSB_INFO(rx_multicast_frames),
  703. GBE_STATSB_INFO(rx_pause_frames),
  704. GBE_STATSB_INFO(rx_crc_errors),
  705. GBE_STATSB_INFO(rx_align_code_errors),
  706. GBE_STATSB_INFO(rx_oversized_frames),
  707. GBE_STATSB_INFO(rx_jabber_frames),
  708. GBE_STATSB_INFO(rx_undersized_frames),
  709. GBE_STATSB_INFO(rx_fragments),
  710. GBE_STATSB_INFO(rx_bytes),
  711. GBE_STATSB_INFO(tx_good_frames),
  712. GBE_STATSB_INFO(tx_broadcast_frames),
  713. GBE_STATSB_INFO(tx_multicast_frames),
  714. GBE_STATSB_INFO(tx_pause_frames),
  715. GBE_STATSB_INFO(tx_deferred_frames),
  716. GBE_STATSB_INFO(tx_collision_frames),
  717. GBE_STATSB_INFO(tx_single_coll_frames),
  718. GBE_STATSB_INFO(tx_mult_coll_frames),
  719. GBE_STATSB_INFO(tx_excessive_collisions),
  720. GBE_STATSB_INFO(tx_late_collisions),
  721. GBE_STATSB_INFO(tx_underrun),
  722. GBE_STATSB_INFO(tx_carrier_sense_errors),
  723. GBE_STATSB_INFO(tx_bytes),
  724. GBE_STATSB_INFO(tx_64byte_frames),
  725. GBE_STATSB_INFO(tx_65_to_127byte_frames),
  726. GBE_STATSB_INFO(tx_128_to_255byte_frames),
  727. GBE_STATSB_INFO(tx_256_to_511byte_frames),
  728. GBE_STATSB_INFO(tx_512_to_1023byte_frames),
  729. GBE_STATSB_INFO(tx_1024byte_frames),
  730. GBE_STATSB_INFO(net_bytes),
  731. GBE_STATSB_INFO(rx_sof_overruns),
  732. GBE_STATSB_INFO(rx_mof_overruns),
  733. GBE_STATSB_INFO(rx_dma_overruns),
  734. /* GBE module C */
  735. GBE_STATSC_INFO(rx_good_frames),
  736. GBE_STATSC_INFO(rx_broadcast_frames),
  737. GBE_STATSC_INFO(rx_multicast_frames),
  738. GBE_STATSC_INFO(rx_pause_frames),
  739. GBE_STATSC_INFO(rx_crc_errors),
  740. GBE_STATSC_INFO(rx_align_code_errors),
  741. GBE_STATSC_INFO(rx_oversized_frames),
  742. GBE_STATSC_INFO(rx_jabber_frames),
  743. GBE_STATSC_INFO(rx_undersized_frames),
  744. GBE_STATSC_INFO(rx_fragments),
  745. GBE_STATSC_INFO(rx_bytes),
  746. GBE_STATSC_INFO(tx_good_frames),
  747. GBE_STATSC_INFO(tx_broadcast_frames),
  748. GBE_STATSC_INFO(tx_multicast_frames),
  749. GBE_STATSC_INFO(tx_pause_frames),
  750. GBE_STATSC_INFO(tx_deferred_frames),
  751. GBE_STATSC_INFO(tx_collision_frames),
  752. GBE_STATSC_INFO(tx_single_coll_frames),
  753. GBE_STATSC_INFO(tx_mult_coll_frames),
  754. GBE_STATSC_INFO(tx_excessive_collisions),
  755. GBE_STATSC_INFO(tx_late_collisions),
  756. GBE_STATSC_INFO(tx_underrun),
  757. GBE_STATSC_INFO(tx_carrier_sense_errors),
  758. GBE_STATSC_INFO(tx_bytes),
  759. GBE_STATSC_INFO(tx_64byte_frames),
  760. GBE_STATSC_INFO(tx_65_to_127byte_frames),
  761. GBE_STATSC_INFO(tx_128_to_255byte_frames),
  762. GBE_STATSC_INFO(tx_256_to_511byte_frames),
  763. GBE_STATSC_INFO(tx_512_to_1023byte_frames),
  764. GBE_STATSC_INFO(tx_1024byte_frames),
  765. GBE_STATSC_INFO(net_bytes),
  766. GBE_STATSC_INFO(rx_sof_overruns),
  767. GBE_STATSC_INFO(rx_mof_overruns),
  768. GBE_STATSC_INFO(rx_dma_overruns),
  769. /* GBE module D */
  770. GBE_STATSD_INFO(rx_good_frames),
  771. GBE_STATSD_INFO(rx_broadcast_frames),
  772. GBE_STATSD_INFO(rx_multicast_frames),
  773. GBE_STATSD_INFO(rx_pause_frames),
  774. GBE_STATSD_INFO(rx_crc_errors),
  775. GBE_STATSD_INFO(rx_align_code_errors),
  776. GBE_STATSD_INFO(rx_oversized_frames),
  777. GBE_STATSD_INFO(rx_jabber_frames),
  778. GBE_STATSD_INFO(rx_undersized_frames),
  779. GBE_STATSD_INFO(rx_fragments),
  780. GBE_STATSD_INFO(rx_bytes),
  781. GBE_STATSD_INFO(tx_good_frames),
  782. GBE_STATSD_INFO(tx_broadcast_frames),
  783. GBE_STATSD_INFO(tx_multicast_frames),
  784. GBE_STATSD_INFO(tx_pause_frames),
  785. GBE_STATSD_INFO(tx_deferred_frames),
  786. GBE_STATSD_INFO(tx_collision_frames),
  787. GBE_STATSD_INFO(tx_single_coll_frames),
  788. GBE_STATSD_INFO(tx_mult_coll_frames),
  789. GBE_STATSD_INFO(tx_excessive_collisions),
  790. GBE_STATSD_INFO(tx_late_collisions),
  791. GBE_STATSD_INFO(tx_underrun),
  792. GBE_STATSD_INFO(tx_carrier_sense_errors),
  793. GBE_STATSD_INFO(tx_bytes),
  794. GBE_STATSD_INFO(tx_64byte_frames),
  795. GBE_STATSD_INFO(tx_65_to_127byte_frames),
  796. GBE_STATSD_INFO(tx_128_to_255byte_frames),
  797. GBE_STATSD_INFO(tx_256_to_511byte_frames),
  798. GBE_STATSD_INFO(tx_512_to_1023byte_frames),
  799. GBE_STATSD_INFO(tx_1024byte_frames),
  800. GBE_STATSD_INFO(net_bytes),
  801. GBE_STATSD_INFO(rx_sof_overruns),
  802. GBE_STATSD_INFO(rx_mof_overruns),
  803. GBE_STATSD_INFO(rx_dma_overruns),
  804. };
  805. /* This is the size of entries in GBENU_STATS_HOST */
  806. #define GBENU_ET_STATS_HOST_SIZE 52
  807. #define GBENU_STATS_HOST(field) \
  808. { \
  809. "GBE_HOST:"#field, GBENU_STATS0_MODULE, \
  810. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  811. offsetof(struct gbenu_hw_stats, field) \
  812. }
  813. /* This is the size of entries in GBENU_STATS_PORT */
  814. #define GBENU_ET_STATS_PORT_SIZE 65
  815. #define GBENU_STATS_P1(field) \
  816. { \
  817. "GBE_P1:"#field, GBENU_STATS1_MODULE, \
  818. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  819. offsetof(struct gbenu_hw_stats, field) \
  820. }
  821. #define GBENU_STATS_P2(field) \
  822. { \
  823. "GBE_P2:"#field, GBENU_STATS2_MODULE, \
  824. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  825. offsetof(struct gbenu_hw_stats, field) \
  826. }
  827. #define GBENU_STATS_P3(field) \
  828. { \
  829. "GBE_P3:"#field, GBENU_STATS3_MODULE, \
  830. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  831. offsetof(struct gbenu_hw_stats, field) \
  832. }
  833. #define GBENU_STATS_P4(field) \
  834. { \
  835. "GBE_P4:"#field, GBENU_STATS4_MODULE, \
  836. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  837. offsetof(struct gbenu_hw_stats, field) \
  838. }
  839. #define GBENU_STATS_P5(field) \
  840. { \
  841. "GBE_P5:"#field, GBENU_STATS5_MODULE, \
  842. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  843. offsetof(struct gbenu_hw_stats, field) \
  844. }
  845. #define GBENU_STATS_P6(field) \
  846. { \
  847. "GBE_P6:"#field, GBENU_STATS6_MODULE, \
  848. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  849. offsetof(struct gbenu_hw_stats, field) \
  850. }
  851. #define GBENU_STATS_P7(field) \
  852. { \
  853. "GBE_P7:"#field, GBENU_STATS7_MODULE, \
  854. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  855. offsetof(struct gbenu_hw_stats, field) \
  856. }
  857. #define GBENU_STATS_P8(field) \
  858. { \
  859. "GBE_P8:"#field, GBENU_STATS8_MODULE, \
  860. FIELD_SIZEOF(struct gbenu_hw_stats, field), \
  861. offsetof(struct gbenu_hw_stats, field) \
  862. }
  863. static const struct netcp_ethtool_stat gbenu_et_stats[] = {
  864. /* GBENU Host Module */
  865. GBENU_STATS_HOST(rx_good_frames),
  866. GBENU_STATS_HOST(rx_broadcast_frames),
  867. GBENU_STATS_HOST(rx_multicast_frames),
  868. GBENU_STATS_HOST(rx_crc_errors),
  869. GBENU_STATS_HOST(rx_oversized_frames),
  870. GBENU_STATS_HOST(rx_undersized_frames),
  871. GBENU_STATS_HOST(ale_drop),
  872. GBENU_STATS_HOST(ale_overrun_drop),
  873. GBENU_STATS_HOST(rx_bytes),
  874. GBENU_STATS_HOST(tx_good_frames),
  875. GBENU_STATS_HOST(tx_broadcast_frames),
  876. GBENU_STATS_HOST(tx_multicast_frames),
  877. GBENU_STATS_HOST(tx_bytes),
  878. GBENU_STATS_HOST(tx_64B_frames),
  879. GBENU_STATS_HOST(tx_65_to_127B_frames),
  880. GBENU_STATS_HOST(tx_128_to_255B_frames),
  881. GBENU_STATS_HOST(tx_256_to_511B_frames),
  882. GBENU_STATS_HOST(tx_512_to_1023B_frames),
  883. GBENU_STATS_HOST(tx_1024B_frames),
  884. GBENU_STATS_HOST(net_bytes),
  885. GBENU_STATS_HOST(rx_bottom_fifo_drop),
  886. GBENU_STATS_HOST(rx_port_mask_drop),
  887. GBENU_STATS_HOST(rx_top_fifo_drop),
  888. GBENU_STATS_HOST(ale_rate_limit_drop),
  889. GBENU_STATS_HOST(ale_vid_ingress_drop),
  890. GBENU_STATS_HOST(ale_da_eq_sa_drop),
  891. GBENU_STATS_HOST(ale_unknown_ucast),
  892. GBENU_STATS_HOST(ale_unknown_ucast_bytes),
  893. GBENU_STATS_HOST(ale_unknown_mcast),
  894. GBENU_STATS_HOST(ale_unknown_mcast_bytes),
  895. GBENU_STATS_HOST(ale_unknown_bcast),
  896. GBENU_STATS_HOST(ale_unknown_bcast_bytes),
  897. GBENU_STATS_HOST(ale_pol_match),
  898. GBENU_STATS_HOST(ale_pol_match_red),
  899. GBENU_STATS_HOST(ale_pol_match_yellow),
  900. GBENU_STATS_HOST(tx_mem_protect_err),
  901. GBENU_STATS_HOST(tx_pri0_drop),
  902. GBENU_STATS_HOST(tx_pri1_drop),
  903. GBENU_STATS_HOST(tx_pri2_drop),
  904. GBENU_STATS_HOST(tx_pri3_drop),
  905. GBENU_STATS_HOST(tx_pri4_drop),
  906. GBENU_STATS_HOST(tx_pri5_drop),
  907. GBENU_STATS_HOST(tx_pri6_drop),
  908. GBENU_STATS_HOST(tx_pri7_drop),
  909. GBENU_STATS_HOST(tx_pri0_drop_bcnt),
  910. GBENU_STATS_HOST(tx_pri1_drop_bcnt),
  911. GBENU_STATS_HOST(tx_pri2_drop_bcnt),
  912. GBENU_STATS_HOST(tx_pri3_drop_bcnt),
  913. GBENU_STATS_HOST(tx_pri4_drop_bcnt),
  914. GBENU_STATS_HOST(tx_pri5_drop_bcnt),
  915. GBENU_STATS_HOST(tx_pri6_drop_bcnt),
  916. GBENU_STATS_HOST(tx_pri7_drop_bcnt),
  917. /* GBENU Module 1 */
  918. GBENU_STATS_P1(rx_good_frames),
  919. GBENU_STATS_P1(rx_broadcast_frames),
  920. GBENU_STATS_P1(rx_multicast_frames),
  921. GBENU_STATS_P1(rx_pause_frames),
  922. GBENU_STATS_P1(rx_crc_errors),
  923. GBENU_STATS_P1(rx_align_code_errors),
  924. GBENU_STATS_P1(rx_oversized_frames),
  925. GBENU_STATS_P1(rx_jabber_frames),
  926. GBENU_STATS_P1(rx_undersized_frames),
  927. GBENU_STATS_P1(rx_fragments),
  928. GBENU_STATS_P1(ale_drop),
  929. GBENU_STATS_P1(ale_overrun_drop),
  930. GBENU_STATS_P1(rx_bytes),
  931. GBENU_STATS_P1(tx_good_frames),
  932. GBENU_STATS_P1(tx_broadcast_frames),
  933. GBENU_STATS_P1(tx_multicast_frames),
  934. GBENU_STATS_P1(tx_pause_frames),
  935. GBENU_STATS_P1(tx_deferred_frames),
  936. GBENU_STATS_P1(tx_collision_frames),
  937. GBENU_STATS_P1(tx_single_coll_frames),
  938. GBENU_STATS_P1(tx_mult_coll_frames),
  939. GBENU_STATS_P1(tx_excessive_collisions),
  940. GBENU_STATS_P1(tx_late_collisions),
  941. GBENU_STATS_P1(rx_ipg_error),
  942. GBENU_STATS_P1(tx_carrier_sense_errors),
  943. GBENU_STATS_P1(tx_bytes),
  944. GBENU_STATS_P1(tx_64B_frames),
  945. GBENU_STATS_P1(tx_65_to_127B_frames),
  946. GBENU_STATS_P1(tx_128_to_255B_frames),
  947. GBENU_STATS_P1(tx_256_to_511B_frames),
  948. GBENU_STATS_P1(tx_512_to_1023B_frames),
  949. GBENU_STATS_P1(tx_1024B_frames),
  950. GBENU_STATS_P1(net_bytes),
  951. GBENU_STATS_P1(rx_bottom_fifo_drop),
  952. GBENU_STATS_P1(rx_port_mask_drop),
  953. GBENU_STATS_P1(rx_top_fifo_drop),
  954. GBENU_STATS_P1(ale_rate_limit_drop),
  955. GBENU_STATS_P1(ale_vid_ingress_drop),
  956. GBENU_STATS_P1(ale_da_eq_sa_drop),
  957. GBENU_STATS_P1(ale_unknown_ucast),
  958. GBENU_STATS_P1(ale_unknown_ucast_bytes),
  959. GBENU_STATS_P1(ale_unknown_mcast),
  960. GBENU_STATS_P1(ale_unknown_mcast_bytes),
  961. GBENU_STATS_P1(ale_unknown_bcast),
  962. GBENU_STATS_P1(ale_unknown_bcast_bytes),
  963. GBENU_STATS_P1(ale_pol_match),
  964. GBENU_STATS_P1(ale_pol_match_red),
  965. GBENU_STATS_P1(ale_pol_match_yellow),
  966. GBENU_STATS_P1(tx_mem_protect_err),
  967. GBENU_STATS_P1(tx_pri0_drop),
  968. GBENU_STATS_P1(tx_pri1_drop),
  969. GBENU_STATS_P1(tx_pri2_drop),
  970. GBENU_STATS_P1(tx_pri3_drop),
  971. GBENU_STATS_P1(tx_pri4_drop),
  972. GBENU_STATS_P1(tx_pri5_drop),
  973. GBENU_STATS_P1(tx_pri6_drop),
  974. GBENU_STATS_P1(tx_pri7_drop),
  975. GBENU_STATS_P1(tx_pri0_drop_bcnt),
  976. GBENU_STATS_P1(tx_pri1_drop_bcnt),
  977. GBENU_STATS_P1(tx_pri2_drop_bcnt),
  978. GBENU_STATS_P1(tx_pri3_drop_bcnt),
  979. GBENU_STATS_P1(tx_pri4_drop_bcnt),
  980. GBENU_STATS_P1(tx_pri5_drop_bcnt),
  981. GBENU_STATS_P1(tx_pri6_drop_bcnt),
  982. GBENU_STATS_P1(tx_pri7_drop_bcnt),
  983. /* GBENU Module 2 */
  984. GBENU_STATS_P2(rx_good_frames),
  985. GBENU_STATS_P2(rx_broadcast_frames),
  986. GBENU_STATS_P2(rx_multicast_frames),
  987. GBENU_STATS_P2(rx_pause_frames),
  988. GBENU_STATS_P2(rx_crc_errors),
  989. GBENU_STATS_P2(rx_align_code_errors),
  990. GBENU_STATS_P2(rx_oversized_frames),
  991. GBENU_STATS_P2(rx_jabber_frames),
  992. GBENU_STATS_P2(rx_undersized_frames),
  993. GBENU_STATS_P2(rx_fragments),
  994. GBENU_STATS_P2(ale_drop),
  995. GBENU_STATS_P2(ale_overrun_drop),
  996. GBENU_STATS_P2(rx_bytes),
  997. GBENU_STATS_P2(tx_good_frames),
  998. GBENU_STATS_P2(tx_broadcast_frames),
  999. GBENU_STATS_P2(tx_multicast_frames),
  1000. GBENU_STATS_P2(tx_pause_frames),
  1001. GBENU_STATS_P2(tx_deferred_frames),
  1002. GBENU_STATS_P2(tx_collision_frames),
  1003. GBENU_STATS_P2(tx_single_coll_frames),
  1004. GBENU_STATS_P2(tx_mult_coll_frames),
  1005. GBENU_STATS_P2(tx_excessive_collisions),
  1006. GBENU_STATS_P2(tx_late_collisions),
  1007. GBENU_STATS_P2(rx_ipg_error),
  1008. GBENU_STATS_P2(tx_carrier_sense_errors),
  1009. GBENU_STATS_P2(tx_bytes),
  1010. GBENU_STATS_P2(tx_64B_frames),
  1011. GBENU_STATS_P2(tx_65_to_127B_frames),
  1012. GBENU_STATS_P2(tx_128_to_255B_frames),
  1013. GBENU_STATS_P2(tx_256_to_511B_frames),
  1014. GBENU_STATS_P2(tx_512_to_1023B_frames),
  1015. GBENU_STATS_P2(tx_1024B_frames),
  1016. GBENU_STATS_P2(net_bytes),
  1017. GBENU_STATS_P2(rx_bottom_fifo_drop),
  1018. GBENU_STATS_P2(rx_port_mask_drop),
  1019. GBENU_STATS_P2(rx_top_fifo_drop),
  1020. GBENU_STATS_P2(ale_rate_limit_drop),
  1021. GBENU_STATS_P2(ale_vid_ingress_drop),
  1022. GBENU_STATS_P2(ale_da_eq_sa_drop),
  1023. GBENU_STATS_P2(ale_unknown_ucast),
  1024. GBENU_STATS_P2(ale_unknown_ucast_bytes),
  1025. GBENU_STATS_P2(ale_unknown_mcast),
  1026. GBENU_STATS_P2(ale_unknown_mcast_bytes),
  1027. GBENU_STATS_P2(ale_unknown_bcast),
  1028. GBENU_STATS_P2(ale_unknown_bcast_bytes),
  1029. GBENU_STATS_P2(ale_pol_match),
  1030. GBENU_STATS_P2(ale_pol_match_red),
  1031. GBENU_STATS_P2(ale_pol_match_yellow),
  1032. GBENU_STATS_P2(tx_mem_protect_err),
  1033. GBENU_STATS_P2(tx_pri0_drop),
  1034. GBENU_STATS_P2(tx_pri1_drop),
  1035. GBENU_STATS_P2(tx_pri2_drop),
  1036. GBENU_STATS_P2(tx_pri3_drop),
  1037. GBENU_STATS_P2(tx_pri4_drop),
  1038. GBENU_STATS_P2(tx_pri5_drop),
  1039. GBENU_STATS_P2(tx_pri6_drop),
  1040. GBENU_STATS_P2(tx_pri7_drop),
  1041. GBENU_STATS_P2(tx_pri0_drop_bcnt),
  1042. GBENU_STATS_P2(tx_pri1_drop_bcnt),
  1043. GBENU_STATS_P2(tx_pri2_drop_bcnt),
  1044. GBENU_STATS_P2(tx_pri3_drop_bcnt),
  1045. GBENU_STATS_P2(tx_pri4_drop_bcnt),
  1046. GBENU_STATS_P2(tx_pri5_drop_bcnt),
  1047. GBENU_STATS_P2(tx_pri6_drop_bcnt),
  1048. GBENU_STATS_P2(tx_pri7_drop_bcnt),
  1049. /* GBENU Module 3 */
  1050. GBENU_STATS_P3(rx_good_frames),
  1051. GBENU_STATS_P3(rx_broadcast_frames),
  1052. GBENU_STATS_P3(rx_multicast_frames),
  1053. GBENU_STATS_P3(rx_pause_frames),
  1054. GBENU_STATS_P3(rx_crc_errors),
  1055. GBENU_STATS_P3(rx_align_code_errors),
  1056. GBENU_STATS_P3(rx_oversized_frames),
  1057. GBENU_STATS_P3(rx_jabber_frames),
  1058. GBENU_STATS_P3(rx_undersized_frames),
  1059. GBENU_STATS_P3(rx_fragments),
  1060. GBENU_STATS_P3(ale_drop),
  1061. GBENU_STATS_P3(ale_overrun_drop),
  1062. GBENU_STATS_P3(rx_bytes),
  1063. GBENU_STATS_P3(tx_good_frames),
  1064. GBENU_STATS_P3(tx_broadcast_frames),
  1065. GBENU_STATS_P3(tx_multicast_frames),
  1066. GBENU_STATS_P3(tx_pause_frames),
  1067. GBENU_STATS_P3(tx_deferred_frames),
  1068. GBENU_STATS_P3(tx_collision_frames),
  1069. GBENU_STATS_P3(tx_single_coll_frames),
  1070. GBENU_STATS_P3(tx_mult_coll_frames),
  1071. GBENU_STATS_P3(tx_excessive_collisions),
  1072. GBENU_STATS_P3(tx_late_collisions),
  1073. GBENU_STATS_P3(rx_ipg_error),
  1074. GBENU_STATS_P3(tx_carrier_sense_errors),
  1075. GBENU_STATS_P3(tx_bytes),
  1076. GBENU_STATS_P3(tx_64B_frames),
  1077. GBENU_STATS_P3(tx_65_to_127B_frames),
  1078. GBENU_STATS_P3(tx_128_to_255B_frames),
  1079. GBENU_STATS_P3(tx_256_to_511B_frames),
  1080. GBENU_STATS_P3(tx_512_to_1023B_frames),
  1081. GBENU_STATS_P3(tx_1024B_frames),
  1082. GBENU_STATS_P3(net_bytes),
  1083. GBENU_STATS_P3(rx_bottom_fifo_drop),
  1084. GBENU_STATS_P3(rx_port_mask_drop),
  1085. GBENU_STATS_P3(rx_top_fifo_drop),
  1086. GBENU_STATS_P3(ale_rate_limit_drop),
  1087. GBENU_STATS_P3(ale_vid_ingress_drop),
  1088. GBENU_STATS_P3(ale_da_eq_sa_drop),
  1089. GBENU_STATS_P3(ale_unknown_ucast),
  1090. GBENU_STATS_P3(ale_unknown_ucast_bytes),
  1091. GBENU_STATS_P3(ale_unknown_mcast),
  1092. GBENU_STATS_P3(ale_unknown_mcast_bytes),
  1093. GBENU_STATS_P3(ale_unknown_bcast),
  1094. GBENU_STATS_P3(ale_unknown_bcast_bytes),
  1095. GBENU_STATS_P3(ale_pol_match),
  1096. GBENU_STATS_P3(ale_pol_match_red),
  1097. GBENU_STATS_P3(ale_pol_match_yellow),
  1098. GBENU_STATS_P3(tx_mem_protect_err),
  1099. GBENU_STATS_P3(tx_pri0_drop),
  1100. GBENU_STATS_P3(tx_pri1_drop),
  1101. GBENU_STATS_P3(tx_pri2_drop),
  1102. GBENU_STATS_P3(tx_pri3_drop),
  1103. GBENU_STATS_P3(tx_pri4_drop),
  1104. GBENU_STATS_P3(tx_pri5_drop),
  1105. GBENU_STATS_P3(tx_pri6_drop),
  1106. GBENU_STATS_P3(tx_pri7_drop),
  1107. GBENU_STATS_P3(tx_pri0_drop_bcnt),
  1108. GBENU_STATS_P3(tx_pri1_drop_bcnt),
  1109. GBENU_STATS_P3(tx_pri2_drop_bcnt),
  1110. GBENU_STATS_P3(tx_pri3_drop_bcnt),
  1111. GBENU_STATS_P3(tx_pri4_drop_bcnt),
  1112. GBENU_STATS_P3(tx_pri5_drop_bcnt),
  1113. GBENU_STATS_P3(tx_pri6_drop_bcnt),
  1114. GBENU_STATS_P3(tx_pri7_drop_bcnt),
  1115. /* GBENU Module 4 */
  1116. GBENU_STATS_P4(rx_good_frames),
  1117. GBENU_STATS_P4(rx_broadcast_frames),
  1118. GBENU_STATS_P4(rx_multicast_frames),
  1119. GBENU_STATS_P4(rx_pause_frames),
  1120. GBENU_STATS_P4(rx_crc_errors),
  1121. GBENU_STATS_P4(rx_align_code_errors),
  1122. GBENU_STATS_P4(rx_oversized_frames),
  1123. GBENU_STATS_P4(rx_jabber_frames),
  1124. GBENU_STATS_P4(rx_undersized_frames),
  1125. GBENU_STATS_P4(rx_fragments),
  1126. GBENU_STATS_P4(ale_drop),
  1127. GBENU_STATS_P4(ale_overrun_drop),
  1128. GBENU_STATS_P4(rx_bytes),
  1129. GBENU_STATS_P4(tx_good_frames),
  1130. GBENU_STATS_P4(tx_broadcast_frames),
  1131. GBENU_STATS_P4(tx_multicast_frames),
  1132. GBENU_STATS_P4(tx_pause_frames),
  1133. GBENU_STATS_P4(tx_deferred_frames),
  1134. GBENU_STATS_P4(tx_collision_frames),
  1135. GBENU_STATS_P4(tx_single_coll_frames),
  1136. GBENU_STATS_P4(tx_mult_coll_frames),
  1137. GBENU_STATS_P4(tx_excessive_collisions),
  1138. GBENU_STATS_P4(tx_late_collisions),
  1139. GBENU_STATS_P4(rx_ipg_error),
  1140. GBENU_STATS_P4(tx_carrier_sense_errors),
  1141. GBENU_STATS_P4(tx_bytes),
  1142. GBENU_STATS_P4(tx_64B_frames),
  1143. GBENU_STATS_P4(tx_65_to_127B_frames),
  1144. GBENU_STATS_P4(tx_128_to_255B_frames),
  1145. GBENU_STATS_P4(tx_256_to_511B_frames),
  1146. GBENU_STATS_P4(tx_512_to_1023B_frames),
  1147. GBENU_STATS_P4(tx_1024B_frames),
  1148. GBENU_STATS_P4(net_bytes),
  1149. GBENU_STATS_P4(rx_bottom_fifo_drop),
  1150. GBENU_STATS_P4(rx_port_mask_drop),
  1151. GBENU_STATS_P4(rx_top_fifo_drop),
  1152. GBENU_STATS_P4(ale_rate_limit_drop),
  1153. GBENU_STATS_P4(ale_vid_ingress_drop),
  1154. GBENU_STATS_P4(ale_da_eq_sa_drop),
  1155. GBENU_STATS_P4(ale_unknown_ucast),
  1156. GBENU_STATS_P4(ale_unknown_ucast_bytes),
  1157. GBENU_STATS_P4(ale_unknown_mcast),
  1158. GBENU_STATS_P4(ale_unknown_mcast_bytes),
  1159. GBENU_STATS_P4(ale_unknown_bcast),
  1160. GBENU_STATS_P4(ale_unknown_bcast_bytes),
  1161. GBENU_STATS_P4(ale_pol_match),
  1162. GBENU_STATS_P4(ale_pol_match_red),
  1163. GBENU_STATS_P4(ale_pol_match_yellow),
  1164. GBENU_STATS_P4(tx_mem_protect_err),
  1165. GBENU_STATS_P4(tx_pri0_drop),
  1166. GBENU_STATS_P4(tx_pri1_drop),
  1167. GBENU_STATS_P4(tx_pri2_drop),
  1168. GBENU_STATS_P4(tx_pri3_drop),
  1169. GBENU_STATS_P4(tx_pri4_drop),
  1170. GBENU_STATS_P4(tx_pri5_drop),
  1171. GBENU_STATS_P4(tx_pri6_drop),
  1172. GBENU_STATS_P4(tx_pri7_drop),
  1173. GBENU_STATS_P4(tx_pri0_drop_bcnt),
  1174. GBENU_STATS_P4(tx_pri1_drop_bcnt),
  1175. GBENU_STATS_P4(tx_pri2_drop_bcnt),
  1176. GBENU_STATS_P4(tx_pri3_drop_bcnt),
  1177. GBENU_STATS_P4(tx_pri4_drop_bcnt),
  1178. GBENU_STATS_P4(tx_pri5_drop_bcnt),
  1179. GBENU_STATS_P4(tx_pri6_drop_bcnt),
  1180. GBENU_STATS_P4(tx_pri7_drop_bcnt),
  1181. /* GBENU Module 5 */
  1182. GBENU_STATS_P5(rx_good_frames),
  1183. GBENU_STATS_P5(rx_broadcast_frames),
  1184. GBENU_STATS_P5(rx_multicast_frames),
  1185. GBENU_STATS_P5(rx_pause_frames),
  1186. GBENU_STATS_P5(rx_crc_errors),
  1187. GBENU_STATS_P5(rx_align_code_errors),
  1188. GBENU_STATS_P5(rx_oversized_frames),
  1189. GBENU_STATS_P5(rx_jabber_frames),
  1190. GBENU_STATS_P5(rx_undersized_frames),
  1191. GBENU_STATS_P5(rx_fragments),
  1192. GBENU_STATS_P5(ale_drop),
  1193. GBENU_STATS_P5(ale_overrun_drop),
  1194. GBENU_STATS_P5(rx_bytes),
  1195. GBENU_STATS_P5(tx_good_frames),
  1196. GBENU_STATS_P5(tx_broadcast_frames),
  1197. GBENU_STATS_P5(tx_multicast_frames),
  1198. GBENU_STATS_P5(tx_pause_frames),
  1199. GBENU_STATS_P5(tx_deferred_frames),
  1200. GBENU_STATS_P5(tx_collision_frames),
  1201. GBENU_STATS_P5(tx_single_coll_frames),
  1202. GBENU_STATS_P5(tx_mult_coll_frames),
  1203. GBENU_STATS_P5(tx_excessive_collisions),
  1204. GBENU_STATS_P5(tx_late_collisions),
  1205. GBENU_STATS_P5(rx_ipg_error),
  1206. GBENU_STATS_P5(tx_carrier_sense_errors),
  1207. GBENU_STATS_P5(tx_bytes),
  1208. GBENU_STATS_P5(tx_64B_frames),
  1209. GBENU_STATS_P5(tx_65_to_127B_frames),
  1210. GBENU_STATS_P5(tx_128_to_255B_frames),
  1211. GBENU_STATS_P5(tx_256_to_511B_frames),
  1212. GBENU_STATS_P5(tx_512_to_1023B_frames),
  1213. GBENU_STATS_P5(tx_1024B_frames),
  1214. GBENU_STATS_P5(net_bytes),
  1215. GBENU_STATS_P5(rx_bottom_fifo_drop),
  1216. GBENU_STATS_P5(rx_port_mask_drop),
  1217. GBENU_STATS_P5(rx_top_fifo_drop),
  1218. GBENU_STATS_P5(ale_rate_limit_drop),
  1219. GBENU_STATS_P5(ale_vid_ingress_drop),
  1220. GBENU_STATS_P5(ale_da_eq_sa_drop),
  1221. GBENU_STATS_P5(ale_unknown_ucast),
  1222. GBENU_STATS_P5(ale_unknown_ucast_bytes),
  1223. GBENU_STATS_P5(ale_unknown_mcast),
  1224. GBENU_STATS_P5(ale_unknown_mcast_bytes),
  1225. GBENU_STATS_P5(ale_unknown_bcast),
  1226. GBENU_STATS_P5(ale_unknown_bcast_bytes),
  1227. GBENU_STATS_P5(ale_pol_match),
  1228. GBENU_STATS_P5(ale_pol_match_red),
  1229. GBENU_STATS_P5(ale_pol_match_yellow),
  1230. GBENU_STATS_P5(tx_mem_protect_err),
  1231. GBENU_STATS_P5(tx_pri0_drop),
  1232. GBENU_STATS_P5(tx_pri1_drop),
  1233. GBENU_STATS_P5(tx_pri2_drop),
  1234. GBENU_STATS_P5(tx_pri3_drop),
  1235. GBENU_STATS_P5(tx_pri4_drop),
  1236. GBENU_STATS_P5(tx_pri5_drop),
  1237. GBENU_STATS_P5(tx_pri6_drop),
  1238. GBENU_STATS_P5(tx_pri7_drop),
  1239. GBENU_STATS_P5(tx_pri0_drop_bcnt),
  1240. GBENU_STATS_P5(tx_pri1_drop_bcnt),
  1241. GBENU_STATS_P5(tx_pri2_drop_bcnt),
  1242. GBENU_STATS_P5(tx_pri3_drop_bcnt),
  1243. GBENU_STATS_P5(tx_pri4_drop_bcnt),
  1244. GBENU_STATS_P5(tx_pri5_drop_bcnt),
  1245. GBENU_STATS_P5(tx_pri6_drop_bcnt),
  1246. GBENU_STATS_P5(tx_pri7_drop_bcnt),
  1247. /* GBENU Module 6 */
  1248. GBENU_STATS_P6(rx_good_frames),
  1249. GBENU_STATS_P6(rx_broadcast_frames),
  1250. GBENU_STATS_P6(rx_multicast_frames),
  1251. GBENU_STATS_P6(rx_pause_frames),
  1252. GBENU_STATS_P6(rx_crc_errors),
  1253. GBENU_STATS_P6(rx_align_code_errors),
  1254. GBENU_STATS_P6(rx_oversized_frames),
  1255. GBENU_STATS_P6(rx_jabber_frames),
  1256. GBENU_STATS_P6(rx_undersized_frames),
  1257. GBENU_STATS_P6(rx_fragments),
  1258. GBENU_STATS_P6(ale_drop),
  1259. GBENU_STATS_P6(ale_overrun_drop),
  1260. GBENU_STATS_P6(rx_bytes),
  1261. GBENU_STATS_P6(tx_good_frames),
  1262. GBENU_STATS_P6(tx_broadcast_frames),
  1263. GBENU_STATS_P6(tx_multicast_frames),
  1264. GBENU_STATS_P6(tx_pause_frames),
  1265. GBENU_STATS_P6(tx_deferred_frames),
  1266. GBENU_STATS_P6(tx_collision_frames),
  1267. GBENU_STATS_P6(tx_single_coll_frames),
  1268. GBENU_STATS_P6(tx_mult_coll_frames),
  1269. GBENU_STATS_P6(tx_excessive_collisions),
  1270. GBENU_STATS_P6(tx_late_collisions),
  1271. GBENU_STATS_P6(rx_ipg_error),
  1272. GBENU_STATS_P6(tx_carrier_sense_errors),
  1273. GBENU_STATS_P6(tx_bytes),
  1274. GBENU_STATS_P6(tx_64B_frames),
  1275. GBENU_STATS_P6(tx_65_to_127B_frames),
  1276. GBENU_STATS_P6(tx_128_to_255B_frames),
  1277. GBENU_STATS_P6(tx_256_to_511B_frames),
  1278. GBENU_STATS_P6(tx_512_to_1023B_frames),
  1279. GBENU_STATS_P6(tx_1024B_frames),
  1280. GBENU_STATS_P6(net_bytes),
  1281. GBENU_STATS_P6(rx_bottom_fifo_drop),
  1282. GBENU_STATS_P6(rx_port_mask_drop),
  1283. GBENU_STATS_P6(rx_top_fifo_drop),
  1284. GBENU_STATS_P6(ale_rate_limit_drop),
  1285. GBENU_STATS_P6(ale_vid_ingress_drop),
  1286. GBENU_STATS_P6(ale_da_eq_sa_drop),
  1287. GBENU_STATS_P6(ale_unknown_ucast),
  1288. GBENU_STATS_P6(ale_unknown_ucast_bytes),
  1289. GBENU_STATS_P6(ale_unknown_mcast),
  1290. GBENU_STATS_P6(ale_unknown_mcast_bytes),
  1291. GBENU_STATS_P6(ale_unknown_bcast),
  1292. GBENU_STATS_P6(ale_unknown_bcast_bytes),
  1293. GBENU_STATS_P6(ale_pol_match),
  1294. GBENU_STATS_P6(ale_pol_match_red),
  1295. GBENU_STATS_P6(ale_pol_match_yellow),
  1296. GBENU_STATS_P6(tx_mem_protect_err),
  1297. GBENU_STATS_P6(tx_pri0_drop),
  1298. GBENU_STATS_P6(tx_pri1_drop),
  1299. GBENU_STATS_P6(tx_pri2_drop),
  1300. GBENU_STATS_P6(tx_pri3_drop),
  1301. GBENU_STATS_P6(tx_pri4_drop),
  1302. GBENU_STATS_P6(tx_pri5_drop),
  1303. GBENU_STATS_P6(tx_pri6_drop),
  1304. GBENU_STATS_P6(tx_pri7_drop),
  1305. GBENU_STATS_P6(tx_pri0_drop_bcnt),
  1306. GBENU_STATS_P6(tx_pri1_drop_bcnt),
  1307. GBENU_STATS_P6(tx_pri2_drop_bcnt),
  1308. GBENU_STATS_P6(tx_pri3_drop_bcnt),
  1309. GBENU_STATS_P6(tx_pri4_drop_bcnt),
  1310. GBENU_STATS_P6(tx_pri5_drop_bcnt),
  1311. GBENU_STATS_P6(tx_pri6_drop_bcnt),
  1312. GBENU_STATS_P6(tx_pri7_drop_bcnt),
  1313. /* GBENU Module 7 */
  1314. GBENU_STATS_P7(rx_good_frames),
  1315. GBENU_STATS_P7(rx_broadcast_frames),
  1316. GBENU_STATS_P7(rx_multicast_frames),
  1317. GBENU_STATS_P7(rx_pause_frames),
  1318. GBENU_STATS_P7(rx_crc_errors),
  1319. GBENU_STATS_P7(rx_align_code_errors),
  1320. GBENU_STATS_P7(rx_oversized_frames),
  1321. GBENU_STATS_P7(rx_jabber_frames),
  1322. GBENU_STATS_P7(rx_undersized_frames),
  1323. GBENU_STATS_P7(rx_fragments),
  1324. GBENU_STATS_P7(ale_drop),
  1325. GBENU_STATS_P7(ale_overrun_drop),
  1326. GBENU_STATS_P7(rx_bytes),
  1327. GBENU_STATS_P7(tx_good_frames),
  1328. GBENU_STATS_P7(tx_broadcast_frames),
  1329. GBENU_STATS_P7(tx_multicast_frames),
  1330. GBENU_STATS_P7(tx_pause_frames),
  1331. GBENU_STATS_P7(tx_deferred_frames),
  1332. GBENU_STATS_P7(tx_collision_frames),
  1333. GBENU_STATS_P7(tx_single_coll_frames),
  1334. GBENU_STATS_P7(tx_mult_coll_frames),
  1335. GBENU_STATS_P7(tx_excessive_collisions),
  1336. GBENU_STATS_P7(tx_late_collisions),
  1337. GBENU_STATS_P7(rx_ipg_error),
  1338. GBENU_STATS_P7(tx_carrier_sense_errors),
  1339. GBENU_STATS_P7(tx_bytes),
  1340. GBENU_STATS_P7(tx_64B_frames),
  1341. GBENU_STATS_P7(tx_65_to_127B_frames),
  1342. GBENU_STATS_P7(tx_128_to_255B_frames),
  1343. GBENU_STATS_P7(tx_256_to_511B_frames),
  1344. GBENU_STATS_P7(tx_512_to_1023B_frames),
  1345. GBENU_STATS_P7(tx_1024B_frames),
  1346. GBENU_STATS_P7(net_bytes),
  1347. GBENU_STATS_P7(rx_bottom_fifo_drop),
  1348. GBENU_STATS_P7(rx_port_mask_drop),
  1349. GBENU_STATS_P7(rx_top_fifo_drop),
  1350. GBENU_STATS_P7(ale_rate_limit_drop),
  1351. GBENU_STATS_P7(ale_vid_ingress_drop),
  1352. GBENU_STATS_P7(ale_da_eq_sa_drop),
  1353. GBENU_STATS_P7(ale_unknown_ucast),
  1354. GBENU_STATS_P7(ale_unknown_ucast_bytes),
  1355. GBENU_STATS_P7(ale_unknown_mcast),
  1356. GBENU_STATS_P7(ale_unknown_mcast_bytes),
  1357. GBENU_STATS_P7(ale_unknown_bcast),
  1358. GBENU_STATS_P7(ale_unknown_bcast_bytes),
  1359. GBENU_STATS_P7(ale_pol_match),
  1360. GBENU_STATS_P7(ale_pol_match_red),
  1361. GBENU_STATS_P7(ale_pol_match_yellow),
  1362. GBENU_STATS_P7(tx_mem_protect_err),
  1363. GBENU_STATS_P7(tx_pri0_drop),
  1364. GBENU_STATS_P7(tx_pri1_drop),
  1365. GBENU_STATS_P7(tx_pri2_drop),
  1366. GBENU_STATS_P7(tx_pri3_drop),
  1367. GBENU_STATS_P7(tx_pri4_drop),
  1368. GBENU_STATS_P7(tx_pri5_drop),
  1369. GBENU_STATS_P7(tx_pri6_drop),
  1370. GBENU_STATS_P7(tx_pri7_drop),
  1371. GBENU_STATS_P7(tx_pri0_drop_bcnt),
  1372. GBENU_STATS_P7(tx_pri1_drop_bcnt),
  1373. GBENU_STATS_P7(tx_pri2_drop_bcnt),
  1374. GBENU_STATS_P7(tx_pri3_drop_bcnt),
  1375. GBENU_STATS_P7(tx_pri4_drop_bcnt),
  1376. GBENU_STATS_P7(tx_pri5_drop_bcnt),
  1377. GBENU_STATS_P7(tx_pri6_drop_bcnt),
  1378. GBENU_STATS_P7(tx_pri7_drop_bcnt),
  1379. /* GBENU Module 8 */
  1380. GBENU_STATS_P8(rx_good_frames),
  1381. GBENU_STATS_P8(rx_broadcast_frames),
  1382. GBENU_STATS_P8(rx_multicast_frames),
  1383. GBENU_STATS_P8(rx_pause_frames),
  1384. GBENU_STATS_P8(rx_crc_errors),
  1385. GBENU_STATS_P8(rx_align_code_errors),
  1386. GBENU_STATS_P8(rx_oversized_frames),
  1387. GBENU_STATS_P8(rx_jabber_frames),
  1388. GBENU_STATS_P8(rx_undersized_frames),
  1389. GBENU_STATS_P8(rx_fragments),
  1390. GBENU_STATS_P8(ale_drop),
  1391. GBENU_STATS_P8(ale_overrun_drop),
  1392. GBENU_STATS_P8(rx_bytes),
  1393. GBENU_STATS_P8(tx_good_frames),
  1394. GBENU_STATS_P8(tx_broadcast_frames),
  1395. GBENU_STATS_P8(tx_multicast_frames),
  1396. GBENU_STATS_P8(tx_pause_frames),
  1397. GBENU_STATS_P8(tx_deferred_frames),
  1398. GBENU_STATS_P8(tx_collision_frames),
  1399. GBENU_STATS_P8(tx_single_coll_frames),
  1400. GBENU_STATS_P8(tx_mult_coll_frames),
  1401. GBENU_STATS_P8(tx_excessive_collisions),
  1402. GBENU_STATS_P8(tx_late_collisions),
  1403. GBENU_STATS_P8(rx_ipg_error),
  1404. GBENU_STATS_P8(tx_carrier_sense_errors),
  1405. GBENU_STATS_P8(tx_bytes),
  1406. GBENU_STATS_P8(tx_64B_frames),
  1407. GBENU_STATS_P8(tx_65_to_127B_frames),
  1408. GBENU_STATS_P8(tx_128_to_255B_frames),
  1409. GBENU_STATS_P8(tx_256_to_511B_frames),
  1410. GBENU_STATS_P8(tx_512_to_1023B_frames),
  1411. GBENU_STATS_P8(tx_1024B_frames),
  1412. GBENU_STATS_P8(net_bytes),
  1413. GBENU_STATS_P8(rx_bottom_fifo_drop),
  1414. GBENU_STATS_P8(rx_port_mask_drop),
  1415. GBENU_STATS_P8(rx_top_fifo_drop),
  1416. GBENU_STATS_P8(ale_rate_limit_drop),
  1417. GBENU_STATS_P8(ale_vid_ingress_drop),
  1418. GBENU_STATS_P8(ale_da_eq_sa_drop),
  1419. GBENU_STATS_P8(ale_unknown_ucast),
  1420. GBENU_STATS_P8(ale_unknown_ucast_bytes),
  1421. GBENU_STATS_P8(ale_unknown_mcast),
  1422. GBENU_STATS_P8(ale_unknown_mcast_bytes),
  1423. GBENU_STATS_P8(ale_unknown_bcast),
  1424. GBENU_STATS_P8(ale_unknown_bcast_bytes),
  1425. GBENU_STATS_P8(ale_pol_match),
  1426. GBENU_STATS_P8(ale_pol_match_red),
  1427. GBENU_STATS_P8(ale_pol_match_yellow),
  1428. GBENU_STATS_P8(tx_mem_protect_err),
  1429. GBENU_STATS_P8(tx_pri0_drop),
  1430. GBENU_STATS_P8(tx_pri1_drop),
  1431. GBENU_STATS_P8(tx_pri2_drop),
  1432. GBENU_STATS_P8(tx_pri3_drop),
  1433. GBENU_STATS_P8(tx_pri4_drop),
  1434. GBENU_STATS_P8(tx_pri5_drop),
  1435. GBENU_STATS_P8(tx_pri6_drop),
  1436. GBENU_STATS_P8(tx_pri7_drop),
  1437. GBENU_STATS_P8(tx_pri0_drop_bcnt),
  1438. GBENU_STATS_P8(tx_pri1_drop_bcnt),
  1439. GBENU_STATS_P8(tx_pri2_drop_bcnt),
  1440. GBENU_STATS_P8(tx_pri3_drop_bcnt),
  1441. GBENU_STATS_P8(tx_pri4_drop_bcnt),
  1442. GBENU_STATS_P8(tx_pri5_drop_bcnt),
  1443. GBENU_STATS_P8(tx_pri6_drop_bcnt),
  1444. GBENU_STATS_P8(tx_pri7_drop_bcnt),
  1445. };
  1446. #define XGBE_STATS0_INFO(field) \
  1447. { \
  1448. "GBE_0:"#field, XGBE_STATS0_MODULE, \
  1449. FIELD_SIZEOF(struct xgbe_hw_stats, field), \
  1450. offsetof(struct xgbe_hw_stats, field) \
  1451. }
  1452. #define XGBE_STATS1_INFO(field) \
  1453. { \
  1454. "GBE_1:"#field, XGBE_STATS1_MODULE, \
  1455. FIELD_SIZEOF(struct xgbe_hw_stats, field), \
  1456. offsetof(struct xgbe_hw_stats, field) \
  1457. }
  1458. #define XGBE_STATS2_INFO(field) \
  1459. { \
  1460. "GBE_2:"#field, XGBE_STATS2_MODULE, \
  1461. FIELD_SIZEOF(struct xgbe_hw_stats, field), \
  1462. offsetof(struct xgbe_hw_stats, field) \
  1463. }
  1464. static const struct netcp_ethtool_stat xgbe10_et_stats[] = {
  1465. /* GBE module 0 */
  1466. XGBE_STATS0_INFO(rx_good_frames),
  1467. XGBE_STATS0_INFO(rx_broadcast_frames),
  1468. XGBE_STATS0_INFO(rx_multicast_frames),
  1469. XGBE_STATS0_INFO(rx_oversized_frames),
  1470. XGBE_STATS0_INFO(rx_undersized_frames),
  1471. XGBE_STATS0_INFO(overrun_type4),
  1472. XGBE_STATS0_INFO(overrun_type5),
  1473. XGBE_STATS0_INFO(rx_bytes),
  1474. XGBE_STATS0_INFO(tx_good_frames),
  1475. XGBE_STATS0_INFO(tx_broadcast_frames),
  1476. XGBE_STATS0_INFO(tx_multicast_frames),
  1477. XGBE_STATS0_INFO(tx_bytes),
  1478. XGBE_STATS0_INFO(tx_64byte_frames),
  1479. XGBE_STATS0_INFO(tx_65_to_127byte_frames),
  1480. XGBE_STATS0_INFO(tx_128_to_255byte_frames),
  1481. XGBE_STATS0_INFO(tx_256_to_511byte_frames),
  1482. XGBE_STATS0_INFO(tx_512_to_1023byte_frames),
  1483. XGBE_STATS0_INFO(tx_1024byte_frames),
  1484. XGBE_STATS0_INFO(net_bytes),
  1485. XGBE_STATS0_INFO(rx_sof_overruns),
  1486. XGBE_STATS0_INFO(rx_mof_overruns),
  1487. XGBE_STATS0_INFO(rx_dma_overruns),
  1488. /* XGBE module 1 */
  1489. XGBE_STATS1_INFO(rx_good_frames),
  1490. XGBE_STATS1_INFO(rx_broadcast_frames),
  1491. XGBE_STATS1_INFO(rx_multicast_frames),
  1492. XGBE_STATS1_INFO(rx_pause_frames),
  1493. XGBE_STATS1_INFO(rx_crc_errors),
  1494. XGBE_STATS1_INFO(rx_align_code_errors),
  1495. XGBE_STATS1_INFO(rx_oversized_frames),
  1496. XGBE_STATS1_INFO(rx_jabber_frames),
  1497. XGBE_STATS1_INFO(rx_undersized_frames),
  1498. XGBE_STATS1_INFO(rx_fragments),
  1499. XGBE_STATS1_INFO(overrun_type4),
  1500. XGBE_STATS1_INFO(overrun_type5),
  1501. XGBE_STATS1_INFO(rx_bytes),
  1502. XGBE_STATS1_INFO(tx_good_frames),
  1503. XGBE_STATS1_INFO(tx_broadcast_frames),
  1504. XGBE_STATS1_INFO(tx_multicast_frames),
  1505. XGBE_STATS1_INFO(tx_pause_frames),
  1506. XGBE_STATS1_INFO(tx_deferred_frames),
  1507. XGBE_STATS1_INFO(tx_collision_frames),
  1508. XGBE_STATS1_INFO(tx_single_coll_frames),
  1509. XGBE_STATS1_INFO(tx_mult_coll_frames),
  1510. XGBE_STATS1_INFO(tx_excessive_collisions),
  1511. XGBE_STATS1_INFO(tx_late_collisions),
  1512. XGBE_STATS1_INFO(tx_underrun),
  1513. XGBE_STATS1_INFO(tx_carrier_sense_errors),
  1514. XGBE_STATS1_INFO(tx_bytes),
  1515. XGBE_STATS1_INFO(tx_64byte_frames),
  1516. XGBE_STATS1_INFO(tx_65_to_127byte_frames),
  1517. XGBE_STATS1_INFO(tx_128_to_255byte_frames),
  1518. XGBE_STATS1_INFO(tx_256_to_511byte_frames),
  1519. XGBE_STATS1_INFO(tx_512_to_1023byte_frames),
  1520. XGBE_STATS1_INFO(tx_1024byte_frames),
  1521. XGBE_STATS1_INFO(net_bytes),
  1522. XGBE_STATS1_INFO(rx_sof_overruns),
  1523. XGBE_STATS1_INFO(rx_mof_overruns),
  1524. XGBE_STATS1_INFO(rx_dma_overruns),
  1525. /* XGBE module 2 */
  1526. XGBE_STATS2_INFO(rx_good_frames),
  1527. XGBE_STATS2_INFO(rx_broadcast_frames),
  1528. XGBE_STATS2_INFO(rx_multicast_frames),
  1529. XGBE_STATS2_INFO(rx_pause_frames),
  1530. XGBE_STATS2_INFO(rx_crc_errors),
  1531. XGBE_STATS2_INFO(rx_align_code_errors),
  1532. XGBE_STATS2_INFO(rx_oversized_frames),
  1533. XGBE_STATS2_INFO(rx_jabber_frames),
  1534. XGBE_STATS2_INFO(rx_undersized_frames),
  1535. XGBE_STATS2_INFO(rx_fragments),
  1536. XGBE_STATS2_INFO(overrun_type4),
  1537. XGBE_STATS2_INFO(overrun_type5),
  1538. XGBE_STATS2_INFO(rx_bytes),
  1539. XGBE_STATS2_INFO(tx_good_frames),
  1540. XGBE_STATS2_INFO(tx_broadcast_frames),
  1541. XGBE_STATS2_INFO(tx_multicast_frames),
  1542. XGBE_STATS2_INFO(tx_pause_frames),
  1543. XGBE_STATS2_INFO(tx_deferred_frames),
  1544. XGBE_STATS2_INFO(tx_collision_frames),
  1545. XGBE_STATS2_INFO(tx_single_coll_frames),
  1546. XGBE_STATS2_INFO(tx_mult_coll_frames),
  1547. XGBE_STATS2_INFO(tx_excessive_collisions),
  1548. XGBE_STATS2_INFO(tx_late_collisions),
  1549. XGBE_STATS2_INFO(tx_underrun),
  1550. XGBE_STATS2_INFO(tx_carrier_sense_errors),
  1551. XGBE_STATS2_INFO(tx_bytes),
  1552. XGBE_STATS2_INFO(tx_64byte_frames),
  1553. XGBE_STATS2_INFO(tx_65_to_127byte_frames),
  1554. XGBE_STATS2_INFO(tx_128_to_255byte_frames),
  1555. XGBE_STATS2_INFO(tx_256_to_511byte_frames),
  1556. XGBE_STATS2_INFO(tx_512_to_1023byte_frames),
  1557. XGBE_STATS2_INFO(tx_1024byte_frames),
  1558. XGBE_STATS2_INFO(net_bytes),
  1559. XGBE_STATS2_INFO(rx_sof_overruns),
  1560. XGBE_STATS2_INFO(rx_mof_overruns),
  1561. XGBE_STATS2_INFO(rx_dma_overruns),
  1562. };
  1563. #define for_each_intf(i, priv) \
  1564. list_for_each_entry((i), &(priv)->gbe_intf_head, gbe_intf_list)
  1565. #define for_each_sec_slave(slave, priv) \
  1566. list_for_each_entry((slave), &(priv)->secondary_slaves, slave_list)
  1567. #define first_sec_slave(priv) \
  1568. list_first_entry(&priv->secondary_slaves, \
  1569. struct gbe_slave, slave_list)
  1570. static void keystone_get_drvinfo(struct net_device *ndev,
  1571. struct ethtool_drvinfo *info)
  1572. {
  1573. strncpy(info->driver, NETCP_DRIVER_NAME, sizeof(info->driver));
  1574. strncpy(info->version, NETCP_DRIVER_VERSION, sizeof(info->version));
  1575. }
  1576. static u32 keystone_get_msglevel(struct net_device *ndev)
  1577. {
  1578. struct netcp_intf *netcp = netdev_priv(ndev);
  1579. return netcp->msg_enable;
  1580. }
  1581. static void keystone_set_msglevel(struct net_device *ndev, u32 value)
  1582. {
  1583. struct netcp_intf *netcp = netdev_priv(ndev);
  1584. netcp->msg_enable = value;
  1585. }
  1586. static void keystone_get_stat_strings(struct net_device *ndev,
  1587. uint32_t stringset, uint8_t *data)
  1588. {
  1589. struct netcp_intf *netcp = netdev_priv(ndev);
  1590. struct gbe_intf *gbe_intf;
  1591. struct gbe_priv *gbe_dev;
  1592. int i;
  1593. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  1594. if (!gbe_intf)
  1595. return;
  1596. gbe_dev = gbe_intf->gbe_dev;
  1597. switch (stringset) {
  1598. case ETH_SS_STATS:
  1599. for (i = 0; i < gbe_dev->num_et_stats; i++) {
  1600. memcpy(data, gbe_dev->et_stats[i].desc,
  1601. ETH_GSTRING_LEN);
  1602. data += ETH_GSTRING_LEN;
  1603. }
  1604. break;
  1605. case ETH_SS_TEST:
  1606. break;
  1607. }
  1608. }
  1609. static int keystone_get_sset_count(struct net_device *ndev, int stringset)
  1610. {
  1611. struct netcp_intf *netcp = netdev_priv(ndev);
  1612. struct gbe_intf *gbe_intf;
  1613. struct gbe_priv *gbe_dev;
  1614. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  1615. if (!gbe_intf)
  1616. return -EINVAL;
  1617. gbe_dev = gbe_intf->gbe_dev;
  1618. switch (stringset) {
  1619. case ETH_SS_TEST:
  1620. return 0;
  1621. case ETH_SS_STATS:
  1622. return gbe_dev->num_et_stats;
  1623. default:
  1624. return -EINVAL;
  1625. }
  1626. }
  1627. static void gbe_reset_mod_stats(struct gbe_priv *gbe_dev, int stats_mod)
  1628. {
  1629. void __iomem *base = gbe_dev->hw_stats_regs[stats_mod];
  1630. u32 __iomem *p_stats_entry;
  1631. int i;
  1632. for (i = 0; i < gbe_dev->num_et_stats; i++) {
  1633. if (gbe_dev->et_stats[i].type == stats_mod) {
  1634. p_stats_entry = base + gbe_dev->et_stats[i].offset;
  1635. gbe_dev->hw_stats[i] = 0;
  1636. gbe_dev->hw_stats_prev[i] = readl(p_stats_entry);
  1637. }
  1638. }
  1639. }
  1640. static inline void gbe_update_hw_stats_entry(struct gbe_priv *gbe_dev,
  1641. int et_stats_entry)
  1642. {
  1643. void __iomem *base = NULL;
  1644. u32 __iomem *p_stats_entry;
  1645. u32 curr, delta;
  1646. /* The hw_stats_regs pointers are already
  1647. * properly set to point to the right base:
  1648. */
  1649. base = gbe_dev->hw_stats_regs[gbe_dev->et_stats[et_stats_entry].type];
  1650. p_stats_entry = base + gbe_dev->et_stats[et_stats_entry].offset;
  1651. curr = readl(p_stats_entry);
  1652. delta = curr - gbe_dev->hw_stats_prev[et_stats_entry];
  1653. gbe_dev->hw_stats_prev[et_stats_entry] = curr;
  1654. gbe_dev->hw_stats[et_stats_entry] += delta;
  1655. }
  1656. static void gbe_update_stats(struct gbe_priv *gbe_dev, uint64_t *data)
  1657. {
  1658. int i;
  1659. for (i = 0; i < gbe_dev->num_et_stats; i++) {
  1660. gbe_update_hw_stats_entry(gbe_dev, i);
  1661. if (data)
  1662. data[i] = gbe_dev->hw_stats[i];
  1663. }
  1664. }
  1665. static inline void gbe_stats_mod_visible_ver14(struct gbe_priv *gbe_dev,
  1666. int stats_mod)
  1667. {
  1668. u32 val;
  1669. val = readl(GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
  1670. switch (stats_mod) {
  1671. case GBE_STATSA_MODULE:
  1672. case GBE_STATSB_MODULE:
  1673. val &= ~GBE_STATS_CD_SEL;
  1674. break;
  1675. case GBE_STATSC_MODULE:
  1676. case GBE_STATSD_MODULE:
  1677. val |= GBE_STATS_CD_SEL;
  1678. break;
  1679. default:
  1680. return;
  1681. }
  1682. /* make the stat module visible */
  1683. writel(val, GBE_REG_ADDR(gbe_dev, switch_regs, stat_port_en));
  1684. }
  1685. static void gbe_reset_mod_stats_ver14(struct gbe_priv *gbe_dev, int stats_mod)
  1686. {
  1687. gbe_stats_mod_visible_ver14(gbe_dev, stats_mod);
  1688. gbe_reset_mod_stats(gbe_dev, stats_mod);
  1689. }
  1690. static void gbe_update_stats_ver14(struct gbe_priv *gbe_dev, uint64_t *data)
  1691. {
  1692. u32 half_num_et_stats = (gbe_dev->num_et_stats / 2);
  1693. int et_entry, j, pair;
  1694. for (pair = 0; pair < 2; pair++) {
  1695. gbe_stats_mod_visible_ver14(gbe_dev, (pair ?
  1696. GBE_STATSC_MODULE :
  1697. GBE_STATSA_MODULE));
  1698. for (j = 0; j < half_num_et_stats; j++) {
  1699. et_entry = pair * half_num_et_stats + j;
  1700. gbe_update_hw_stats_entry(gbe_dev, et_entry);
  1701. if (data)
  1702. data[et_entry] = gbe_dev->hw_stats[et_entry];
  1703. }
  1704. }
  1705. }
  1706. static void keystone_get_ethtool_stats(struct net_device *ndev,
  1707. struct ethtool_stats *stats,
  1708. uint64_t *data)
  1709. {
  1710. struct netcp_intf *netcp = netdev_priv(ndev);
  1711. struct gbe_intf *gbe_intf;
  1712. struct gbe_priv *gbe_dev;
  1713. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  1714. if (!gbe_intf)
  1715. return;
  1716. gbe_dev = gbe_intf->gbe_dev;
  1717. spin_lock_bh(&gbe_dev->hw_stats_lock);
  1718. if (gbe_dev->ss_version == GBE_SS_VERSION_14)
  1719. gbe_update_stats_ver14(gbe_dev, data);
  1720. else
  1721. gbe_update_stats(gbe_dev, data);
  1722. spin_unlock_bh(&gbe_dev->hw_stats_lock);
  1723. }
  1724. static int keystone_get_settings(struct net_device *ndev,
  1725. struct ethtool_cmd *cmd)
  1726. {
  1727. struct netcp_intf *netcp = netdev_priv(ndev);
  1728. struct phy_device *phy = ndev->phydev;
  1729. struct gbe_intf *gbe_intf;
  1730. int ret;
  1731. if (!phy)
  1732. return -EINVAL;
  1733. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  1734. if (!gbe_intf)
  1735. return -EINVAL;
  1736. if (!gbe_intf->slave)
  1737. return -EINVAL;
  1738. ret = phy_ethtool_gset(phy, cmd);
  1739. if (!ret)
  1740. cmd->port = gbe_intf->slave->phy_port_t;
  1741. return ret;
  1742. }
  1743. static int keystone_set_settings(struct net_device *ndev,
  1744. struct ethtool_cmd *cmd)
  1745. {
  1746. struct netcp_intf *netcp = netdev_priv(ndev);
  1747. struct phy_device *phy = ndev->phydev;
  1748. struct gbe_intf *gbe_intf;
  1749. u32 features = cmd->advertising & cmd->supported;
  1750. if (!phy)
  1751. return -EINVAL;
  1752. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  1753. if (!gbe_intf)
  1754. return -EINVAL;
  1755. if (!gbe_intf->slave)
  1756. return -EINVAL;
  1757. if (cmd->port != gbe_intf->slave->phy_port_t) {
  1758. if ((cmd->port == PORT_TP) && !(features & ADVERTISED_TP))
  1759. return -EINVAL;
  1760. if ((cmd->port == PORT_AUI) && !(features & ADVERTISED_AUI))
  1761. return -EINVAL;
  1762. if ((cmd->port == PORT_BNC) && !(features & ADVERTISED_BNC))
  1763. return -EINVAL;
  1764. if ((cmd->port == PORT_MII) && !(features & ADVERTISED_MII))
  1765. return -EINVAL;
  1766. if ((cmd->port == PORT_FIBRE) && !(features & ADVERTISED_FIBRE))
  1767. return -EINVAL;
  1768. }
  1769. gbe_intf->slave->phy_port_t = cmd->port;
  1770. return phy_ethtool_sset(phy, cmd);
  1771. }
  1772. static const struct ethtool_ops keystone_ethtool_ops = {
  1773. .get_drvinfo = keystone_get_drvinfo,
  1774. .get_link = ethtool_op_get_link,
  1775. .get_msglevel = keystone_get_msglevel,
  1776. .set_msglevel = keystone_set_msglevel,
  1777. .get_strings = keystone_get_stat_strings,
  1778. .get_sset_count = keystone_get_sset_count,
  1779. .get_ethtool_stats = keystone_get_ethtool_stats,
  1780. .get_settings = keystone_get_settings,
  1781. .set_settings = keystone_set_settings,
  1782. };
  1783. #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \
  1784. ((mac)[2] << 16) | ((mac)[3] << 24))
  1785. #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8))
  1786. static void gbe_set_slave_mac(struct gbe_slave *slave,
  1787. struct gbe_intf *gbe_intf)
  1788. {
  1789. struct net_device *ndev = gbe_intf->ndev;
  1790. writel(mac_hi(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_hi));
  1791. writel(mac_lo(ndev->dev_addr), GBE_REG_ADDR(slave, port_regs, sa_lo));
  1792. }
  1793. static int gbe_get_slave_port(struct gbe_priv *priv, u32 slave_num)
  1794. {
  1795. if (priv->host_port == 0)
  1796. return slave_num + 1;
  1797. return slave_num;
  1798. }
  1799. static void netcp_ethss_link_state_action(struct gbe_priv *gbe_dev,
  1800. struct net_device *ndev,
  1801. struct gbe_slave *slave,
  1802. int up)
  1803. {
  1804. struct phy_device *phy = slave->phy;
  1805. u32 mac_control = 0;
  1806. if (up) {
  1807. mac_control = slave->mac_control;
  1808. if (phy && (phy->speed == SPEED_1000)) {
  1809. mac_control |= MACSL_GIG_MODE;
  1810. mac_control &= ~MACSL_XGIG_MODE;
  1811. } else if (phy && (phy->speed == SPEED_10000)) {
  1812. mac_control |= MACSL_XGIG_MODE;
  1813. mac_control &= ~MACSL_GIG_MODE;
  1814. }
  1815. writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
  1816. mac_control));
  1817. cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
  1818. ALE_PORT_STATE,
  1819. ALE_PORT_STATE_FORWARD);
  1820. if (ndev && slave->open &&
  1821. slave->link_interface != SGMII_LINK_MAC_PHY &&
  1822. slave->link_interface != XGMII_LINK_MAC_PHY)
  1823. netif_carrier_on(ndev);
  1824. } else {
  1825. writel(mac_control, GBE_REG_ADDR(slave, emac_regs,
  1826. mac_control));
  1827. cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
  1828. ALE_PORT_STATE,
  1829. ALE_PORT_STATE_DISABLE);
  1830. if (ndev &&
  1831. slave->link_interface != SGMII_LINK_MAC_PHY &&
  1832. slave->link_interface != XGMII_LINK_MAC_PHY)
  1833. netif_carrier_off(ndev);
  1834. }
  1835. if (phy)
  1836. phy_print_status(phy);
  1837. }
  1838. static bool gbe_phy_link_status(struct gbe_slave *slave)
  1839. {
  1840. return !slave->phy || slave->phy->link;
  1841. }
  1842. static void netcp_ethss_update_link_state(struct gbe_priv *gbe_dev,
  1843. struct gbe_slave *slave,
  1844. struct net_device *ndev)
  1845. {
  1846. int sp = slave->slave_num;
  1847. int phy_link_state, sgmii_link_state = 1, link_state;
  1848. if (!slave->open)
  1849. return;
  1850. if (!SLAVE_LINK_IS_XGMII(slave)) {
  1851. sgmii_link_state =
  1852. netcp_sgmii_get_port_link(SGMII_BASE(gbe_dev, sp), sp);
  1853. }
  1854. phy_link_state = gbe_phy_link_status(slave);
  1855. link_state = phy_link_state & sgmii_link_state;
  1856. if (atomic_xchg(&slave->link_state, link_state) != link_state)
  1857. netcp_ethss_link_state_action(gbe_dev, ndev, slave,
  1858. link_state);
  1859. }
  1860. static void xgbe_adjust_link(struct net_device *ndev)
  1861. {
  1862. struct netcp_intf *netcp = netdev_priv(ndev);
  1863. struct gbe_intf *gbe_intf;
  1864. gbe_intf = netcp_module_get_intf_data(&xgbe_module, netcp);
  1865. if (!gbe_intf)
  1866. return;
  1867. netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
  1868. ndev);
  1869. }
  1870. static void gbe_adjust_link(struct net_device *ndev)
  1871. {
  1872. struct netcp_intf *netcp = netdev_priv(ndev);
  1873. struct gbe_intf *gbe_intf;
  1874. gbe_intf = netcp_module_get_intf_data(&gbe_module, netcp);
  1875. if (!gbe_intf)
  1876. return;
  1877. netcp_ethss_update_link_state(gbe_intf->gbe_dev, gbe_intf->slave,
  1878. ndev);
  1879. }
  1880. static void gbe_adjust_link_sec_slaves(struct net_device *ndev)
  1881. {
  1882. struct gbe_priv *gbe_dev = netdev_priv(ndev);
  1883. struct gbe_slave *slave;
  1884. for_each_sec_slave(slave, gbe_dev)
  1885. netcp_ethss_update_link_state(gbe_dev, slave, NULL);
  1886. }
  1887. /* Reset EMAC
  1888. * Soft reset is set and polled until clear, or until a timeout occurs
  1889. */
  1890. static int gbe_port_reset(struct gbe_slave *slave)
  1891. {
  1892. u32 i, v;
  1893. /* Set the soft reset bit */
  1894. writel(SOFT_RESET, GBE_REG_ADDR(slave, emac_regs, soft_reset));
  1895. /* Wait for the bit to clear */
  1896. for (i = 0; i < DEVICE_EMACSL_RESET_POLL_COUNT; i++) {
  1897. v = readl(GBE_REG_ADDR(slave, emac_regs, soft_reset));
  1898. if ((v & SOFT_RESET_MASK) != SOFT_RESET)
  1899. return 0;
  1900. }
  1901. /* Timeout on the reset */
  1902. return GMACSL_RET_WARN_RESET_INCOMPLETE;
  1903. }
  1904. /* Configure EMAC */
  1905. static void gbe_port_config(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
  1906. int max_rx_len)
  1907. {
  1908. void __iomem *rx_maxlen_reg;
  1909. u32 xgmii_mode;
  1910. if (max_rx_len > NETCP_MAX_FRAME_SIZE)
  1911. max_rx_len = NETCP_MAX_FRAME_SIZE;
  1912. /* Enable correct MII mode at SS level */
  1913. if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) &&
  1914. (slave->link_interface >= XGMII_LINK_MAC_PHY)) {
  1915. xgmii_mode = readl(GBE_REG_ADDR(gbe_dev, ss_regs, control));
  1916. xgmii_mode |= (1 << slave->slave_num);
  1917. writel(xgmii_mode, GBE_REG_ADDR(gbe_dev, ss_regs, control));
  1918. }
  1919. if (IS_SS_ID_MU(gbe_dev))
  1920. rx_maxlen_reg = GBE_REG_ADDR(slave, port_regs, rx_maxlen);
  1921. else
  1922. rx_maxlen_reg = GBE_REG_ADDR(slave, emac_regs, rx_maxlen);
  1923. writel(max_rx_len, rx_maxlen_reg);
  1924. writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control));
  1925. }
  1926. static void gbe_sgmii_rtreset(struct gbe_priv *priv,
  1927. struct gbe_slave *slave, bool set)
  1928. {
  1929. if (SLAVE_LINK_IS_XGMII(slave))
  1930. return;
  1931. netcp_sgmii_rtreset(SGMII_BASE(priv, slave->slave_num),
  1932. slave->slave_num, set);
  1933. }
  1934. static void gbe_slave_stop(struct gbe_intf *intf)
  1935. {
  1936. struct gbe_priv *gbe_dev = intf->gbe_dev;
  1937. struct gbe_slave *slave = intf->slave;
  1938. gbe_sgmii_rtreset(gbe_dev, slave, true);
  1939. gbe_port_reset(slave);
  1940. /* Disable forwarding */
  1941. cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
  1942. ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
  1943. cpsw_ale_del_mcast(gbe_dev->ale, intf->ndev->broadcast,
  1944. 1 << slave->port_num, 0, 0);
  1945. if (!slave->phy)
  1946. return;
  1947. phy_stop(slave->phy);
  1948. phy_disconnect(slave->phy);
  1949. slave->phy = NULL;
  1950. }
  1951. static void gbe_sgmii_config(struct gbe_priv *priv, struct gbe_slave *slave)
  1952. {
  1953. if (SLAVE_LINK_IS_XGMII(slave))
  1954. return;
  1955. netcp_sgmii_reset(SGMII_BASE(priv, slave->slave_num), slave->slave_num);
  1956. netcp_sgmii_config(SGMII_BASE(priv, slave->slave_num), slave->slave_num,
  1957. slave->link_interface);
  1958. }
  1959. static int gbe_slave_open(struct gbe_intf *gbe_intf)
  1960. {
  1961. struct gbe_priv *priv = gbe_intf->gbe_dev;
  1962. struct gbe_slave *slave = gbe_intf->slave;
  1963. phy_interface_t phy_mode;
  1964. bool has_phy = false;
  1965. void (*hndlr)(struct net_device *) = gbe_adjust_link;
  1966. gbe_sgmii_config(priv, slave);
  1967. gbe_port_reset(slave);
  1968. gbe_sgmii_rtreset(priv, slave, false);
  1969. gbe_port_config(priv, slave, priv->rx_packet_max);
  1970. gbe_set_slave_mac(slave, gbe_intf);
  1971. /* enable forwarding */
  1972. cpsw_ale_control_set(priv->ale, slave->port_num,
  1973. ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
  1974. cpsw_ale_add_mcast(priv->ale, gbe_intf->ndev->broadcast,
  1975. 1 << slave->port_num, 0, 0, ALE_MCAST_FWD_2);
  1976. if (slave->link_interface == SGMII_LINK_MAC_PHY) {
  1977. has_phy = true;
  1978. phy_mode = PHY_INTERFACE_MODE_SGMII;
  1979. slave->phy_port_t = PORT_MII;
  1980. } else if (slave->link_interface == XGMII_LINK_MAC_PHY) {
  1981. has_phy = true;
  1982. phy_mode = PHY_INTERFACE_MODE_NA;
  1983. slave->phy_port_t = PORT_FIBRE;
  1984. }
  1985. if (has_phy) {
  1986. if (priv->ss_version == XGBE_SS_VERSION_10)
  1987. hndlr = xgbe_adjust_link;
  1988. slave->phy = of_phy_connect(gbe_intf->ndev,
  1989. slave->phy_node,
  1990. hndlr, 0,
  1991. phy_mode);
  1992. if (!slave->phy) {
  1993. dev_err(priv->dev, "phy not found on slave %d\n",
  1994. slave->slave_num);
  1995. return -ENODEV;
  1996. }
  1997. dev_dbg(priv->dev, "phy found: id is: 0x%s\n",
  1998. phydev_name(slave->phy));
  1999. phy_start(slave->phy);
  2000. phy_read_status(slave->phy);
  2001. }
  2002. return 0;
  2003. }
  2004. static void gbe_init_host_port(struct gbe_priv *priv)
  2005. {
  2006. int bypass_en = 1;
  2007. /* Host Tx Pri */
  2008. if (IS_SS_ID_NU(priv))
  2009. writel(HOST_TX_PRI_MAP_DEFAULT,
  2010. GBE_REG_ADDR(priv, host_port_regs, tx_pri_map));
  2011. /* Max length register */
  2012. writel(NETCP_MAX_FRAME_SIZE, GBE_REG_ADDR(priv, host_port_regs,
  2013. rx_maxlen));
  2014. cpsw_ale_start(priv->ale);
  2015. if (priv->enable_ale)
  2016. bypass_en = 0;
  2017. cpsw_ale_control_set(priv->ale, 0, ALE_BYPASS, bypass_en);
  2018. cpsw_ale_control_set(priv->ale, 0, ALE_NO_PORT_VLAN, 1);
  2019. cpsw_ale_control_set(priv->ale, priv->host_port,
  2020. ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
  2021. cpsw_ale_control_set(priv->ale, 0,
  2022. ALE_PORT_UNKNOWN_VLAN_MEMBER,
  2023. GBE_PORT_MASK(priv->ale_ports));
  2024. cpsw_ale_control_set(priv->ale, 0,
  2025. ALE_PORT_UNKNOWN_MCAST_FLOOD,
  2026. GBE_PORT_MASK(priv->ale_ports - 1));
  2027. cpsw_ale_control_set(priv->ale, 0,
  2028. ALE_PORT_UNKNOWN_REG_MCAST_FLOOD,
  2029. GBE_PORT_MASK(priv->ale_ports));
  2030. cpsw_ale_control_set(priv->ale, 0,
  2031. ALE_PORT_UNTAGGED_EGRESS,
  2032. GBE_PORT_MASK(priv->ale_ports));
  2033. }
  2034. static void gbe_add_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
  2035. {
  2036. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2037. u16 vlan_id;
  2038. cpsw_ale_add_mcast(gbe_dev->ale, addr,
  2039. GBE_PORT_MASK(gbe_dev->ale_ports), 0, 0,
  2040. ALE_MCAST_FWD_2);
  2041. for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
  2042. cpsw_ale_add_mcast(gbe_dev->ale, addr,
  2043. GBE_PORT_MASK(gbe_dev->ale_ports),
  2044. ALE_VLAN, vlan_id, ALE_MCAST_FWD_2);
  2045. }
  2046. }
  2047. static void gbe_add_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
  2048. {
  2049. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2050. u16 vlan_id;
  2051. cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);
  2052. for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID)
  2053. cpsw_ale_add_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
  2054. ALE_VLAN, vlan_id);
  2055. }
  2056. static void gbe_del_mcast_addr(struct gbe_intf *gbe_intf, u8 *addr)
  2057. {
  2058. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2059. u16 vlan_id;
  2060. cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, 0, 0);
  2061. for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
  2062. cpsw_ale_del_mcast(gbe_dev->ale, addr, 0, ALE_VLAN, vlan_id);
  2063. }
  2064. }
  2065. static void gbe_del_ucast_addr(struct gbe_intf *gbe_intf, u8 *addr)
  2066. {
  2067. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2068. u16 vlan_id;
  2069. cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port, 0, 0);
  2070. for_each_set_bit(vlan_id, gbe_intf->active_vlans, VLAN_N_VID) {
  2071. cpsw_ale_del_ucast(gbe_dev->ale, addr, gbe_dev->host_port,
  2072. ALE_VLAN, vlan_id);
  2073. }
  2074. }
  2075. static int gbe_add_addr(void *intf_priv, struct netcp_addr *naddr)
  2076. {
  2077. struct gbe_intf *gbe_intf = intf_priv;
  2078. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2079. dev_dbg(gbe_dev->dev, "ethss adding address %pM, type %d\n",
  2080. naddr->addr, naddr->type);
  2081. switch (naddr->type) {
  2082. case ADDR_MCAST:
  2083. case ADDR_BCAST:
  2084. gbe_add_mcast_addr(gbe_intf, naddr->addr);
  2085. break;
  2086. case ADDR_UCAST:
  2087. case ADDR_DEV:
  2088. gbe_add_ucast_addr(gbe_intf, naddr->addr);
  2089. break;
  2090. case ADDR_ANY:
  2091. /* nothing to do for promiscuous */
  2092. default:
  2093. break;
  2094. }
  2095. return 0;
  2096. }
  2097. static int gbe_del_addr(void *intf_priv, struct netcp_addr *naddr)
  2098. {
  2099. struct gbe_intf *gbe_intf = intf_priv;
  2100. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2101. dev_dbg(gbe_dev->dev, "ethss deleting address %pM, type %d\n",
  2102. naddr->addr, naddr->type);
  2103. switch (naddr->type) {
  2104. case ADDR_MCAST:
  2105. case ADDR_BCAST:
  2106. gbe_del_mcast_addr(gbe_intf, naddr->addr);
  2107. break;
  2108. case ADDR_UCAST:
  2109. case ADDR_DEV:
  2110. gbe_del_ucast_addr(gbe_intf, naddr->addr);
  2111. break;
  2112. case ADDR_ANY:
  2113. /* nothing to do for promiscuous */
  2114. default:
  2115. break;
  2116. }
  2117. return 0;
  2118. }
  2119. static int gbe_add_vid(void *intf_priv, int vid)
  2120. {
  2121. struct gbe_intf *gbe_intf = intf_priv;
  2122. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2123. set_bit(vid, gbe_intf->active_vlans);
  2124. cpsw_ale_add_vlan(gbe_dev->ale, vid,
  2125. GBE_PORT_MASK(gbe_dev->ale_ports),
  2126. GBE_MASK_NO_PORTS,
  2127. GBE_PORT_MASK(gbe_dev->ale_ports),
  2128. GBE_PORT_MASK(gbe_dev->ale_ports - 1));
  2129. return 0;
  2130. }
  2131. static int gbe_del_vid(void *intf_priv, int vid)
  2132. {
  2133. struct gbe_intf *gbe_intf = intf_priv;
  2134. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2135. cpsw_ale_del_vlan(gbe_dev->ale, vid, 0);
  2136. clear_bit(vid, gbe_intf->active_vlans);
  2137. return 0;
  2138. }
  2139. static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd)
  2140. {
  2141. struct gbe_intf *gbe_intf = intf_priv;
  2142. struct phy_device *phy = gbe_intf->slave->phy;
  2143. int ret = -EOPNOTSUPP;
  2144. if (phy)
  2145. ret = phy_mii_ioctl(phy, req, cmd);
  2146. return ret;
  2147. }
  2148. static void netcp_ethss_timer(unsigned long arg)
  2149. {
  2150. struct gbe_priv *gbe_dev = (struct gbe_priv *)arg;
  2151. struct gbe_intf *gbe_intf;
  2152. struct gbe_slave *slave;
  2153. /* Check & update SGMII link state of interfaces */
  2154. for_each_intf(gbe_intf, gbe_dev) {
  2155. if (!gbe_intf->slave->open)
  2156. continue;
  2157. netcp_ethss_update_link_state(gbe_dev, gbe_intf->slave,
  2158. gbe_intf->ndev);
  2159. }
  2160. /* Check & update SGMII link state of secondary ports */
  2161. for_each_sec_slave(slave, gbe_dev) {
  2162. netcp_ethss_update_link_state(gbe_dev, slave, NULL);
  2163. }
  2164. /* A timer runs as a BH, no need to block them */
  2165. spin_lock(&gbe_dev->hw_stats_lock);
  2166. if (gbe_dev->ss_version == GBE_SS_VERSION_14)
  2167. gbe_update_stats_ver14(gbe_dev, NULL);
  2168. else
  2169. gbe_update_stats(gbe_dev, NULL);
  2170. spin_unlock(&gbe_dev->hw_stats_lock);
  2171. gbe_dev->timer.expires = jiffies + GBE_TIMER_INTERVAL;
  2172. add_timer(&gbe_dev->timer);
  2173. }
  2174. static int gbe_tx_hook(int order, void *data, struct netcp_packet *p_info)
  2175. {
  2176. struct gbe_intf *gbe_intf = data;
  2177. p_info->tx_pipe = &gbe_intf->tx_pipe;
  2178. return 0;
  2179. }
  2180. static int gbe_open(void *intf_priv, struct net_device *ndev)
  2181. {
  2182. struct gbe_intf *gbe_intf = intf_priv;
  2183. struct gbe_priv *gbe_dev = gbe_intf->gbe_dev;
  2184. struct netcp_intf *netcp = netdev_priv(ndev);
  2185. struct gbe_slave *slave = gbe_intf->slave;
  2186. int port_num = slave->port_num;
  2187. u32 reg;
  2188. int ret;
  2189. reg = readl(GBE_REG_ADDR(gbe_dev, switch_regs, id_ver));
  2190. dev_dbg(gbe_dev->dev, "initializing gbe version %d.%d (%d) GBE identification value 0x%x\n",
  2191. GBE_MAJOR_VERSION(reg), GBE_MINOR_VERSION(reg),
  2192. GBE_RTL_VERSION(reg), GBE_IDENT(reg));
  2193. /* For 10G and on NetCP 1.5, use directed to port */
  2194. if ((gbe_dev->ss_version == XGBE_SS_VERSION_10) || IS_SS_ID_MU(gbe_dev))
  2195. gbe_intf->tx_pipe.flags = SWITCH_TO_PORT_IN_TAGINFO;
  2196. if (gbe_dev->enable_ale)
  2197. gbe_intf->tx_pipe.switch_to_port = 0;
  2198. else
  2199. gbe_intf->tx_pipe.switch_to_port = port_num;
  2200. dev_dbg(gbe_dev->dev,
  2201. "opened TX channel %s: %p with to port %d, flags %d\n",
  2202. gbe_intf->tx_pipe.dma_chan_name,
  2203. gbe_intf->tx_pipe.dma_channel,
  2204. gbe_intf->tx_pipe.switch_to_port,
  2205. gbe_intf->tx_pipe.flags);
  2206. gbe_slave_stop(gbe_intf);
  2207. /* disable priority elevation and enable statistics on all ports */
  2208. writel(0, GBE_REG_ADDR(gbe_dev, switch_regs, ptype));
  2209. /* Control register */
  2210. writel(GBE_CTL_P0_ENABLE, GBE_REG_ADDR(gbe_dev, switch_regs, control));
  2211. /* All statistics enabled and STAT AB visible by default */
  2212. writel(gbe_dev->stats_en_mask, GBE_REG_ADDR(gbe_dev, switch_regs,
  2213. stat_port_en));
  2214. ret = gbe_slave_open(gbe_intf);
  2215. if (ret)
  2216. goto fail;
  2217. netcp_register_txhook(netcp, GBE_TXHOOK_ORDER, gbe_tx_hook,
  2218. gbe_intf);
  2219. slave->open = true;
  2220. netcp_ethss_update_link_state(gbe_dev, slave, ndev);
  2221. return 0;
  2222. fail:
  2223. gbe_slave_stop(gbe_intf);
  2224. return ret;
  2225. }
  2226. static int gbe_close(void *intf_priv, struct net_device *ndev)
  2227. {
  2228. struct gbe_intf *gbe_intf = intf_priv;
  2229. struct netcp_intf *netcp = netdev_priv(ndev);
  2230. gbe_slave_stop(gbe_intf);
  2231. netcp_unregister_txhook(netcp, GBE_TXHOOK_ORDER, gbe_tx_hook,
  2232. gbe_intf);
  2233. gbe_intf->slave->open = false;
  2234. atomic_set(&gbe_intf->slave->link_state, NETCP_LINK_STATE_INVALID);
  2235. return 0;
  2236. }
  2237. static int init_slave(struct gbe_priv *gbe_dev, struct gbe_slave *slave,
  2238. struct device_node *node)
  2239. {
  2240. int port_reg_num;
  2241. u32 port_reg_ofs, emac_reg_ofs;
  2242. u32 port_reg_blk_sz, emac_reg_blk_sz;
  2243. if (of_property_read_u32(node, "slave-port", &slave->slave_num)) {
  2244. dev_err(gbe_dev->dev, "missing slave-port parameter\n");
  2245. return -EINVAL;
  2246. }
  2247. if (of_property_read_u32(node, "link-interface",
  2248. &slave->link_interface)) {
  2249. dev_warn(gbe_dev->dev,
  2250. "missing link-interface value defaulting to 1G mac-phy link\n");
  2251. slave->link_interface = SGMII_LINK_MAC_PHY;
  2252. }
  2253. slave->open = false;
  2254. slave->phy_node = of_parse_phandle(node, "phy-handle", 0);
  2255. slave->port_num = gbe_get_slave_port(gbe_dev, slave->slave_num);
  2256. if (slave->link_interface >= XGMII_LINK_MAC_PHY)
  2257. slave->mac_control = GBE_DEF_10G_MAC_CONTROL;
  2258. else
  2259. slave->mac_control = GBE_DEF_1G_MAC_CONTROL;
  2260. /* Emac regs memmap are contiguous but port regs are not */
  2261. port_reg_num = slave->slave_num;
  2262. if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
  2263. if (slave->slave_num > 1) {
  2264. port_reg_ofs = GBE13_SLAVE_PORT2_OFFSET;
  2265. port_reg_num -= 2;
  2266. } else {
  2267. port_reg_ofs = GBE13_SLAVE_PORT_OFFSET;
  2268. }
  2269. emac_reg_ofs = GBE13_EMAC_OFFSET;
  2270. port_reg_blk_sz = 0x30;
  2271. emac_reg_blk_sz = 0x40;
  2272. } else if (IS_SS_ID_MU(gbe_dev)) {
  2273. port_reg_ofs = GBENU_SLAVE_PORT_OFFSET;
  2274. emac_reg_ofs = GBENU_EMAC_OFFSET;
  2275. port_reg_blk_sz = 0x1000;
  2276. emac_reg_blk_sz = 0x1000;
  2277. } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
  2278. port_reg_ofs = XGBE10_SLAVE_PORT_OFFSET;
  2279. emac_reg_ofs = XGBE10_EMAC_OFFSET;
  2280. port_reg_blk_sz = 0x30;
  2281. emac_reg_blk_sz = 0x40;
  2282. } else {
  2283. dev_err(gbe_dev->dev, "unknown ethss(0x%x)\n",
  2284. gbe_dev->ss_version);
  2285. return -EINVAL;
  2286. }
  2287. slave->port_regs = gbe_dev->switch_regs + port_reg_ofs +
  2288. (port_reg_blk_sz * port_reg_num);
  2289. slave->emac_regs = gbe_dev->switch_regs + emac_reg_ofs +
  2290. (emac_reg_blk_sz * slave->slave_num);
  2291. if (gbe_dev->ss_version == GBE_SS_VERSION_14) {
  2292. /* Initialize slave port register offsets */
  2293. GBE_SET_REG_OFS(slave, port_regs, port_vlan);
  2294. GBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
  2295. GBE_SET_REG_OFS(slave, port_regs, sa_lo);
  2296. GBE_SET_REG_OFS(slave, port_regs, sa_hi);
  2297. GBE_SET_REG_OFS(slave, port_regs, ts_ctl);
  2298. GBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
  2299. GBE_SET_REG_OFS(slave, port_regs, ts_vlan);
  2300. GBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
  2301. GBE_SET_REG_OFS(slave, port_regs, ts_ctl2);
  2302. /* Initialize EMAC register offsets */
  2303. GBE_SET_REG_OFS(slave, emac_regs, mac_control);
  2304. GBE_SET_REG_OFS(slave, emac_regs, soft_reset);
  2305. GBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
  2306. } else if (IS_SS_ID_MU(gbe_dev)) {
  2307. /* Initialize slave port register offsets */
  2308. GBENU_SET_REG_OFS(slave, port_regs, port_vlan);
  2309. GBENU_SET_REG_OFS(slave, port_regs, tx_pri_map);
  2310. GBENU_SET_REG_OFS(slave, port_regs, sa_lo);
  2311. GBENU_SET_REG_OFS(slave, port_regs, sa_hi);
  2312. GBENU_SET_REG_OFS(slave, port_regs, ts_ctl);
  2313. GBENU_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
  2314. GBENU_SET_REG_OFS(slave, port_regs, ts_vlan);
  2315. GBENU_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
  2316. GBENU_SET_REG_OFS(slave, port_regs, ts_ctl2);
  2317. GBENU_SET_REG_OFS(slave, port_regs, rx_maxlen);
  2318. /* Initialize EMAC register offsets */
  2319. GBENU_SET_REG_OFS(slave, emac_regs, mac_control);
  2320. GBENU_SET_REG_OFS(slave, emac_regs, soft_reset);
  2321. } else if (gbe_dev->ss_version == XGBE_SS_VERSION_10) {
  2322. /* Initialize slave port register offsets */
  2323. XGBE_SET_REG_OFS(slave, port_regs, port_vlan);
  2324. XGBE_SET_REG_OFS(slave, port_regs, tx_pri_map);
  2325. XGBE_SET_REG_OFS(slave, port_regs, sa_lo);
  2326. XGBE_SET_REG_OFS(slave, port_regs, sa_hi);
  2327. XGBE_SET_REG_OFS(slave, port_regs, ts_ctl);
  2328. XGBE_SET_REG_OFS(slave, port_regs, ts_seq_ltype);
  2329. XGBE_SET_REG_OFS(slave, port_regs, ts_vlan);
  2330. XGBE_SET_REG_OFS(slave, port_regs, ts_ctl_ltype2);
  2331. XGBE_SET_REG_OFS(slave, port_regs, ts_ctl2);
  2332. /* Initialize EMAC register offsets */
  2333. XGBE_SET_REG_OFS(slave, emac_regs, mac_control);
  2334. XGBE_SET_REG_OFS(slave, emac_regs, soft_reset);
  2335. XGBE_SET_REG_OFS(slave, emac_regs, rx_maxlen);
  2336. }
  2337. atomic_set(&slave->link_state, NETCP_LINK_STATE_INVALID);
  2338. return 0;
  2339. }
  2340. static void init_secondary_ports(struct gbe_priv *gbe_dev,
  2341. struct device_node *node)
  2342. {
  2343. struct device *dev = gbe_dev->dev;
  2344. phy_interface_t phy_mode;
  2345. struct gbe_priv **priv;
  2346. struct device_node *port;
  2347. struct gbe_slave *slave;
  2348. bool mac_phy_link = false;
  2349. for_each_child_of_node(node, port) {
  2350. slave = devm_kzalloc(dev, sizeof(*slave), GFP_KERNEL);
  2351. if (!slave) {
  2352. dev_err(dev,
  2353. "memomry alloc failed for secondary port(%s), skipping...\n",
  2354. port->name);
  2355. continue;
  2356. }
  2357. if (init_slave(gbe_dev, slave, port)) {
  2358. dev_err(dev,
  2359. "Failed to initialize secondary port(%s), skipping...\n",
  2360. port->name);
  2361. devm_kfree(dev, slave);
  2362. continue;
  2363. }
  2364. gbe_sgmii_config(gbe_dev, slave);
  2365. gbe_port_reset(slave);
  2366. gbe_port_config(gbe_dev, slave, gbe_dev->rx_packet_max);
  2367. list_add_tail(&slave->slave_list, &gbe_dev->secondary_slaves);
  2368. gbe_dev->num_slaves++;
  2369. if ((slave->link_interface == SGMII_LINK_MAC_PHY) ||
  2370. (slave->link_interface == XGMII_LINK_MAC_PHY))
  2371. mac_phy_link = true;
  2372. slave->open = true;
  2373. if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) {
  2374. of_node_put(port);
  2375. break;
  2376. }
  2377. }
  2378. /* of_phy_connect() is needed only for MAC-PHY interface */
  2379. if (!mac_phy_link)
  2380. return;
  2381. /* Allocate dummy netdev device for attaching to phy device */
  2382. gbe_dev->dummy_ndev = alloc_netdev(sizeof(gbe_dev), "dummy",
  2383. NET_NAME_UNKNOWN, ether_setup);
  2384. if (!gbe_dev->dummy_ndev) {
  2385. dev_err(dev,
  2386. "Failed to allocate dummy netdev for secondary ports, skipping phy_connect()...\n");
  2387. return;
  2388. }
  2389. priv = netdev_priv(gbe_dev->dummy_ndev);
  2390. *priv = gbe_dev;
  2391. if (slave->link_interface == SGMII_LINK_MAC_PHY) {
  2392. phy_mode = PHY_INTERFACE_MODE_SGMII;
  2393. slave->phy_port_t = PORT_MII;
  2394. } else {
  2395. phy_mode = PHY_INTERFACE_MODE_NA;
  2396. slave->phy_port_t = PORT_FIBRE;
  2397. }
  2398. for_each_sec_slave(slave, gbe_dev) {
  2399. if ((slave->link_interface != SGMII_LINK_MAC_PHY) &&
  2400. (slave->link_interface != XGMII_LINK_MAC_PHY))
  2401. continue;
  2402. slave->phy =
  2403. of_phy_connect(gbe_dev->dummy_ndev,
  2404. slave->phy_node,
  2405. gbe_adjust_link_sec_slaves,
  2406. 0, phy_mode);
  2407. if (!slave->phy) {
  2408. dev_err(dev, "phy not found for slave %d\n",
  2409. slave->slave_num);
  2410. slave->phy = NULL;
  2411. } else {
  2412. dev_dbg(dev, "phy found: id is: 0x%s\n",
  2413. phydev_name(slave->phy));
  2414. phy_start(slave->phy);
  2415. phy_read_status(slave->phy);
  2416. }
  2417. }
  2418. }
  2419. static void free_secondary_ports(struct gbe_priv *gbe_dev)
  2420. {
  2421. struct gbe_slave *slave;
  2422. while (!list_empty(&gbe_dev->secondary_slaves)) {
  2423. slave = first_sec_slave(gbe_dev);
  2424. if (slave->phy)
  2425. phy_disconnect(slave->phy);
  2426. list_del(&slave->slave_list);
  2427. }
  2428. if (gbe_dev->dummy_ndev)
  2429. free_netdev(gbe_dev->dummy_ndev);
  2430. }
  2431. static int set_xgbe_ethss10_priv(struct gbe_priv *gbe_dev,
  2432. struct device_node *node)
  2433. {
  2434. struct resource res;
  2435. void __iomem *regs;
  2436. int ret, i;
  2437. ret = of_address_to_resource(node, XGBE_SS_REG_INDEX, &res);
  2438. if (ret) {
  2439. dev_err(gbe_dev->dev,
  2440. "Can't xlate xgbe of node(%s) ss address at %d\n",
  2441. node->name, XGBE_SS_REG_INDEX);
  2442. return ret;
  2443. }
  2444. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  2445. if (IS_ERR(regs)) {
  2446. dev_err(gbe_dev->dev, "Failed to map xgbe ss register base\n");
  2447. return PTR_ERR(regs);
  2448. }
  2449. gbe_dev->ss_regs = regs;
  2450. ret = of_address_to_resource(node, XGBE_SM_REG_INDEX, &res);
  2451. if (ret) {
  2452. dev_err(gbe_dev->dev,
  2453. "Can't xlate xgbe of node(%s) sm address at %d\n",
  2454. node->name, XGBE_SM_REG_INDEX);
  2455. return ret;
  2456. }
  2457. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  2458. if (IS_ERR(regs)) {
  2459. dev_err(gbe_dev->dev, "Failed to map xgbe sm register base\n");
  2460. return PTR_ERR(regs);
  2461. }
  2462. gbe_dev->switch_regs = regs;
  2463. ret = of_address_to_resource(node, XGBE_SERDES_REG_INDEX, &res);
  2464. if (ret) {
  2465. dev_err(gbe_dev->dev,
  2466. "Can't xlate xgbe serdes of node(%s) address at %d\n",
  2467. node->name, XGBE_SERDES_REG_INDEX);
  2468. return ret;
  2469. }
  2470. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  2471. if (IS_ERR(regs)) {
  2472. dev_err(gbe_dev->dev, "Failed to map xgbe serdes register base\n");
  2473. return PTR_ERR(regs);
  2474. }
  2475. gbe_dev->xgbe_serdes_regs = regs;
  2476. gbe_dev->num_stats_mods = gbe_dev->max_num_ports;
  2477. gbe_dev->et_stats = xgbe10_et_stats;
  2478. gbe_dev->num_et_stats = ARRAY_SIZE(xgbe10_et_stats);
  2479. gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
  2480. gbe_dev->num_et_stats * sizeof(u64),
  2481. GFP_KERNEL);
  2482. if (!gbe_dev->hw_stats) {
  2483. dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
  2484. return -ENOMEM;
  2485. }
  2486. gbe_dev->hw_stats_prev =
  2487. devm_kzalloc(gbe_dev->dev,
  2488. gbe_dev->num_et_stats * sizeof(u32),
  2489. GFP_KERNEL);
  2490. if (!gbe_dev->hw_stats_prev) {
  2491. dev_err(gbe_dev->dev,
  2492. "hw_stats_prev memory allocation failed\n");
  2493. return -ENOMEM;
  2494. }
  2495. gbe_dev->ss_version = XGBE_SS_VERSION_10;
  2496. gbe_dev->sgmii_port_regs = gbe_dev->ss_regs +
  2497. XGBE10_SGMII_MODULE_OFFSET;
  2498. gbe_dev->host_port_regs = gbe_dev->ss_regs + XGBE10_HOST_PORT_OFFSET;
  2499. for (i = 0; i < gbe_dev->max_num_ports; i++)
  2500. gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs +
  2501. XGBE10_HW_STATS_OFFSET + (GBE_HW_STATS_REG_MAP_SZ * i);
  2502. gbe_dev->ale_reg = gbe_dev->switch_regs + XGBE10_ALE_OFFSET;
  2503. gbe_dev->ale_ports = gbe_dev->max_num_ports;
  2504. gbe_dev->host_port = XGBE10_HOST_PORT_NUM;
  2505. gbe_dev->ale_entries = XGBE10_NUM_ALE_ENTRIES;
  2506. gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1;
  2507. /* Subsystem registers */
  2508. XGBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
  2509. XGBE_SET_REG_OFS(gbe_dev, ss_regs, control);
  2510. /* Switch module registers */
  2511. XGBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
  2512. XGBE_SET_REG_OFS(gbe_dev, switch_regs, control);
  2513. XGBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
  2514. XGBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
  2515. XGBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);
  2516. /* Host port registers */
  2517. XGBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
  2518. XGBE_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
  2519. XGBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
  2520. return 0;
  2521. }
  2522. static int get_gbe_resource_version(struct gbe_priv *gbe_dev,
  2523. struct device_node *node)
  2524. {
  2525. struct resource res;
  2526. void __iomem *regs;
  2527. int ret;
  2528. ret = of_address_to_resource(node, GBE_SS_REG_INDEX, &res);
  2529. if (ret) {
  2530. dev_err(gbe_dev->dev,
  2531. "Can't translate of node(%s) of gbe ss address at %d\n",
  2532. node->name, GBE_SS_REG_INDEX);
  2533. return ret;
  2534. }
  2535. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  2536. if (IS_ERR(regs)) {
  2537. dev_err(gbe_dev->dev, "Failed to map gbe register base\n");
  2538. return PTR_ERR(regs);
  2539. }
  2540. gbe_dev->ss_regs = regs;
  2541. gbe_dev->ss_version = readl(gbe_dev->ss_regs);
  2542. return 0;
  2543. }
  2544. static int set_gbe_ethss14_priv(struct gbe_priv *gbe_dev,
  2545. struct device_node *node)
  2546. {
  2547. struct resource res;
  2548. void __iomem *regs;
  2549. int i, ret;
  2550. ret = of_address_to_resource(node, GBE_SGMII34_REG_INDEX, &res);
  2551. if (ret) {
  2552. dev_err(gbe_dev->dev,
  2553. "Can't translate of gbe node(%s) address at index %d\n",
  2554. node->name, GBE_SGMII34_REG_INDEX);
  2555. return ret;
  2556. }
  2557. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  2558. if (IS_ERR(regs)) {
  2559. dev_err(gbe_dev->dev,
  2560. "Failed to map gbe sgmii port34 register base\n");
  2561. return PTR_ERR(regs);
  2562. }
  2563. gbe_dev->sgmii_port34_regs = regs;
  2564. ret = of_address_to_resource(node, GBE_SM_REG_INDEX, &res);
  2565. if (ret) {
  2566. dev_err(gbe_dev->dev,
  2567. "Can't translate of gbe node(%s) address at index %d\n",
  2568. node->name, GBE_SM_REG_INDEX);
  2569. return ret;
  2570. }
  2571. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  2572. if (IS_ERR(regs)) {
  2573. dev_err(gbe_dev->dev,
  2574. "Failed to map gbe switch module register base\n");
  2575. return PTR_ERR(regs);
  2576. }
  2577. gbe_dev->switch_regs = regs;
  2578. gbe_dev->num_stats_mods = gbe_dev->max_num_slaves;
  2579. gbe_dev->et_stats = gbe13_et_stats;
  2580. gbe_dev->num_et_stats = ARRAY_SIZE(gbe13_et_stats);
  2581. gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
  2582. gbe_dev->num_et_stats * sizeof(u64),
  2583. GFP_KERNEL);
  2584. if (!gbe_dev->hw_stats) {
  2585. dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
  2586. return -ENOMEM;
  2587. }
  2588. gbe_dev->hw_stats_prev =
  2589. devm_kzalloc(gbe_dev->dev,
  2590. gbe_dev->num_et_stats * sizeof(u32),
  2591. GFP_KERNEL);
  2592. if (!gbe_dev->hw_stats_prev) {
  2593. dev_err(gbe_dev->dev,
  2594. "hw_stats_prev memory allocation failed\n");
  2595. return -ENOMEM;
  2596. }
  2597. gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBE13_SGMII_MODULE_OFFSET;
  2598. gbe_dev->host_port_regs = gbe_dev->switch_regs + GBE13_HOST_PORT_OFFSET;
  2599. /* K2HK has only 2 hw stats modules visible at a time, so
  2600. * module 0 & 2 points to one base and
  2601. * module 1 & 3 points to the other base
  2602. */
  2603. for (i = 0; i < gbe_dev->max_num_slaves; i++) {
  2604. gbe_dev->hw_stats_regs[i] =
  2605. gbe_dev->switch_regs + GBE13_HW_STATS_OFFSET +
  2606. (GBE_HW_STATS_REG_MAP_SZ * (i & 0x1));
  2607. }
  2608. gbe_dev->ale_reg = gbe_dev->switch_regs + GBE13_ALE_OFFSET;
  2609. gbe_dev->ale_ports = gbe_dev->max_num_ports;
  2610. gbe_dev->host_port = GBE13_HOST_PORT_NUM;
  2611. gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
  2612. gbe_dev->stats_en_mask = GBE13_REG_VAL_STAT_ENABLE_ALL;
  2613. /* Subsystem registers */
  2614. GBE_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
  2615. /* Switch module registers */
  2616. GBE_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
  2617. GBE_SET_REG_OFS(gbe_dev, switch_regs, control);
  2618. GBE_SET_REG_OFS(gbe_dev, switch_regs, soft_reset);
  2619. GBE_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
  2620. GBE_SET_REG_OFS(gbe_dev, switch_regs, ptype);
  2621. GBE_SET_REG_OFS(gbe_dev, switch_regs, flow_control);
  2622. /* Host port registers */
  2623. GBE_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
  2624. GBE_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
  2625. return 0;
  2626. }
  2627. static int set_gbenu_ethss_priv(struct gbe_priv *gbe_dev,
  2628. struct device_node *node)
  2629. {
  2630. struct resource res;
  2631. void __iomem *regs;
  2632. int i, ret;
  2633. gbe_dev->num_stats_mods = gbe_dev->max_num_ports;
  2634. gbe_dev->et_stats = gbenu_et_stats;
  2635. if (IS_SS_ID_NU(gbe_dev))
  2636. gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE +
  2637. (gbe_dev->max_num_slaves * GBENU_ET_STATS_PORT_SIZE);
  2638. else
  2639. gbe_dev->num_et_stats = GBENU_ET_STATS_HOST_SIZE +
  2640. GBENU_ET_STATS_PORT_SIZE;
  2641. gbe_dev->hw_stats = devm_kzalloc(gbe_dev->dev,
  2642. gbe_dev->num_et_stats * sizeof(u64),
  2643. GFP_KERNEL);
  2644. if (!gbe_dev->hw_stats) {
  2645. dev_err(gbe_dev->dev, "hw_stats memory allocation failed\n");
  2646. return -ENOMEM;
  2647. }
  2648. gbe_dev->hw_stats_prev =
  2649. devm_kzalloc(gbe_dev->dev,
  2650. gbe_dev->num_et_stats * sizeof(u32),
  2651. GFP_KERNEL);
  2652. if (!gbe_dev->hw_stats_prev) {
  2653. dev_err(gbe_dev->dev,
  2654. "hw_stats_prev memory allocation failed\n");
  2655. return -ENOMEM;
  2656. }
  2657. ret = of_address_to_resource(node, GBENU_SM_REG_INDEX, &res);
  2658. if (ret) {
  2659. dev_err(gbe_dev->dev,
  2660. "Can't translate of gbenu node(%s) addr at index %d\n",
  2661. node->name, GBENU_SM_REG_INDEX);
  2662. return ret;
  2663. }
  2664. regs = devm_ioremap_resource(gbe_dev->dev, &res);
  2665. if (IS_ERR(regs)) {
  2666. dev_err(gbe_dev->dev,
  2667. "Failed to map gbenu switch module register base\n");
  2668. return PTR_ERR(regs);
  2669. }
  2670. gbe_dev->switch_regs = regs;
  2671. gbe_dev->sgmii_port_regs = gbe_dev->ss_regs + GBENU_SGMII_MODULE_OFFSET;
  2672. /* Although sgmii modules are mem mapped to one contiguous
  2673. * region on GBENU devices, setting sgmii_port34_regs allows
  2674. * consistent code when accessing sgmii api
  2675. */
  2676. gbe_dev->sgmii_port34_regs = gbe_dev->sgmii_port_regs +
  2677. (2 * GBENU_SGMII_MODULE_SIZE);
  2678. gbe_dev->host_port_regs = gbe_dev->switch_regs + GBENU_HOST_PORT_OFFSET;
  2679. for (i = 0; i < (gbe_dev->max_num_ports); i++)
  2680. gbe_dev->hw_stats_regs[i] = gbe_dev->switch_regs +
  2681. GBENU_HW_STATS_OFFSET + (GBENU_HW_STATS_REG_MAP_SZ * i);
  2682. gbe_dev->ale_reg = gbe_dev->switch_regs + GBENU_ALE_OFFSET;
  2683. gbe_dev->ale_ports = gbe_dev->max_num_ports;
  2684. gbe_dev->host_port = GBENU_HOST_PORT_NUM;
  2685. gbe_dev->ale_entries = GBE13_NUM_ALE_ENTRIES;
  2686. gbe_dev->stats_en_mask = (1 << (gbe_dev->max_num_ports)) - 1;
  2687. /* Subsystem registers */
  2688. GBENU_SET_REG_OFS(gbe_dev, ss_regs, id_ver);
  2689. /* Switch module registers */
  2690. GBENU_SET_REG_OFS(gbe_dev, switch_regs, id_ver);
  2691. GBENU_SET_REG_OFS(gbe_dev, switch_regs, control);
  2692. GBENU_SET_REG_OFS(gbe_dev, switch_regs, stat_port_en);
  2693. GBENU_SET_REG_OFS(gbe_dev, switch_regs, ptype);
  2694. /* Host port registers */
  2695. GBENU_SET_REG_OFS(gbe_dev, host_port_regs, port_vlan);
  2696. GBENU_SET_REG_OFS(gbe_dev, host_port_regs, rx_maxlen);
  2697. /* For NU only. 2U does not need tx_pri_map.
  2698. * NU cppi port 0 tx pkt streaming interface has (n-1)*8 egress threads
  2699. * while 2U has only 1 such thread
  2700. */
  2701. GBENU_SET_REG_OFS(gbe_dev, host_port_regs, tx_pri_map);
  2702. return 0;
  2703. }
  2704. static int gbe_probe(struct netcp_device *netcp_device, struct device *dev,
  2705. struct device_node *node, void **inst_priv)
  2706. {
  2707. struct device_node *interfaces, *interface;
  2708. struct device_node *secondary_ports;
  2709. struct cpsw_ale_params ale_params;
  2710. struct gbe_priv *gbe_dev;
  2711. u32 slave_num;
  2712. int i, ret = 0;
  2713. if (!node) {
  2714. dev_err(dev, "device tree info unavailable\n");
  2715. return -ENODEV;
  2716. }
  2717. gbe_dev = devm_kzalloc(dev, sizeof(struct gbe_priv), GFP_KERNEL);
  2718. if (!gbe_dev)
  2719. return -ENOMEM;
  2720. if (of_device_is_compatible(node, "ti,netcp-gbe-5") ||
  2721. of_device_is_compatible(node, "ti,netcp-gbe")) {
  2722. gbe_dev->max_num_slaves = 4;
  2723. } else if (of_device_is_compatible(node, "ti,netcp-gbe-9")) {
  2724. gbe_dev->max_num_slaves = 8;
  2725. } else if (of_device_is_compatible(node, "ti,netcp-gbe-2")) {
  2726. gbe_dev->max_num_slaves = 1;
  2727. } else if (of_device_is_compatible(node, "ti,netcp-xgbe")) {
  2728. gbe_dev->max_num_slaves = 2;
  2729. } else {
  2730. dev_err(dev, "device tree node for unknown device\n");
  2731. return -EINVAL;
  2732. }
  2733. gbe_dev->max_num_ports = gbe_dev->max_num_slaves + 1;
  2734. gbe_dev->dev = dev;
  2735. gbe_dev->netcp_device = netcp_device;
  2736. gbe_dev->rx_packet_max = NETCP_MAX_FRAME_SIZE;
  2737. /* init the hw stats lock */
  2738. spin_lock_init(&gbe_dev->hw_stats_lock);
  2739. if (of_find_property(node, "enable-ale", NULL)) {
  2740. gbe_dev->enable_ale = true;
  2741. dev_info(dev, "ALE enabled\n");
  2742. } else {
  2743. gbe_dev->enable_ale = false;
  2744. dev_dbg(dev, "ALE bypass enabled*\n");
  2745. }
  2746. ret = of_property_read_u32(node, "tx-queue",
  2747. &gbe_dev->tx_queue_id);
  2748. if (ret < 0) {
  2749. dev_err(dev, "missing tx_queue parameter\n");
  2750. gbe_dev->tx_queue_id = GBE_TX_QUEUE;
  2751. }
  2752. ret = of_property_read_string(node, "tx-channel",
  2753. &gbe_dev->dma_chan_name);
  2754. if (ret < 0) {
  2755. dev_err(dev, "missing \"tx-channel\" parameter\n");
  2756. return -EINVAL;
  2757. }
  2758. if (!strcmp(node->name, "gbe")) {
  2759. ret = get_gbe_resource_version(gbe_dev, node);
  2760. if (ret)
  2761. return ret;
  2762. dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version);
  2763. if (gbe_dev->ss_version == GBE_SS_VERSION_14)
  2764. ret = set_gbe_ethss14_priv(gbe_dev, node);
  2765. else if (IS_SS_ID_MU(gbe_dev))
  2766. ret = set_gbenu_ethss_priv(gbe_dev, node);
  2767. else
  2768. ret = -ENODEV;
  2769. } else if (!strcmp(node->name, "xgbe")) {
  2770. ret = set_xgbe_ethss10_priv(gbe_dev, node);
  2771. if (ret)
  2772. return ret;
  2773. ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs,
  2774. gbe_dev->ss_regs);
  2775. } else {
  2776. dev_err(dev, "unknown GBE node(%s)\n", node->name);
  2777. ret = -ENODEV;
  2778. }
  2779. if (ret)
  2780. return ret;
  2781. interfaces = of_get_child_by_name(node, "interfaces");
  2782. if (!interfaces)
  2783. dev_err(dev, "could not find interfaces\n");
  2784. ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device,
  2785. gbe_dev->dma_chan_name, gbe_dev->tx_queue_id);
  2786. if (ret)
  2787. return ret;
  2788. ret = netcp_txpipe_open(&gbe_dev->tx_pipe);
  2789. if (ret)
  2790. return ret;
  2791. /* Create network interfaces */
  2792. INIT_LIST_HEAD(&gbe_dev->gbe_intf_head);
  2793. for_each_child_of_node(interfaces, interface) {
  2794. ret = of_property_read_u32(interface, "slave-port", &slave_num);
  2795. if (ret) {
  2796. dev_err(dev, "missing slave-port parameter, skipping interface configuration for %s\n",
  2797. interface->name);
  2798. continue;
  2799. }
  2800. gbe_dev->num_slaves++;
  2801. if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves) {
  2802. of_node_put(interface);
  2803. break;
  2804. }
  2805. }
  2806. of_node_put(interfaces);
  2807. if (!gbe_dev->num_slaves)
  2808. dev_warn(dev, "No network interface configured\n");
  2809. /* Initialize Secondary slave ports */
  2810. secondary_ports = of_get_child_by_name(node, "secondary-slave-ports");
  2811. INIT_LIST_HEAD(&gbe_dev->secondary_slaves);
  2812. if (secondary_ports && (gbe_dev->num_slaves < gbe_dev->max_num_slaves))
  2813. init_secondary_ports(gbe_dev, secondary_ports);
  2814. of_node_put(secondary_ports);
  2815. if (!gbe_dev->num_slaves) {
  2816. dev_err(dev,
  2817. "No network interface or secondary ports configured\n");
  2818. ret = -ENODEV;
  2819. goto free_sec_ports;
  2820. }
  2821. memset(&ale_params, 0, sizeof(ale_params));
  2822. ale_params.dev = gbe_dev->dev;
  2823. ale_params.ale_regs = gbe_dev->ale_reg;
  2824. ale_params.ale_ageout = GBE_DEFAULT_ALE_AGEOUT;
  2825. ale_params.ale_entries = gbe_dev->ale_entries;
  2826. ale_params.ale_ports = gbe_dev->ale_ports;
  2827. gbe_dev->ale = cpsw_ale_create(&ale_params);
  2828. if (!gbe_dev->ale) {
  2829. dev_err(gbe_dev->dev, "error initializing ale engine\n");
  2830. ret = -ENODEV;
  2831. goto free_sec_ports;
  2832. } else {
  2833. dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n");
  2834. }
  2835. /* initialize host port */
  2836. gbe_init_host_port(gbe_dev);
  2837. spin_lock_bh(&gbe_dev->hw_stats_lock);
  2838. for (i = 0; i < gbe_dev->num_stats_mods; i++) {
  2839. if (gbe_dev->ss_version == GBE_SS_VERSION_14)
  2840. gbe_reset_mod_stats_ver14(gbe_dev, i);
  2841. else
  2842. gbe_reset_mod_stats(gbe_dev, i);
  2843. }
  2844. spin_unlock_bh(&gbe_dev->hw_stats_lock);
  2845. init_timer(&gbe_dev->timer);
  2846. gbe_dev->timer.data = (unsigned long)gbe_dev;
  2847. gbe_dev->timer.function = netcp_ethss_timer;
  2848. gbe_dev->timer.expires = jiffies + GBE_TIMER_INTERVAL;
  2849. add_timer(&gbe_dev->timer);
  2850. *inst_priv = gbe_dev;
  2851. return 0;
  2852. free_sec_ports:
  2853. free_secondary_ports(gbe_dev);
  2854. return ret;
  2855. }
  2856. static int gbe_attach(void *inst_priv, struct net_device *ndev,
  2857. struct device_node *node, void **intf_priv)
  2858. {
  2859. struct gbe_priv *gbe_dev = inst_priv;
  2860. struct gbe_intf *gbe_intf;
  2861. int ret;
  2862. if (!node) {
  2863. dev_err(gbe_dev->dev, "interface node not available\n");
  2864. return -ENODEV;
  2865. }
  2866. gbe_intf = devm_kzalloc(gbe_dev->dev, sizeof(*gbe_intf), GFP_KERNEL);
  2867. if (!gbe_intf)
  2868. return -ENOMEM;
  2869. gbe_intf->ndev = ndev;
  2870. gbe_intf->dev = gbe_dev->dev;
  2871. gbe_intf->gbe_dev = gbe_dev;
  2872. gbe_intf->slave = devm_kzalloc(gbe_dev->dev,
  2873. sizeof(*gbe_intf->slave),
  2874. GFP_KERNEL);
  2875. if (!gbe_intf->slave) {
  2876. ret = -ENOMEM;
  2877. goto fail;
  2878. }
  2879. if (init_slave(gbe_dev, gbe_intf->slave, node)) {
  2880. ret = -ENODEV;
  2881. goto fail;
  2882. }
  2883. gbe_intf->tx_pipe = gbe_dev->tx_pipe;
  2884. ndev->ethtool_ops = &keystone_ethtool_ops;
  2885. list_add_tail(&gbe_intf->gbe_intf_list, &gbe_dev->gbe_intf_head);
  2886. *intf_priv = gbe_intf;
  2887. return 0;
  2888. fail:
  2889. if (gbe_intf->slave)
  2890. devm_kfree(gbe_dev->dev, gbe_intf->slave);
  2891. if (gbe_intf)
  2892. devm_kfree(gbe_dev->dev, gbe_intf);
  2893. return ret;
  2894. }
  2895. static int gbe_release(void *intf_priv)
  2896. {
  2897. struct gbe_intf *gbe_intf = intf_priv;
  2898. gbe_intf->ndev->ethtool_ops = NULL;
  2899. list_del(&gbe_intf->gbe_intf_list);
  2900. devm_kfree(gbe_intf->dev, gbe_intf->slave);
  2901. devm_kfree(gbe_intf->dev, gbe_intf);
  2902. return 0;
  2903. }
  2904. static int gbe_remove(struct netcp_device *netcp_device, void *inst_priv)
  2905. {
  2906. struct gbe_priv *gbe_dev = inst_priv;
  2907. del_timer_sync(&gbe_dev->timer);
  2908. cpsw_ale_stop(gbe_dev->ale);
  2909. cpsw_ale_destroy(gbe_dev->ale);
  2910. netcp_txpipe_close(&gbe_dev->tx_pipe);
  2911. free_secondary_ports(gbe_dev);
  2912. if (!list_empty(&gbe_dev->gbe_intf_head))
  2913. dev_alert(gbe_dev->dev,
  2914. "unreleased ethss interfaces present\n");
  2915. return 0;
  2916. }
  2917. static struct netcp_module gbe_module = {
  2918. .name = GBE_MODULE_NAME,
  2919. .owner = THIS_MODULE,
  2920. .primary = true,
  2921. .probe = gbe_probe,
  2922. .open = gbe_open,
  2923. .close = gbe_close,
  2924. .remove = gbe_remove,
  2925. .attach = gbe_attach,
  2926. .release = gbe_release,
  2927. .add_addr = gbe_add_addr,
  2928. .del_addr = gbe_del_addr,
  2929. .add_vid = gbe_add_vid,
  2930. .del_vid = gbe_del_vid,
  2931. .ioctl = gbe_ioctl,
  2932. };
  2933. static struct netcp_module xgbe_module = {
  2934. .name = XGBE_MODULE_NAME,
  2935. .owner = THIS_MODULE,
  2936. .primary = true,
  2937. .probe = gbe_probe,
  2938. .open = gbe_open,
  2939. .close = gbe_close,
  2940. .remove = gbe_remove,
  2941. .attach = gbe_attach,
  2942. .release = gbe_release,
  2943. .add_addr = gbe_add_addr,
  2944. .del_addr = gbe_del_addr,
  2945. .add_vid = gbe_add_vid,
  2946. .del_vid = gbe_del_vid,
  2947. .ioctl = gbe_ioctl,
  2948. };
  2949. static int __init keystone_gbe_init(void)
  2950. {
  2951. int ret;
  2952. ret = netcp_register_module(&gbe_module);
  2953. if (ret)
  2954. return ret;
  2955. ret = netcp_register_module(&xgbe_module);
  2956. if (ret)
  2957. return ret;
  2958. return 0;
  2959. }
  2960. module_init(keystone_gbe_init);
  2961. static void __exit keystone_gbe_exit(void)
  2962. {
  2963. netcp_unregister_module(&gbe_module);
  2964. netcp_unregister_module(&xgbe_module);
  2965. }
  2966. module_exit(keystone_gbe_exit);
  2967. MODULE_LICENSE("GPL v2");
  2968. MODULE_DESCRIPTION("TI NETCP ETHSS driver for Keystone SOCs");
  2969. MODULE_AUTHOR("Sandeep Nair <sandeep_n@ti.com");