sxgbe_mtl.h 2.8 KB

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  1. /* 10G controller driver for Samsung SoCs
  2. *
  3. * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Author: Siva Reddy Kallam <siva.kallam@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #ifndef __SXGBE_MTL_H__
  13. #define __SXGBE_MTL_H__
  14. #define SXGBE_MTL_OPMODE_ESTMASK 0x3
  15. #define SXGBE_MTL_OPMODE_RAAMASK 0x1
  16. #define SXGBE_MTL_FCMASK 0x7
  17. #define SXGBE_MTL_TX_FIFO_DIV 256
  18. #define SXGBE_MTL_RX_FIFO_DIV 256
  19. #define SXGBE_MTL_RXQ_OP_FEP BIT(4)
  20. #define SXGBE_MTL_RXQ_OP_FUP BIT(3)
  21. #define SXGBE_MTL_ENABLE_FC 0x80
  22. #define ETS_WRR 0xFFFFFF9F
  23. #define ETS_RST 0xFFFFFF9F
  24. #define ETS_WFQ 0x00000020
  25. #define ETS_DWRR 0x00000040
  26. #define RAA_SP 0xFFFFFFFB
  27. #define RAA_WSP 0x00000004
  28. #define RX_QUEUE_DYNAMIC 0x80808080
  29. #define RX_FC_ACTIVE 8
  30. #define RX_FC_DEACTIVE 13
  31. enum ttc_control {
  32. MTL_CONTROL_TTC_64 = 0x00000000,
  33. MTL_CONTROL_TTC_96 = 0x00000020,
  34. MTL_CONTROL_TTC_128 = 0x00000030,
  35. MTL_CONTROL_TTC_192 = 0x00000040,
  36. MTL_CONTROL_TTC_256 = 0x00000050,
  37. MTL_CONTROL_TTC_384 = 0x00000060,
  38. MTL_CONTROL_TTC_512 = 0x00000070,
  39. };
  40. enum rtc_control {
  41. MTL_CONTROL_RTC_64 = 0x00000000,
  42. MTL_CONTROL_RTC_96 = 0x00000002,
  43. MTL_CONTROL_RTC_128 = 0x00000003,
  44. };
  45. enum flow_control_th {
  46. MTL_FC_FULL_1K = 0x00000000,
  47. MTL_FC_FULL_2K = 0x00000001,
  48. MTL_FC_FULL_4K = 0x00000002,
  49. MTL_FC_FULL_5K = 0x00000003,
  50. MTL_FC_FULL_6K = 0x00000004,
  51. MTL_FC_FULL_8K = 0x00000005,
  52. MTL_FC_FULL_16K = 0x00000006,
  53. MTL_FC_FULL_24K = 0x00000007,
  54. };
  55. struct sxgbe_mtl_ops {
  56. void (*mtl_init)(void __iomem *ioaddr, unsigned int etsalg,
  57. unsigned int raa);
  58. void (*mtl_set_txfifosize)(void __iomem *ioaddr, int queue_num,
  59. int mtl_fifo);
  60. void (*mtl_set_rxfifosize)(void __iomem *ioaddr, int queue_num,
  61. int queue_fifo);
  62. void (*mtl_enable_txqueue)(void __iomem *ioaddr, int queue_num);
  63. void (*mtl_disable_txqueue)(void __iomem *ioaddr, int queue_num);
  64. void (*set_tx_mtl_mode)(void __iomem *ioaddr, int queue_num,
  65. int tx_mode);
  66. void (*set_rx_mtl_mode)(void __iomem *ioaddr, int queue_num,
  67. int rx_mode);
  68. void (*mtl_dynamic_dma_rxqueue)(void __iomem *ioaddr);
  69. void (*mtl_fc_active)(void __iomem *ioaddr, int queue_num,
  70. int threshold);
  71. void (*mtl_fc_deactive)(void __iomem *ioaddr, int queue_num,
  72. int threshold);
  73. void (*mtl_fc_enable)(void __iomem *ioaddr, int queue_num);
  74. void (*mtl_fep_enable)(void __iomem *ioaddr, int queue_num);
  75. void (*mtl_fep_disable)(void __iomem *ioaddr, int queue_num);
  76. void (*mtl_fup_enable)(void __iomem *ioaddr, int queue_num);
  77. void (*mtl_fup_disable)(void __iomem *ioaddr, int queue_num);
  78. };
  79. const struct sxgbe_mtl_ops *sxgbe_get_mtl_ops(void);
  80. #endif /* __SXGBE_MTL_H__ */