spectrum.c 125 KB

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  1. /*
  2. * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
  3. * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
  4. * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
  5. * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
  6. * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
  7. *
  8. * Redistribution and use in source and binary forms, with or without
  9. * modification, are permitted provided that the following conditions are met:
  10. *
  11. * 1. Redistributions of source code must retain the above copyright
  12. * notice, this list of conditions and the following disclaimer.
  13. * 2. Redistributions in binary form must reproduce the above copyright
  14. * notice, this list of conditions and the following disclaimer in the
  15. * documentation and/or other materials provided with the distribution.
  16. * 3. Neither the names of the copyright holders nor the names of its
  17. * contributors may be used to endorse or promote products derived from
  18. * this software without specific prior written permission.
  19. *
  20. * Alternatively, this software may be distributed under the terms of the
  21. * GNU General Public License ("GPL") version 2 as published by the Free
  22. * Software Foundation.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  27. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  28. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  31. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  32. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  33. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  34. * POSSIBILITY OF SUCH DAMAGE.
  35. */
  36. #include <linux/kernel.h>
  37. #include <linux/module.h>
  38. #include <linux/types.h>
  39. #include <linux/netdevice.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/ethtool.h>
  42. #include <linux/slab.h>
  43. #include <linux/device.h>
  44. #include <linux/skbuff.h>
  45. #include <linux/if_vlan.h>
  46. #include <linux/if_bridge.h>
  47. #include <linux/workqueue.h>
  48. #include <linux/jiffies.h>
  49. #include <linux/bitops.h>
  50. #include <linux/list.h>
  51. #include <linux/notifier.h>
  52. #include <linux/dcbnl.h>
  53. #include <linux/inetdevice.h>
  54. #include <net/switchdev.h>
  55. #include <generated/utsrelease.h>
  56. #include <net/pkt_cls.h>
  57. #include <net/tc_act/tc_mirred.h>
  58. #include <net/netevent.h>
  59. #include "spectrum.h"
  60. #include "core.h"
  61. #include "reg.h"
  62. #include "port.h"
  63. #include "trap.h"
  64. #include "txheader.h"
  65. static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
  66. static const char mlxsw_sp_driver_version[] = "1.0";
  67. /* tx_hdr_version
  68. * Tx header version.
  69. * Must be set to 1.
  70. */
  71. MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
  72. /* tx_hdr_ctl
  73. * Packet control type.
  74. * 0 - Ethernet control (e.g. EMADs, LACP)
  75. * 1 - Ethernet data
  76. */
  77. MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
  78. /* tx_hdr_proto
  79. * Packet protocol type. Must be set to 1 (Ethernet).
  80. */
  81. MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
  82. /* tx_hdr_rx_is_router
  83. * Packet is sent from the router. Valid for data packets only.
  84. */
  85. MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
  86. /* tx_hdr_fid_valid
  87. * Indicates if the 'fid' field is valid and should be used for
  88. * forwarding lookup. Valid for data packets only.
  89. */
  90. MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
  91. /* tx_hdr_swid
  92. * Switch partition ID. Must be set to 0.
  93. */
  94. MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
  95. /* tx_hdr_control_tclass
  96. * Indicates if the packet should use the control TClass and not one
  97. * of the data TClasses.
  98. */
  99. MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
  100. /* tx_hdr_etclass
  101. * Egress TClass to be used on the egress device on the egress port.
  102. */
  103. MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
  104. /* tx_hdr_port_mid
  105. * Destination local port for unicast packets.
  106. * Destination multicast ID for multicast packets.
  107. *
  108. * Control packets are directed to a specific egress port, while data
  109. * packets are transmitted through the CPU port (0) into the switch partition,
  110. * where forwarding rules are applied.
  111. */
  112. MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
  113. /* tx_hdr_fid
  114. * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
  115. * set, otherwise calculated based on the packet's VID using VID to FID mapping.
  116. * Valid for data packets only.
  117. */
  118. MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
  119. /* tx_hdr_type
  120. * 0 - Data packets
  121. * 6 - Control packets
  122. */
  123. MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
  124. static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
  125. static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
  126. const struct mlxsw_tx_info *tx_info)
  127. {
  128. char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
  129. memset(txhdr, 0, MLXSW_TXHDR_LEN);
  130. mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
  131. mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
  132. mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
  133. mlxsw_tx_hdr_swid_set(txhdr, 0);
  134. mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
  135. mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
  136. mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
  137. }
  138. static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
  139. {
  140. char spad_pl[MLXSW_REG_SPAD_LEN];
  141. int err;
  142. err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
  143. if (err)
  144. return err;
  145. mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
  146. return 0;
  147. }
  148. static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
  149. {
  150. struct mlxsw_resources *resources;
  151. int i;
  152. resources = mlxsw_core_resources_get(mlxsw_sp->core);
  153. if (!resources->max_span_valid)
  154. return -EIO;
  155. mlxsw_sp->span.entries_count = resources->max_span;
  156. mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
  157. sizeof(struct mlxsw_sp_span_entry),
  158. GFP_KERNEL);
  159. if (!mlxsw_sp->span.entries)
  160. return -ENOMEM;
  161. for (i = 0; i < mlxsw_sp->span.entries_count; i++)
  162. INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
  163. return 0;
  164. }
  165. static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
  166. {
  167. int i;
  168. for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
  169. struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
  170. WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
  171. }
  172. kfree(mlxsw_sp->span.entries);
  173. }
  174. static struct mlxsw_sp_span_entry *
  175. mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
  176. {
  177. struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
  178. struct mlxsw_sp_span_entry *span_entry;
  179. char mpat_pl[MLXSW_REG_MPAT_LEN];
  180. u8 local_port = port->local_port;
  181. int index;
  182. int i;
  183. int err;
  184. /* find a free entry to use */
  185. index = -1;
  186. for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
  187. if (!mlxsw_sp->span.entries[i].used) {
  188. index = i;
  189. span_entry = &mlxsw_sp->span.entries[i];
  190. break;
  191. }
  192. }
  193. if (index < 0)
  194. return NULL;
  195. /* create a new port analayzer entry for local_port */
  196. mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
  197. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
  198. if (err)
  199. return NULL;
  200. span_entry->used = true;
  201. span_entry->id = index;
  202. span_entry->ref_count = 1;
  203. span_entry->local_port = local_port;
  204. return span_entry;
  205. }
  206. static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
  207. struct mlxsw_sp_span_entry *span_entry)
  208. {
  209. u8 local_port = span_entry->local_port;
  210. char mpat_pl[MLXSW_REG_MPAT_LEN];
  211. int pa_id = span_entry->id;
  212. mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
  213. mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
  214. span_entry->used = false;
  215. }
  216. static struct mlxsw_sp_span_entry *
  217. mlxsw_sp_span_entry_find(struct mlxsw_sp *mlxsw_sp, u8 local_port)
  218. {
  219. int i;
  220. for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
  221. struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
  222. if (curr->used && curr->local_port == local_port)
  223. return curr;
  224. }
  225. return NULL;
  226. }
  227. static struct mlxsw_sp_span_entry
  228. *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
  229. {
  230. struct mlxsw_sp_span_entry *span_entry;
  231. span_entry = mlxsw_sp_span_entry_find(port->mlxsw_sp,
  232. port->local_port);
  233. if (span_entry) {
  234. /* Already exists, just take a reference */
  235. span_entry->ref_count++;
  236. return span_entry;
  237. }
  238. return mlxsw_sp_span_entry_create(port);
  239. }
  240. static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
  241. struct mlxsw_sp_span_entry *span_entry)
  242. {
  243. WARN_ON(!span_entry->ref_count);
  244. if (--span_entry->ref_count == 0)
  245. mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
  246. return 0;
  247. }
  248. static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
  249. {
  250. struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
  251. struct mlxsw_sp_span_inspected_port *p;
  252. int i;
  253. for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
  254. struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
  255. list_for_each_entry(p, &curr->bound_ports_list, list)
  256. if (p->local_port == port->local_port &&
  257. p->type == MLXSW_SP_SPAN_EGRESS)
  258. return true;
  259. }
  260. return false;
  261. }
  262. static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
  263. {
  264. return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
  265. }
  266. static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
  267. {
  268. struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
  269. char sbib_pl[MLXSW_REG_SBIB_LEN];
  270. int err;
  271. /* If port is egress mirrored, the shared buffer size should be
  272. * updated according to the mtu value
  273. */
  274. if (mlxsw_sp_span_is_egress_mirror(port)) {
  275. mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
  276. mlxsw_sp_span_mtu_to_buffsize(mtu));
  277. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
  278. if (err) {
  279. netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
  280. return err;
  281. }
  282. }
  283. return 0;
  284. }
  285. static struct mlxsw_sp_span_inspected_port *
  286. mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
  287. struct mlxsw_sp_span_entry *span_entry)
  288. {
  289. struct mlxsw_sp_span_inspected_port *p;
  290. list_for_each_entry(p, &span_entry->bound_ports_list, list)
  291. if (port->local_port == p->local_port)
  292. return p;
  293. return NULL;
  294. }
  295. static int
  296. mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
  297. struct mlxsw_sp_span_entry *span_entry,
  298. enum mlxsw_sp_span_type type)
  299. {
  300. struct mlxsw_sp_span_inspected_port *inspected_port;
  301. struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
  302. char mpar_pl[MLXSW_REG_MPAR_LEN];
  303. char sbib_pl[MLXSW_REG_SBIB_LEN];
  304. int pa_id = span_entry->id;
  305. int err;
  306. /* if it is an egress SPAN, bind a shared buffer to it */
  307. if (type == MLXSW_SP_SPAN_EGRESS) {
  308. mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
  309. mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
  310. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
  311. if (err) {
  312. netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
  313. return err;
  314. }
  315. }
  316. /* bind the port to the SPAN entry */
  317. mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
  318. (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
  319. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
  320. if (err)
  321. goto err_mpar_reg_write;
  322. inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
  323. if (!inspected_port) {
  324. err = -ENOMEM;
  325. goto err_inspected_port_alloc;
  326. }
  327. inspected_port->local_port = port->local_port;
  328. inspected_port->type = type;
  329. list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
  330. return 0;
  331. err_mpar_reg_write:
  332. err_inspected_port_alloc:
  333. if (type == MLXSW_SP_SPAN_EGRESS) {
  334. mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
  335. mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
  336. }
  337. return err;
  338. }
  339. static void
  340. mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
  341. struct mlxsw_sp_span_entry *span_entry,
  342. enum mlxsw_sp_span_type type)
  343. {
  344. struct mlxsw_sp_span_inspected_port *inspected_port;
  345. struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
  346. char mpar_pl[MLXSW_REG_MPAR_LEN];
  347. char sbib_pl[MLXSW_REG_SBIB_LEN];
  348. int pa_id = span_entry->id;
  349. inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
  350. if (!inspected_port)
  351. return;
  352. /* remove the inspected port */
  353. mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
  354. (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
  355. mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
  356. /* remove the SBIB buffer if it was egress SPAN */
  357. if (type == MLXSW_SP_SPAN_EGRESS) {
  358. mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
  359. mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
  360. }
  361. mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
  362. list_del(&inspected_port->list);
  363. kfree(inspected_port);
  364. }
  365. static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
  366. struct mlxsw_sp_port *to,
  367. enum mlxsw_sp_span_type type)
  368. {
  369. struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
  370. struct mlxsw_sp_span_entry *span_entry;
  371. int err;
  372. span_entry = mlxsw_sp_span_entry_get(to);
  373. if (!span_entry)
  374. return -ENOENT;
  375. netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
  376. span_entry->id);
  377. err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
  378. if (err)
  379. goto err_port_bind;
  380. return 0;
  381. err_port_bind:
  382. mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
  383. return err;
  384. }
  385. static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
  386. u8 destination_port,
  387. enum mlxsw_sp_span_type type)
  388. {
  389. struct mlxsw_sp_span_entry *span_entry;
  390. span_entry = mlxsw_sp_span_entry_find(from->mlxsw_sp,
  391. destination_port);
  392. if (!span_entry) {
  393. netdev_err(from->dev, "no span entry found\n");
  394. return;
  395. }
  396. netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
  397. span_entry->id);
  398. mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
  399. }
  400. static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
  401. bool is_up)
  402. {
  403. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  404. char paos_pl[MLXSW_REG_PAOS_LEN];
  405. mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
  406. is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
  407. MLXSW_PORT_ADMIN_STATUS_DOWN);
  408. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
  409. }
  410. static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
  411. unsigned char *addr)
  412. {
  413. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  414. char ppad_pl[MLXSW_REG_PPAD_LEN];
  415. mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
  416. mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
  417. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
  418. }
  419. static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
  420. {
  421. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  422. unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
  423. ether_addr_copy(addr, mlxsw_sp->base_mac);
  424. addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
  425. return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
  426. }
  427. static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
  428. {
  429. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  430. char pmtu_pl[MLXSW_REG_PMTU_LEN];
  431. int max_mtu;
  432. int err;
  433. mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
  434. mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
  435. err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
  436. if (err)
  437. return err;
  438. max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
  439. if (mtu > max_mtu)
  440. return -EINVAL;
  441. mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
  442. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
  443. }
  444. static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  445. u8 swid)
  446. {
  447. char pspa_pl[MLXSW_REG_PSPA_LEN];
  448. mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
  449. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
  450. }
  451. static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
  452. {
  453. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  454. return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
  455. swid);
  456. }
  457. static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
  458. bool enable)
  459. {
  460. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  461. char svpe_pl[MLXSW_REG_SVPE_LEN];
  462. mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
  463. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
  464. }
  465. int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
  466. enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
  467. u16 vid)
  468. {
  469. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  470. char svfa_pl[MLXSW_REG_SVFA_LEN];
  471. mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
  472. fid, vid);
  473. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
  474. }
  475. int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
  476. u16 vid_begin, u16 vid_end,
  477. bool learn_enable)
  478. {
  479. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  480. char *spvmlr_pl;
  481. int err;
  482. spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
  483. if (!spvmlr_pl)
  484. return -ENOMEM;
  485. mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
  486. vid_end, learn_enable);
  487. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
  488. kfree(spvmlr_pl);
  489. return err;
  490. }
  491. static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
  492. u16 vid, bool learn_enable)
  493. {
  494. return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
  495. learn_enable);
  496. }
  497. static int
  498. mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
  499. {
  500. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  501. char sspr_pl[MLXSW_REG_SSPR_LEN];
  502. mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
  503. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
  504. }
  505. static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
  506. u8 local_port, u8 *p_module,
  507. u8 *p_width, u8 *p_lane)
  508. {
  509. char pmlp_pl[MLXSW_REG_PMLP_LEN];
  510. int err;
  511. mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
  512. err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
  513. if (err)
  514. return err;
  515. *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
  516. *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
  517. *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
  518. return 0;
  519. }
  520. static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  521. u8 module, u8 width, u8 lane)
  522. {
  523. char pmlp_pl[MLXSW_REG_PMLP_LEN];
  524. int i;
  525. mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
  526. mlxsw_reg_pmlp_width_set(pmlp_pl, width);
  527. for (i = 0; i < width; i++) {
  528. mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
  529. mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
  530. }
  531. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
  532. }
  533. static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
  534. {
  535. char pmlp_pl[MLXSW_REG_PMLP_LEN];
  536. mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
  537. mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
  538. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
  539. }
  540. static int mlxsw_sp_port_open(struct net_device *dev)
  541. {
  542. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  543. int err;
  544. err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
  545. if (err)
  546. return err;
  547. netif_start_queue(dev);
  548. return 0;
  549. }
  550. static int mlxsw_sp_port_stop(struct net_device *dev)
  551. {
  552. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  553. netif_stop_queue(dev);
  554. return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
  555. }
  556. static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
  557. struct net_device *dev)
  558. {
  559. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  560. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  561. struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
  562. const struct mlxsw_tx_info tx_info = {
  563. .local_port = mlxsw_sp_port->local_port,
  564. .is_emad = false,
  565. };
  566. u64 len;
  567. int err;
  568. if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
  569. return NETDEV_TX_BUSY;
  570. if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
  571. struct sk_buff *skb_orig = skb;
  572. skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
  573. if (!skb) {
  574. this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
  575. dev_kfree_skb_any(skb_orig);
  576. return NETDEV_TX_OK;
  577. }
  578. dev_consume_skb_any(skb_orig);
  579. }
  580. if (eth_skb_pad(skb)) {
  581. this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
  582. return NETDEV_TX_OK;
  583. }
  584. mlxsw_sp_txhdr_construct(skb, &tx_info);
  585. /* TX header is consumed by HW on the way so we shouldn't count its
  586. * bytes as being sent.
  587. */
  588. len = skb->len - MLXSW_TXHDR_LEN;
  589. /* Due to a race we might fail here because of a full queue. In that
  590. * unlikely case we simply drop the packet.
  591. */
  592. err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
  593. if (!err) {
  594. pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
  595. u64_stats_update_begin(&pcpu_stats->syncp);
  596. pcpu_stats->tx_packets++;
  597. pcpu_stats->tx_bytes += len;
  598. u64_stats_update_end(&pcpu_stats->syncp);
  599. } else {
  600. this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
  601. dev_kfree_skb_any(skb);
  602. }
  603. return NETDEV_TX_OK;
  604. }
  605. static void mlxsw_sp_set_rx_mode(struct net_device *dev)
  606. {
  607. }
  608. static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
  609. {
  610. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  611. struct sockaddr *addr = p;
  612. int err;
  613. if (!is_valid_ether_addr(addr->sa_data))
  614. return -EADDRNOTAVAIL;
  615. err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
  616. if (err)
  617. return err;
  618. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  619. return 0;
  620. }
  621. static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
  622. bool pause_en, bool pfc_en, u16 delay)
  623. {
  624. u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
  625. delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
  626. MLXSW_SP_PAUSE_DELAY;
  627. if (pause_en || pfc_en)
  628. mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
  629. pg_size + delay, pg_size);
  630. else
  631. mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
  632. }
  633. int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
  634. u8 *prio_tc, bool pause_en,
  635. struct ieee_pfc *my_pfc)
  636. {
  637. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  638. u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
  639. u16 delay = !!my_pfc ? my_pfc->delay : 0;
  640. char pbmc_pl[MLXSW_REG_PBMC_LEN];
  641. int i, j, err;
  642. mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
  643. err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
  644. if (err)
  645. return err;
  646. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  647. bool configure = false;
  648. bool pfc = false;
  649. for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
  650. if (prio_tc[j] == i) {
  651. pfc = pfc_en & BIT(j);
  652. configure = true;
  653. break;
  654. }
  655. }
  656. if (!configure)
  657. continue;
  658. mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
  659. }
  660. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
  661. }
  662. static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
  663. int mtu, bool pause_en)
  664. {
  665. u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
  666. bool dcb_en = !!mlxsw_sp_port->dcb.ets;
  667. struct ieee_pfc *my_pfc;
  668. u8 *prio_tc;
  669. prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
  670. my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
  671. return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
  672. pause_en, my_pfc);
  673. }
  674. static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
  675. {
  676. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  677. bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
  678. int err;
  679. err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
  680. if (err)
  681. return err;
  682. err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
  683. if (err)
  684. goto err_span_port_mtu_update;
  685. err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
  686. if (err)
  687. goto err_port_mtu_set;
  688. dev->mtu = mtu;
  689. return 0;
  690. err_port_mtu_set:
  691. mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
  692. err_span_port_mtu_update:
  693. mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
  694. return err;
  695. }
  696. static int
  697. mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
  698. struct rtnl_link_stats64 *stats)
  699. {
  700. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  701. struct mlxsw_sp_port_pcpu_stats *p;
  702. u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
  703. u32 tx_dropped = 0;
  704. unsigned int start;
  705. int i;
  706. for_each_possible_cpu(i) {
  707. p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
  708. do {
  709. start = u64_stats_fetch_begin_irq(&p->syncp);
  710. rx_packets = p->rx_packets;
  711. rx_bytes = p->rx_bytes;
  712. tx_packets = p->tx_packets;
  713. tx_bytes = p->tx_bytes;
  714. } while (u64_stats_fetch_retry_irq(&p->syncp, start));
  715. stats->rx_packets += rx_packets;
  716. stats->rx_bytes += rx_bytes;
  717. stats->tx_packets += tx_packets;
  718. stats->tx_bytes += tx_bytes;
  719. /* tx_dropped is u32, updated without syncp protection. */
  720. tx_dropped += p->tx_dropped;
  721. }
  722. stats->tx_dropped = tx_dropped;
  723. return 0;
  724. }
  725. static bool mlxsw_sp_port_has_offload_stats(int attr_id)
  726. {
  727. switch (attr_id) {
  728. case IFLA_OFFLOAD_XSTATS_CPU_HIT:
  729. return true;
  730. }
  731. return false;
  732. }
  733. static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
  734. void *sp)
  735. {
  736. switch (attr_id) {
  737. case IFLA_OFFLOAD_XSTATS_CPU_HIT:
  738. return mlxsw_sp_port_get_sw_stats64(dev, sp);
  739. }
  740. return -EINVAL;
  741. }
  742. static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
  743. int prio, char *ppcnt_pl)
  744. {
  745. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  746. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  747. mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
  748. return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
  749. }
  750. static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
  751. struct rtnl_link_stats64 *stats)
  752. {
  753. char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
  754. int err;
  755. err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
  756. 0, ppcnt_pl);
  757. if (err)
  758. goto out;
  759. stats->tx_packets =
  760. mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
  761. stats->rx_packets =
  762. mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
  763. stats->tx_bytes =
  764. mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
  765. stats->rx_bytes =
  766. mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
  767. stats->multicast =
  768. mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
  769. stats->rx_crc_errors =
  770. mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
  771. stats->rx_frame_errors =
  772. mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
  773. stats->rx_length_errors = (
  774. mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
  775. mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
  776. mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
  777. stats->rx_errors = (stats->rx_crc_errors +
  778. stats->rx_frame_errors + stats->rx_length_errors);
  779. out:
  780. return err;
  781. }
  782. static void update_stats_cache(struct work_struct *work)
  783. {
  784. struct mlxsw_sp_port *mlxsw_sp_port =
  785. container_of(work, struct mlxsw_sp_port,
  786. hw_stats.update_dw.work);
  787. if (!netif_carrier_ok(mlxsw_sp_port->dev))
  788. goto out;
  789. mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
  790. mlxsw_sp_port->hw_stats.cache);
  791. out:
  792. mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
  793. MLXSW_HW_STATS_UPDATE_TIME);
  794. }
  795. /* Return the stats from a cache that is updated periodically,
  796. * as this function might get called in an atomic context.
  797. */
  798. static struct rtnl_link_stats64 *
  799. mlxsw_sp_port_get_stats64(struct net_device *dev,
  800. struct rtnl_link_stats64 *stats)
  801. {
  802. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  803. memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
  804. return stats;
  805. }
  806. int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
  807. u16 vid_end, bool is_member, bool untagged)
  808. {
  809. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  810. char *spvm_pl;
  811. int err;
  812. spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
  813. if (!spvm_pl)
  814. return -ENOMEM;
  815. mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
  816. vid_end, is_member, untagged);
  817. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
  818. kfree(spvm_pl);
  819. return err;
  820. }
  821. static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
  822. {
  823. enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
  824. u16 vid, last_visited_vid;
  825. int err;
  826. for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
  827. err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
  828. vid);
  829. if (err) {
  830. last_visited_vid = vid;
  831. goto err_port_vid_to_fid_set;
  832. }
  833. }
  834. err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
  835. if (err) {
  836. last_visited_vid = VLAN_N_VID;
  837. goto err_port_vid_to_fid_set;
  838. }
  839. return 0;
  840. err_port_vid_to_fid_set:
  841. for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
  842. mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
  843. vid);
  844. return err;
  845. }
  846. static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
  847. {
  848. enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
  849. u16 vid;
  850. int err;
  851. err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
  852. if (err)
  853. return err;
  854. for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
  855. err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
  856. vid, vid);
  857. if (err)
  858. return err;
  859. }
  860. return 0;
  861. }
  862. static struct mlxsw_sp_port *
  863. mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
  864. {
  865. struct mlxsw_sp_port *mlxsw_sp_vport;
  866. mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
  867. if (!mlxsw_sp_vport)
  868. return NULL;
  869. /* dev will be set correctly after the VLAN device is linked
  870. * with the real device. In case of bridge SELF invocation, dev
  871. * will remain as is.
  872. */
  873. mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
  874. mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  875. mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
  876. mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
  877. mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
  878. mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
  879. mlxsw_sp_vport->vport.vid = vid;
  880. list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
  881. return mlxsw_sp_vport;
  882. }
  883. static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
  884. {
  885. list_del(&mlxsw_sp_vport->vport.list);
  886. kfree(mlxsw_sp_vport);
  887. }
  888. static int mlxsw_sp_port_add_vid(struct net_device *dev,
  889. __be16 __always_unused proto, u16 vid)
  890. {
  891. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  892. struct mlxsw_sp_port *mlxsw_sp_vport;
  893. bool untagged = vid == 1;
  894. int err;
  895. /* VLAN 0 is added to HW filter when device goes up, but it is
  896. * reserved in our case, so simply return.
  897. */
  898. if (!vid)
  899. return 0;
  900. if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
  901. return 0;
  902. mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
  903. if (!mlxsw_sp_vport)
  904. return -ENOMEM;
  905. /* When adding the first VLAN interface on a bridged port we need to
  906. * transition all the active 802.1Q bridge VLANs to use explicit
  907. * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
  908. */
  909. if (list_is_singular(&mlxsw_sp_port->vports_list)) {
  910. err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
  911. if (err)
  912. goto err_port_vp_mode_trans;
  913. }
  914. err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
  915. if (err)
  916. goto err_port_add_vid;
  917. return 0;
  918. err_port_add_vid:
  919. if (list_is_singular(&mlxsw_sp_port->vports_list))
  920. mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
  921. err_port_vp_mode_trans:
  922. mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
  923. return err;
  924. }
  925. static int mlxsw_sp_port_kill_vid(struct net_device *dev,
  926. __be16 __always_unused proto, u16 vid)
  927. {
  928. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  929. struct mlxsw_sp_port *mlxsw_sp_vport;
  930. struct mlxsw_sp_fid *f;
  931. /* VLAN 0 is removed from HW filter when device goes down, but
  932. * it is reserved in our case, so simply return.
  933. */
  934. if (!vid)
  935. return 0;
  936. mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
  937. if (WARN_ON(!mlxsw_sp_vport))
  938. return 0;
  939. mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
  940. /* Drop FID reference. If this was the last reference the
  941. * resources will be freed.
  942. */
  943. f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
  944. if (f && !WARN_ON(!f->leave))
  945. f->leave(mlxsw_sp_vport);
  946. /* When removing the last VLAN interface on a bridged port we need to
  947. * transition all active 802.1Q bridge VLANs to use VID to FID
  948. * mappings and set port's mode to VLAN mode.
  949. */
  950. if (list_is_singular(&mlxsw_sp_port->vports_list))
  951. mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
  952. mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
  953. return 0;
  954. }
  955. static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
  956. size_t len)
  957. {
  958. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  959. u8 module = mlxsw_sp_port->mapping.module;
  960. u8 width = mlxsw_sp_port->mapping.width;
  961. u8 lane = mlxsw_sp_port->mapping.lane;
  962. int err;
  963. if (!mlxsw_sp_port->split)
  964. err = snprintf(name, len, "p%d", module + 1);
  965. else
  966. err = snprintf(name, len, "p%ds%d", module + 1,
  967. lane / width);
  968. if (err >= len)
  969. return -EINVAL;
  970. return 0;
  971. }
  972. static struct mlxsw_sp_port_mall_tc_entry *
  973. mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
  974. unsigned long cookie) {
  975. struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
  976. list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
  977. if (mall_tc_entry->cookie == cookie)
  978. return mall_tc_entry;
  979. return NULL;
  980. }
  981. static int
  982. mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
  983. struct tc_cls_matchall_offload *cls,
  984. const struct tc_action *a,
  985. bool ingress)
  986. {
  987. struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
  988. struct net *net = dev_net(mlxsw_sp_port->dev);
  989. enum mlxsw_sp_span_type span_type;
  990. struct mlxsw_sp_port *to_port;
  991. struct net_device *to_dev;
  992. int ifindex;
  993. int err;
  994. ifindex = tcf_mirred_ifindex(a);
  995. to_dev = __dev_get_by_index(net, ifindex);
  996. if (!to_dev) {
  997. netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
  998. return -EINVAL;
  999. }
  1000. if (!mlxsw_sp_port_dev_check(to_dev)) {
  1001. netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
  1002. return -ENOTSUPP;
  1003. }
  1004. to_port = netdev_priv(to_dev);
  1005. mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
  1006. if (!mall_tc_entry)
  1007. return -ENOMEM;
  1008. mall_tc_entry->cookie = cls->cookie;
  1009. mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
  1010. mall_tc_entry->mirror.to_local_port = to_port->local_port;
  1011. mall_tc_entry->mirror.ingress = ingress;
  1012. list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
  1013. span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
  1014. err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
  1015. if (err)
  1016. goto err_mirror_add;
  1017. return 0;
  1018. err_mirror_add:
  1019. list_del(&mall_tc_entry->list);
  1020. kfree(mall_tc_entry);
  1021. return err;
  1022. }
  1023. static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
  1024. __be16 protocol,
  1025. struct tc_cls_matchall_offload *cls,
  1026. bool ingress)
  1027. {
  1028. const struct tc_action *a;
  1029. LIST_HEAD(actions);
  1030. int err;
  1031. if (!tc_single_action(cls->exts)) {
  1032. netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
  1033. return -ENOTSUPP;
  1034. }
  1035. tcf_exts_to_list(cls->exts, &actions);
  1036. list_for_each_entry(a, &actions, list) {
  1037. if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
  1038. return -ENOTSUPP;
  1039. err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
  1040. a, ingress);
  1041. if (err)
  1042. return err;
  1043. }
  1044. return 0;
  1045. }
  1046. static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
  1047. struct tc_cls_matchall_offload *cls)
  1048. {
  1049. struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
  1050. enum mlxsw_sp_span_type span_type;
  1051. mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
  1052. cls->cookie);
  1053. if (!mall_tc_entry) {
  1054. netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
  1055. return;
  1056. }
  1057. switch (mall_tc_entry->type) {
  1058. case MLXSW_SP_PORT_MALL_MIRROR:
  1059. span_type = mall_tc_entry->mirror.ingress ?
  1060. MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
  1061. mlxsw_sp_span_mirror_remove(mlxsw_sp_port,
  1062. mall_tc_entry->mirror.to_local_port,
  1063. span_type);
  1064. break;
  1065. default:
  1066. WARN_ON(1);
  1067. }
  1068. list_del(&mall_tc_entry->list);
  1069. kfree(mall_tc_entry);
  1070. }
  1071. static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
  1072. __be16 proto, struct tc_to_netdev *tc)
  1073. {
  1074. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  1075. bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
  1076. if (tc->type == TC_SETUP_MATCHALL) {
  1077. switch (tc->cls_mall->command) {
  1078. case TC_CLSMATCHALL_REPLACE:
  1079. return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
  1080. proto,
  1081. tc->cls_mall,
  1082. ingress);
  1083. case TC_CLSMATCHALL_DESTROY:
  1084. mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
  1085. tc->cls_mall);
  1086. return 0;
  1087. default:
  1088. return -EINVAL;
  1089. }
  1090. }
  1091. return -ENOTSUPP;
  1092. }
  1093. static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
  1094. .ndo_open = mlxsw_sp_port_open,
  1095. .ndo_stop = mlxsw_sp_port_stop,
  1096. .ndo_start_xmit = mlxsw_sp_port_xmit,
  1097. .ndo_setup_tc = mlxsw_sp_setup_tc,
  1098. .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
  1099. .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
  1100. .ndo_change_mtu = mlxsw_sp_port_change_mtu,
  1101. .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
  1102. .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
  1103. .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
  1104. .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
  1105. .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
  1106. .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
  1107. .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
  1108. .ndo_fdb_add = switchdev_port_fdb_add,
  1109. .ndo_fdb_del = switchdev_port_fdb_del,
  1110. .ndo_fdb_dump = switchdev_port_fdb_dump,
  1111. .ndo_bridge_setlink = switchdev_port_bridge_setlink,
  1112. .ndo_bridge_getlink = switchdev_port_bridge_getlink,
  1113. .ndo_bridge_dellink = switchdev_port_bridge_dellink,
  1114. .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
  1115. };
  1116. static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
  1117. struct ethtool_drvinfo *drvinfo)
  1118. {
  1119. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  1120. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  1121. strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
  1122. strlcpy(drvinfo->version, mlxsw_sp_driver_version,
  1123. sizeof(drvinfo->version));
  1124. snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  1125. "%d.%d.%d",
  1126. mlxsw_sp->bus_info->fw_rev.major,
  1127. mlxsw_sp->bus_info->fw_rev.minor,
  1128. mlxsw_sp->bus_info->fw_rev.subminor);
  1129. strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
  1130. sizeof(drvinfo->bus_info));
  1131. }
  1132. static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
  1133. struct ethtool_pauseparam *pause)
  1134. {
  1135. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  1136. pause->rx_pause = mlxsw_sp_port->link.rx_pause;
  1137. pause->tx_pause = mlxsw_sp_port->link.tx_pause;
  1138. }
  1139. static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
  1140. struct ethtool_pauseparam *pause)
  1141. {
  1142. char pfcc_pl[MLXSW_REG_PFCC_LEN];
  1143. mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
  1144. mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
  1145. mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
  1146. return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
  1147. pfcc_pl);
  1148. }
  1149. static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
  1150. struct ethtool_pauseparam *pause)
  1151. {
  1152. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  1153. bool pause_en = pause->tx_pause || pause->rx_pause;
  1154. int err;
  1155. if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
  1156. netdev_err(dev, "PFC already enabled on port\n");
  1157. return -EINVAL;
  1158. }
  1159. if (pause->autoneg) {
  1160. netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
  1161. return -EINVAL;
  1162. }
  1163. err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
  1164. if (err) {
  1165. netdev_err(dev, "Failed to configure port's headroom\n");
  1166. return err;
  1167. }
  1168. err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
  1169. if (err) {
  1170. netdev_err(dev, "Failed to set PAUSE parameters\n");
  1171. goto err_port_pause_configure;
  1172. }
  1173. mlxsw_sp_port->link.rx_pause = pause->rx_pause;
  1174. mlxsw_sp_port->link.tx_pause = pause->tx_pause;
  1175. return 0;
  1176. err_port_pause_configure:
  1177. pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
  1178. mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
  1179. return err;
  1180. }
  1181. struct mlxsw_sp_port_hw_stats {
  1182. char str[ETH_GSTRING_LEN];
  1183. u64 (*getter)(char *payload);
  1184. };
  1185. static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
  1186. {
  1187. .str = "a_frames_transmitted_ok",
  1188. .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
  1189. },
  1190. {
  1191. .str = "a_frames_received_ok",
  1192. .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
  1193. },
  1194. {
  1195. .str = "a_frame_check_sequence_errors",
  1196. .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
  1197. },
  1198. {
  1199. .str = "a_alignment_errors",
  1200. .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
  1201. },
  1202. {
  1203. .str = "a_octets_transmitted_ok",
  1204. .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
  1205. },
  1206. {
  1207. .str = "a_octets_received_ok",
  1208. .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
  1209. },
  1210. {
  1211. .str = "a_multicast_frames_xmitted_ok",
  1212. .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
  1213. },
  1214. {
  1215. .str = "a_broadcast_frames_xmitted_ok",
  1216. .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
  1217. },
  1218. {
  1219. .str = "a_multicast_frames_received_ok",
  1220. .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
  1221. },
  1222. {
  1223. .str = "a_broadcast_frames_received_ok",
  1224. .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
  1225. },
  1226. {
  1227. .str = "a_in_range_length_errors",
  1228. .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
  1229. },
  1230. {
  1231. .str = "a_out_of_range_length_field",
  1232. .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
  1233. },
  1234. {
  1235. .str = "a_frame_too_long_errors",
  1236. .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
  1237. },
  1238. {
  1239. .str = "a_symbol_error_during_carrier",
  1240. .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
  1241. },
  1242. {
  1243. .str = "a_mac_control_frames_transmitted",
  1244. .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
  1245. },
  1246. {
  1247. .str = "a_mac_control_frames_received",
  1248. .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
  1249. },
  1250. {
  1251. .str = "a_unsupported_opcodes_received",
  1252. .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
  1253. },
  1254. {
  1255. .str = "a_pause_mac_ctrl_frames_received",
  1256. .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
  1257. },
  1258. {
  1259. .str = "a_pause_mac_ctrl_frames_xmitted",
  1260. .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
  1261. },
  1262. };
  1263. #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
  1264. static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
  1265. {
  1266. .str = "rx_octets_prio",
  1267. .getter = mlxsw_reg_ppcnt_rx_octets_get,
  1268. },
  1269. {
  1270. .str = "rx_frames_prio",
  1271. .getter = mlxsw_reg_ppcnt_rx_frames_get,
  1272. },
  1273. {
  1274. .str = "tx_octets_prio",
  1275. .getter = mlxsw_reg_ppcnt_tx_octets_get,
  1276. },
  1277. {
  1278. .str = "tx_frames_prio",
  1279. .getter = mlxsw_reg_ppcnt_tx_frames_get,
  1280. },
  1281. {
  1282. .str = "rx_pause_prio",
  1283. .getter = mlxsw_reg_ppcnt_rx_pause_get,
  1284. },
  1285. {
  1286. .str = "rx_pause_duration_prio",
  1287. .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
  1288. },
  1289. {
  1290. .str = "tx_pause_prio",
  1291. .getter = mlxsw_reg_ppcnt_tx_pause_get,
  1292. },
  1293. {
  1294. .str = "tx_pause_duration_prio",
  1295. .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
  1296. },
  1297. };
  1298. #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
  1299. static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
  1300. {
  1301. u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
  1302. return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
  1303. }
  1304. static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
  1305. {
  1306. .str = "tc_transmit_queue_tc",
  1307. .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
  1308. },
  1309. {
  1310. .str = "tc_no_buffer_discard_uc_tc",
  1311. .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
  1312. },
  1313. };
  1314. #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
  1315. #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
  1316. (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
  1317. MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
  1318. IEEE_8021QAZ_MAX_TCS)
  1319. static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
  1320. {
  1321. int i;
  1322. for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
  1323. snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
  1324. mlxsw_sp_port_hw_prio_stats[i].str, prio);
  1325. *p += ETH_GSTRING_LEN;
  1326. }
  1327. }
  1328. static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
  1329. {
  1330. int i;
  1331. for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
  1332. snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
  1333. mlxsw_sp_port_hw_tc_stats[i].str, tc);
  1334. *p += ETH_GSTRING_LEN;
  1335. }
  1336. }
  1337. static void mlxsw_sp_port_get_strings(struct net_device *dev,
  1338. u32 stringset, u8 *data)
  1339. {
  1340. u8 *p = data;
  1341. int i;
  1342. switch (stringset) {
  1343. case ETH_SS_STATS:
  1344. for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
  1345. memcpy(p, mlxsw_sp_port_hw_stats[i].str,
  1346. ETH_GSTRING_LEN);
  1347. p += ETH_GSTRING_LEN;
  1348. }
  1349. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  1350. mlxsw_sp_port_get_prio_strings(&p, i);
  1351. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  1352. mlxsw_sp_port_get_tc_strings(&p, i);
  1353. break;
  1354. }
  1355. }
  1356. static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
  1357. enum ethtool_phys_id_state state)
  1358. {
  1359. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  1360. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  1361. char mlcr_pl[MLXSW_REG_MLCR_LEN];
  1362. bool active;
  1363. switch (state) {
  1364. case ETHTOOL_ID_ACTIVE:
  1365. active = true;
  1366. break;
  1367. case ETHTOOL_ID_INACTIVE:
  1368. active = false;
  1369. break;
  1370. default:
  1371. return -EOPNOTSUPP;
  1372. }
  1373. mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
  1374. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
  1375. }
  1376. static int
  1377. mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
  1378. int *p_len, enum mlxsw_reg_ppcnt_grp grp)
  1379. {
  1380. switch (grp) {
  1381. case MLXSW_REG_PPCNT_IEEE_8023_CNT:
  1382. *p_hw_stats = mlxsw_sp_port_hw_stats;
  1383. *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
  1384. break;
  1385. case MLXSW_REG_PPCNT_PRIO_CNT:
  1386. *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
  1387. *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
  1388. break;
  1389. case MLXSW_REG_PPCNT_TC_CNT:
  1390. *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
  1391. *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
  1392. break;
  1393. default:
  1394. WARN_ON(1);
  1395. return -ENOTSUPP;
  1396. }
  1397. return 0;
  1398. }
  1399. static void __mlxsw_sp_port_get_stats(struct net_device *dev,
  1400. enum mlxsw_reg_ppcnt_grp grp, int prio,
  1401. u64 *data, int data_index)
  1402. {
  1403. struct mlxsw_sp_port_hw_stats *hw_stats;
  1404. char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
  1405. int i, len;
  1406. int err;
  1407. err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
  1408. if (err)
  1409. return;
  1410. mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
  1411. for (i = 0; i < len; i++)
  1412. data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
  1413. }
  1414. static void mlxsw_sp_port_get_stats(struct net_device *dev,
  1415. struct ethtool_stats *stats, u64 *data)
  1416. {
  1417. int i, data_index = 0;
  1418. /* IEEE 802.3 Counters */
  1419. __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
  1420. data, data_index);
  1421. data_index = MLXSW_SP_PORT_HW_STATS_LEN;
  1422. /* Per-Priority Counters */
  1423. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  1424. __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
  1425. data, data_index);
  1426. data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
  1427. }
  1428. /* Per-TC Counters */
  1429. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  1430. __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
  1431. data, data_index);
  1432. data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
  1433. }
  1434. }
  1435. static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
  1436. {
  1437. switch (sset) {
  1438. case ETH_SS_STATS:
  1439. return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
  1440. default:
  1441. return -EOPNOTSUPP;
  1442. }
  1443. }
  1444. struct mlxsw_sp_port_link_mode {
  1445. enum ethtool_link_mode_bit_indices mask_ethtool;
  1446. u32 mask;
  1447. u32 speed;
  1448. };
  1449. static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
  1450. {
  1451. .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
  1452. .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
  1453. .speed = SPEED_100,
  1454. },
  1455. {
  1456. .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
  1457. MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
  1458. .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
  1459. .speed = SPEED_1000,
  1460. },
  1461. {
  1462. .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
  1463. .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
  1464. .speed = SPEED_10000,
  1465. },
  1466. {
  1467. .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
  1468. MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
  1469. .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
  1470. .speed = SPEED_10000,
  1471. },
  1472. {
  1473. .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
  1474. MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
  1475. MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
  1476. MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
  1477. .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
  1478. .speed = SPEED_10000,
  1479. },
  1480. {
  1481. .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
  1482. .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
  1483. .speed = SPEED_20000,
  1484. },
  1485. {
  1486. .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
  1487. .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
  1488. .speed = SPEED_40000,
  1489. },
  1490. {
  1491. .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
  1492. .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
  1493. .speed = SPEED_40000,
  1494. },
  1495. {
  1496. .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
  1497. .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
  1498. .speed = SPEED_40000,
  1499. },
  1500. {
  1501. .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
  1502. .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
  1503. .speed = SPEED_40000,
  1504. },
  1505. {
  1506. .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
  1507. .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
  1508. .speed = SPEED_25000,
  1509. },
  1510. {
  1511. .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
  1512. .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
  1513. .speed = SPEED_25000,
  1514. },
  1515. {
  1516. .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
  1517. .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
  1518. .speed = SPEED_25000,
  1519. },
  1520. {
  1521. .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
  1522. .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
  1523. .speed = SPEED_25000,
  1524. },
  1525. {
  1526. .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
  1527. .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
  1528. .speed = SPEED_50000,
  1529. },
  1530. {
  1531. .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
  1532. .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
  1533. .speed = SPEED_50000,
  1534. },
  1535. {
  1536. .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
  1537. .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
  1538. .speed = SPEED_50000,
  1539. },
  1540. {
  1541. .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
  1542. .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
  1543. .speed = SPEED_56000,
  1544. },
  1545. {
  1546. .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
  1547. .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
  1548. .speed = SPEED_56000,
  1549. },
  1550. {
  1551. .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
  1552. .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
  1553. .speed = SPEED_56000,
  1554. },
  1555. {
  1556. .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
  1557. .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
  1558. .speed = SPEED_56000,
  1559. },
  1560. {
  1561. .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
  1562. .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
  1563. .speed = SPEED_100000,
  1564. },
  1565. {
  1566. .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
  1567. .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
  1568. .speed = SPEED_100000,
  1569. },
  1570. {
  1571. .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
  1572. .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
  1573. .speed = SPEED_100000,
  1574. },
  1575. {
  1576. .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
  1577. .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
  1578. .speed = SPEED_100000,
  1579. },
  1580. };
  1581. #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
  1582. static void
  1583. mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
  1584. struct ethtool_link_ksettings *cmd)
  1585. {
  1586. if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
  1587. MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
  1588. MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
  1589. MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
  1590. MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
  1591. MLXSW_REG_PTYS_ETH_SPEED_SGMII))
  1592. ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
  1593. if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
  1594. MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
  1595. MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
  1596. MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
  1597. MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
  1598. ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
  1599. }
  1600. static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
  1601. {
  1602. int i;
  1603. for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
  1604. if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
  1605. __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
  1606. mode);
  1607. }
  1608. }
  1609. static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
  1610. struct ethtool_link_ksettings *cmd)
  1611. {
  1612. u32 speed = SPEED_UNKNOWN;
  1613. u8 duplex = DUPLEX_UNKNOWN;
  1614. int i;
  1615. if (!carrier_ok)
  1616. goto out;
  1617. for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
  1618. if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
  1619. speed = mlxsw_sp_port_link_mode[i].speed;
  1620. duplex = DUPLEX_FULL;
  1621. break;
  1622. }
  1623. }
  1624. out:
  1625. cmd->base.speed = speed;
  1626. cmd->base.duplex = duplex;
  1627. }
  1628. static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
  1629. {
  1630. if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
  1631. MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
  1632. MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
  1633. MLXSW_REG_PTYS_ETH_SPEED_SGMII))
  1634. return PORT_FIBRE;
  1635. if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
  1636. MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
  1637. MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
  1638. return PORT_DA;
  1639. if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
  1640. MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
  1641. MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
  1642. MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
  1643. return PORT_NONE;
  1644. return PORT_OTHER;
  1645. }
  1646. static u32
  1647. mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
  1648. {
  1649. u32 ptys_proto = 0;
  1650. int i;
  1651. for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
  1652. if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
  1653. cmd->link_modes.advertising))
  1654. ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
  1655. }
  1656. return ptys_proto;
  1657. }
  1658. static u32 mlxsw_sp_to_ptys_speed(u32 speed)
  1659. {
  1660. u32 ptys_proto = 0;
  1661. int i;
  1662. for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
  1663. if (speed == mlxsw_sp_port_link_mode[i].speed)
  1664. ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
  1665. }
  1666. return ptys_proto;
  1667. }
  1668. static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
  1669. {
  1670. u32 ptys_proto = 0;
  1671. int i;
  1672. for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
  1673. if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
  1674. ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
  1675. }
  1676. return ptys_proto;
  1677. }
  1678. static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
  1679. struct ethtool_link_ksettings *cmd)
  1680. {
  1681. ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
  1682. ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
  1683. ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
  1684. mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
  1685. mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
  1686. }
  1687. static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
  1688. struct ethtool_link_ksettings *cmd)
  1689. {
  1690. if (!autoneg)
  1691. return;
  1692. ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
  1693. mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
  1694. }
  1695. static void
  1696. mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
  1697. struct ethtool_link_ksettings *cmd)
  1698. {
  1699. if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
  1700. return;
  1701. ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
  1702. mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
  1703. }
  1704. static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
  1705. struct ethtool_link_ksettings *cmd)
  1706. {
  1707. u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
  1708. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  1709. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  1710. char ptys_pl[MLXSW_REG_PTYS_LEN];
  1711. u8 autoneg_status;
  1712. bool autoneg;
  1713. int err;
  1714. autoneg = mlxsw_sp_port->link.autoneg;
  1715. mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
  1716. err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
  1717. if (err)
  1718. return err;
  1719. mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
  1720. &eth_proto_oper);
  1721. mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
  1722. mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
  1723. eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
  1724. autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
  1725. mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
  1726. cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  1727. cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
  1728. mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
  1729. cmd);
  1730. return 0;
  1731. }
  1732. static int
  1733. mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
  1734. const struct ethtool_link_ksettings *cmd)
  1735. {
  1736. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  1737. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  1738. char ptys_pl[MLXSW_REG_PTYS_LEN];
  1739. u32 eth_proto_cap, eth_proto_new;
  1740. bool autoneg;
  1741. int err;
  1742. mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
  1743. err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
  1744. if (err)
  1745. return err;
  1746. mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
  1747. autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
  1748. eth_proto_new = autoneg ?
  1749. mlxsw_sp_to_ptys_advert_link(cmd) :
  1750. mlxsw_sp_to_ptys_speed(cmd->base.speed);
  1751. eth_proto_new = eth_proto_new & eth_proto_cap;
  1752. if (!eth_proto_new) {
  1753. netdev_err(dev, "No supported speed requested\n");
  1754. return -EINVAL;
  1755. }
  1756. mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
  1757. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
  1758. if (err)
  1759. return err;
  1760. if (!netif_running(dev))
  1761. return 0;
  1762. mlxsw_sp_port->link.autoneg = autoneg;
  1763. mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
  1764. mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
  1765. return 0;
  1766. }
  1767. static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
  1768. .get_drvinfo = mlxsw_sp_port_get_drvinfo,
  1769. .get_link = ethtool_op_get_link,
  1770. .get_pauseparam = mlxsw_sp_port_get_pauseparam,
  1771. .set_pauseparam = mlxsw_sp_port_set_pauseparam,
  1772. .get_strings = mlxsw_sp_port_get_strings,
  1773. .set_phys_id = mlxsw_sp_port_set_phys_id,
  1774. .get_ethtool_stats = mlxsw_sp_port_get_stats,
  1775. .get_sset_count = mlxsw_sp_port_get_sset_count,
  1776. .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
  1777. .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
  1778. };
  1779. static int
  1780. mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
  1781. {
  1782. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  1783. u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
  1784. char ptys_pl[MLXSW_REG_PTYS_LEN];
  1785. u32 eth_proto_admin;
  1786. eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
  1787. mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
  1788. eth_proto_admin);
  1789. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
  1790. }
  1791. int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
  1792. enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
  1793. bool dwrr, u8 dwrr_weight)
  1794. {
  1795. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  1796. char qeec_pl[MLXSW_REG_QEEC_LEN];
  1797. mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
  1798. next_index);
  1799. mlxsw_reg_qeec_de_set(qeec_pl, true);
  1800. mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
  1801. mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
  1802. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
  1803. }
  1804. int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
  1805. enum mlxsw_reg_qeec_hr hr, u8 index,
  1806. u8 next_index, u32 maxrate)
  1807. {
  1808. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  1809. char qeec_pl[MLXSW_REG_QEEC_LEN];
  1810. mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
  1811. next_index);
  1812. mlxsw_reg_qeec_mase_set(qeec_pl, true);
  1813. mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
  1814. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
  1815. }
  1816. int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
  1817. u8 switch_prio, u8 tclass)
  1818. {
  1819. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  1820. char qtct_pl[MLXSW_REG_QTCT_LEN];
  1821. mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
  1822. tclass);
  1823. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
  1824. }
  1825. static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
  1826. {
  1827. int err, i;
  1828. /* Setup the elements hierarcy, so that each TC is linked to
  1829. * one subgroup, which are all member in the same group.
  1830. */
  1831. err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
  1832. MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
  1833. 0);
  1834. if (err)
  1835. return err;
  1836. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  1837. err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
  1838. MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
  1839. 0, false, 0);
  1840. if (err)
  1841. return err;
  1842. }
  1843. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  1844. err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
  1845. MLXSW_REG_QEEC_HIERARCY_TC, i, i,
  1846. false, 0);
  1847. if (err)
  1848. return err;
  1849. }
  1850. /* Make sure the max shaper is disabled in all hierarcies that
  1851. * support it.
  1852. */
  1853. err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
  1854. MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
  1855. MLXSW_REG_QEEC_MAS_DIS);
  1856. if (err)
  1857. return err;
  1858. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  1859. err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
  1860. MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
  1861. i, 0,
  1862. MLXSW_REG_QEEC_MAS_DIS);
  1863. if (err)
  1864. return err;
  1865. }
  1866. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  1867. err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
  1868. MLXSW_REG_QEEC_HIERARCY_TC,
  1869. i, i,
  1870. MLXSW_REG_QEEC_MAS_DIS);
  1871. if (err)
  1872. return err;
  1873. }
  1874. /* Map all priorities to traffic class 0. */
  1875. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  1876. err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
  1877. if (err)
  1878. return err;
  1879. }
  1880. return 0;
  1881. }
  1882. static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
  1883. {
  1884. mlxsw_sp_port->pvid = 1;
  1885. return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
  1886. }
  1887. static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
  1888. {
  1889. return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
  1890. }
  1891. static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
  1892. bool split, u8 module, u8 width, u8 lane)
  1893. {
  1894. struct mlxsw_sp_port *mlxsw_sp_port;
  1895. struct net_device *dev;
  1896. size_t bytes;
  1897. int err;
  1898. dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
  1899. if (!dev)
  1900. return -ENOMEM;
  1901. mlxsw_sp_port = netdev_priv(dev);
  1902. mlxsw_sp_port->dev = dev;
  1903. mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
  1904. mlxsw_sp_port->local_port = local_port;
  1905. mlxsw_sp_port->split = split;
  1906. mlxsw_sp_port->mapping.module = module;
  1907. mlxsw_sp_port->mapping.width = width;
  1908. mlxsw_sp_port->mapping.lane = lane;
  1909. mlxsw_sp_port->link.autoneg = 1;
  1910. bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
  1911. mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
  1912. if (!mlxsw_sp_port->active_vlans) {
  1913. err = -ENOMEM;
  1914. goto err_port_active_vlans_alloc;
  1915. }
  1916. mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
  1917. if (!mlxsw_sp_port->untagged_vlans) {
  1918. err = -ENOMEM;
  1919. goto err_port_untagged_vlans_alloc;
  1920. }
  1921. INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
  1922. INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
  1923. mlxsw_sp_port->pcpu_stats =
  1924. netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
  1925. if (!mlxsw_sp_port->pcpu_stats) {
  1926. err = -ENOMEM;
  1927. goto err_alloc_stats;
  1928. }
  1929. mlxsw_sp_port->hw_stats.cache =
  1930. kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
  1931. if (!mlxsw_sp_port->hw_stats.cache) {
  1932. err = -ENOMEM;
  1933. goto err_alloc_hw_stats;
  1934. }
  1935. INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
  1936. &update_stats_cache);
  1937. dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
  1938. dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
  1939. err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
  1940. if (err) {
  1941. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
  1942. mlxsw_sp_port->local_port);
  1943. goto err_port_swid_set;
  1944. }
  1945. err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
  1946. if (err) {
  1947. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
  1948. mlxsw_sp_port->local_port);
  1949. goto err_dev_addr_init;
  1950. }
  1951. netif_carrier_off(dev);
  1952. dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
  1953. NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
  1954. dev->hw_features |= NETIF_F_HW_TC;
  1955. /* Each packet needs to have a Tx header (metadata) on top all other
  1956. * headers.
  1957. */
  1958. dev->needed_headroom = MLXSW_TXHDR_LEN;
  1959. err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
  1960. if (err) {
  1961. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
  1962. mlxsw_sp_port->local_port);
  1963. goto err_port_system_port_mapping_set;
  1964. }
  1965. err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
  1966. if (err) {
  1967. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
  1968. mlxsw_sp_port->local_port);
  1969. goto err_port_speed_by_width_set;
  1970. }
  1971. err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
  1972. if (err) {
  1973. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
  1974. mlxsw_sp_port->local_port);
  1975. goto err_port_mtu_set;
  1976. }
  1977. err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
  1978. if (err)
  1979. goto err_port_admin_status_set;
  1980. err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
  1981. if (err) {
  1982. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
  1983. mlxsw_sp_port->local_port);
  1984. goto err_port_buffers_init;
  1985. }
  1986. err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
  1987. if (err) {
  1988. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
  1989. mlxsw_sp_port->local_port);
  1990. goto err_port_ets_init;
  1991. }
  1992. /* ETS and buffers must be initialized before DCB. */
  1993. err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
  1994. if (err) {
  1995. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
  1996. mlxsw_sp_port->local_port);
  1997. goto err_port_dcb_init;
  1998. }
  1999. err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
  2000. if (err) {
  2001. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
  2002. mlxsw_sp_port->local_port);
  2003. goto err_port_pvid_vport_create;
  2004. }
  2005. mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
  2006. mlxsw_sp->ports[local_port] = mlxsw_sp_port;
  2007. err = register_netdev(dev);
  2008. if (err) {
  2009. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
  2010. mlxsw_sp_port->local_port);
  2011. goto err_register_netdev;
  2012. }
  2013. err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
  2014. mlxsw_sp_port->local_port, dev,
  2015. mlxsw_sp_port->split, module);
  2016. if (err) {
  2017. dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
  2018. mlxsw_sp_port->local_port);
  2019. goto err_core_port_init;
  2020. }
  2021. mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
  2022. return 0;
  2023. err_core_port_init:
  2024. unregister_netdev(dev);
  2025. err_register_netdev:
  2026. mlxsw_sp->ports[local_port] = NULL;
  2027. mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
  2028. mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
  2029. err_port_pvid_vport_create:
  2030. mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
  2031. err_port_dcb_init:
  2032. err_port_ets_init:
  2033. err_port_buffers_init:
  2034. err_port_admin_status_set:
  2035. err_port_mtu_set:
  2036. err_port_speed_by_width_set:
  2037. err_port_system_port_mapping_set:
  2038. err_dev_addr_init:
  2039. mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
  2040. err_port_swid_set:
  2041. kfree(mlxsw_sp_port->hw_stats.cache);
  2042. err_alloc_hw_stats:
  2043. free_percpu(mlxsw_sp_port->pcpu_stats);
  2044. err_alloc_stats:
  2045. kfree(mlxsw_sp_port->untagged_vlans);
  2046. err_port_untagged_vlans_alloc:
  2047. kfree(mlxsw_sp_port->active_vlans);
  2048. err_port_active_vlans_alloc:
  2049. free_netdev(dev);
  2050. return err;
  2051. }
  2052. static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
  2053. {
  2054. struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
  2055. if (!mlxsw_sp_port)
  2056. return;
  2057. cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
  2058. mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
  2059. unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
  2060. mlxsw_sp->ports[local_port] = NULL;
  2061. mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
  2062. mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
  2063. mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
  2064. mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
  2065. mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
  2066. free_percpu(mlxsw_sp_port->pcpu_stats);
  2067. kfree(mlxsw_sp_port->hw_stats.cache);
  2068. kfree(mlxsw_sp_port->untagged_vlans);
  2069. kfree(mlxsw_sp_port->active_vlans);
  2070. WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
  2071. free_netdev(mlxsw_sp_port->dev);
  2072. }
  2073. static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
  2074. {
  2075. int i;
  2076. for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
  2077. mlxsw_sp_port_remove(mlxsw_sp, i);
  2078. kfree(mlxsw_sp->ports);
  2079. }
  2080. static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
  2081. {
  2082. u8 module, width, lane;
  2083. size_t alloc_size;
  2084. int i;
  2085. int err;
  2086. alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
  2087. mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
  2088. if (!mlxsw_sp->ports)
  2089. return -ENOMEM;
  2090. for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
  2091. err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
  2092. &width, &lane);
  2093. if (err)
  2094. goto err_port_module_info_get;
  2095. if (!width)
  2096. continue;
  2097. mlxsw_sp->port_to_module[i] = module;
  2098. err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
  2099. lane);
  2100. if (err)
  2101. goto err_port_create;
  2102. }
  2103. return 0;
  2104. err_port_create:
  2105. err_port_module_info_get:
  2106. for (i--; i >= 1; i--)
  2107. mlxsw_sp_port_remove(mlxsw_sp, i);
  2108. kfree(mlxsw_sp->ports);
  2109. return err;
  2110. }
  2111. static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
  2112. {
  2113. u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
  2114. return local_port - offset;
  2115. }
  2116. static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
  2117. u8 module, unsigned int count)
  2118. {
  2119. u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
  2120. int err, i;
  2121. for (i = 0; i < count; i++) {
  2122. err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
  2123. width, i * width);
  2124. if (err)
  2125. goto err_port_module_map;
  2126. }
  2127. for (i = 0; i < count; i++) {
  2128. err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
  2129. if (err)
  2130. goto err_port_swid_set;
  2131. }
  2132. for (i = 0; i < count; i++) {
  2133. err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
  2134. module, width, i * width);
  2135. if (err)
  2136. goto err_port_create;
  2137. }
  2138. return 0;
  2139. err_port_create:
  2140. for (i--; i >= 0; i--)
  2141. mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
  2142. i = count;
  2143. err_port_swid_set:
  2144. for (i--; i >= 0; i--)
  2145. __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
  2146. MLXSW_PORT_SWID_DISABLED_PORT);
  2147. i = count;
  2148. err_port_module_map:
  2149. for (i--; i >= 0; i--)
  2150. mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
  2151. return err;
  2152. }
  2153. static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
  2154. u8 base_port, unsigned int count)
  2155. {
  2156. u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
  2157. int i;
  2158. /* Split by four means we need to re-create two ports, otherwise
  2159. * only one.
  2160. */
  2161. count = count / 2;
  2162. for (i = 0; i < count; i++) {
  2163. local_port = base_port + i * 2;
  2164. module = mlxsw_sp->port_to_module[local_port];
  2165. mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
  2166. 0);
  2167. }
  2168. for (i = 0; i < count; i++)
  2169. __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
  2170. for (i = 0; i < count; i++) {
  2171. local_port = base_port + i * 2;
  2172. module = mlxsw_sp->port_to_module[local_port];
  2173. mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
  2174. width, 0);
  2175. }
  2176. }
  2177. static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
  2178. unsigned int count)
  2179. {
  2180. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  2181. struct mlxsw_sp_port *mlxsw_sp_port;
  2182. u8 module, cur_width, base_port;
  2183. int i;
  2184. int err;
  2185. mlxsw_sp_port = mlxsw_sp->ports[local_port];
  2186. if (!mlxsw_sp_port) {
  2187. dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
  2188. local_port);
  2189. return -EINVAL;
  2190. }
  2191. module = mlxsw_sp_port->mapping.module;
  2192. cur_width = mlxsw_sp_port->mapping.width;
  2193. if (count != 2 && count != 4) {
  2194. netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
  2195. return -EINVAL;
  2196. }
  2197. if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
  2198. netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
  2199. return -EINVAL;
  2200. }
  2201. /* Make sure we have enough slave (even) ports for the split. */
  2202. if (count == 2) {
  2203. base_port = local_port;
  2204. if (mlxsw_sp->ports[base_port + 1]) {
  2205. netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
  2206. return -EINVAL;
  2207. }
  2208. } else {
  2209. base_port = mlxsw_sp_cluster_base_port_get(local_port);
  2210. if (mlxsw_sp->ports[base_port + 1] ||
  2211. mlxsw_sp->ports[base_port + 3]) {
  2212. netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
  2213. return -EINVAL;
  2214. }
  2215. }
  2216. for (i = 0; i < count; i++)
  2217. mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
  2218. err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
  2219. if (err) {
  2220. dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
  2221. goto err_port_split_create;
  2222. }
  2223. return 0;
  2224. err_port_split_create:
  2225. mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
  2226. return err;
  2227. }
  2228. static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
  2229. {
  2230. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  2231. struct mlxsw_sp_port *mlxsw_sp_port;
  2232. u8 cur_width, base_port;
  2233. unsigned int count;
  2234. int i;
  2235. mlxsw_sp_port = mlxsw_sp->ports[local_port];
  2236. if (!mlxsw_sp_port) {
  2237. dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
  2238. local_port);
  2239. return -EINVAL;
  2240. }
  2241. if (!mlxsw_sp_port->split) {
  2242. netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
  2243. return -EINVAL;
  2244. }
  2245. cur_width = mlxsw_sp_port->mapping.width;
  2246. count = cur_width == 1 ? 4 : 2;
  2247. base_port = mlxsw_sp_cluster_base_port_get(local_port);
  2248. /* Determine which ports to remove. */
  2249. if (count == 2 && local_port >= base_port + 2)
  2250. base_port = base_port + 2;
  2251. for (i = 0; i < count; i++)
  2252. mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
  2253. mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
  2254. return 0;
  2255. }
  2256. static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
  2257. char *pude_pl, void *priv)
  2258. {
  2259. struct mlxsw_sp *mlxsw_sp = priv;
  2260. struct mlxsw_sp_port *mlxsw_sp_port;
  2261. enum mlxsw_reg_pude_oper_status status;
  2262. u8 local_port;
  2263. local_port = mlxsw_reg_pude_local_port_get(pude_pl);
  2264. mlxsw_sp_port = mlxsw_sp->ports[local_port];
  2265. if (!mlxsw_sp_port)
  2266. return;
  2267. status = mlxsw_reg_pude_oper_status_get(pude_pl);
  2268. if (status == MLXSW_PORT_OPER_STATUS_UP) {
  2269. netdev_info(mlxsw_sp_port->dev, "link up\n");
  2270. netif_carrier_on(mlxsw_sp_port->dev);
  2271. } else {
  2272. netdev_info(mlxsw_sp_port->dev, "link down\n");
  2273. netif_carrier_off(mlxsw_sp_port->dev);
  2274. }
  2275. }
  2276. static struct mlxsw_event_listener mlxsw_sp_pude_event = {
  2277. .func = mlxsw_sp_pude_event_func,
  2278. .trap_id = MLXSW_TRAP_ID_PUDE,
  2279. };
  2280. static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
  2281. enum mlxsw_event_trap_id trap_id)
  2282. {
  2283. struct mlxsw_event_listener *el;
  2284. char hpkt_pl[MLXSW_REG_HPKT_LEN];
  2285. int err;
  2286. switch (trap_id) {
  2287. case MLXSW_TRAP_ID_PUDE:
  2288. el = &mlxsw_sp_pude_event;
  2289. break;
  2290. }
  2291. err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
  2292. if (err)
  2293. return err;
  2294. mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
  2295. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
  2296. if (err)
  2297. goto err_event_trap_set;
  2298. return 0;
  2299. err_event_trap_set:
  2300. mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
  2301. return err;
  2302. }
  2303. static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
  2304. enum mlxsw_event_trap_id trap_id)
  2305. {
  2306. struct mlxsw_event_listener *el;
  2307. switch (trap_id) {
  2308. case MLXSW_TRAP_ID_PUDE:
  2309. el = &mlxsw_sp_pude_event;
  2310. break;
  2311. }
  2312. mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
  2313. }
  2314. static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
  2315. void *priv)
  2316. {
  2317. struct mlxsw_sp *mlxsw_sp = priv;
  2318. struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
  2319. struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
  2320. if (unlikely(!mlxsw_sp_port)) {
  2321. dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
  2322. local_port);
  2323. return;
  2324. }
  2325. skb->dev = mlxsw_sp_port->dev;
  2326. pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
  2327. u64_stats_update_begin(&pcpu_stats->syncp);
  2328. pcpu_stats->rx_packets++;
  2329. pcpu_stats->rx_bytes += skb->len;
  2330. u64_stats_update_end(&pcpu_stats->syncp);
  2331. skb->protocol = eth_type_trans(skb, skb->dev);
  2332. netif_receive_skb(skb);
  2333. }
  2334. static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
  2335. void *priv)
  2336. {
  2337. skb->offload_fwd_mark = 1;
  2338. return mlxsw_sp_rx_listener_func(skb, local_port, priv);
  2339. }
  2340. #define MLXSW_SP_RXL(_func, _trap_id, _action) \
  2341. { \
  2342. .func = _func, \
  2343. .local_port = MLXSW_PORT_DONT_CARE, \
  2344. .trap_id = MLXSW_TRAP_ID_##_trap_id, \
  2345. .action = MLXSW_REG_HPKT_ACTION_##_action, \
  2346. }
  2347. static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
  2348. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
  2349. /* Traps for specific L2 packet types, not trapped as FDB MC */
  2350. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
  2351. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
  2352. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
  2353. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
  2354. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
  2355. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
  2356. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
  2357. MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
  2358. MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
  2359. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
  2360. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
  2361. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
  2362. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
  2363. MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
  2364. MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
  2365. /* L3 traps */
  2366. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
  2367. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
  2368. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
  2369. MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
  2370. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
  2371. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
  2372. MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
  2373. };
  2374. static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
  2375. {
  2376. char htgt_pl[MLXSW_REG_HTGT_LEN];
  2377. char hpkt_pl[MLXSW_REG_HPKT_LEN];
  2378. int i;
  2379. int err;
  2380. mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
  2381. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
  2382. if (err)
  2383. return err;
  2384. mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
  2385. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
  2386. if (err)
  2387. return err;
  2388. for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
  2389. err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
  2390. &mlxsw_sp_rx_listener[i],
  2391. mlxsw_sp);
  2392. if (err)
  2393. goto err_rx_listener_register;
  2394. mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
  2395. mlxsw_sp_rx_listener[i].trap_id);
  2396. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
  2397. if (err)
  2398. goto err_rx_trap_set;
  2399. }
  2400. return 0;
  2401. err_rx_trap_set:
  2402. mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
  2403. &mlxsw_sp_rx_listener[i],
  2404. mlxsw_sp);
  2405. err_rx_listener_register:
  2406. for (i--; i >= 0; i--) {
  2407. mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
  2408. mlxsw_sp_rx_listener[i].trap_id);
  2409. mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
  2410. mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
  2411. &mlxsw_sp_rx_listener[i],
  2412. mlxsw_sp);
  2413. }
  2414. return err;
  2415. }
  2416. static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
  2417. {
  2418. char hpkt_pl[MLXSW_REG_HPKT_LEN];
  2419. int i;
  2420. for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
  2421. mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
  2422. mlxsw_sp_rx_listener[i].trap_id);
  2423. mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
  2424. mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
  2425. &mlxsw_sp_rx_listener[i],
  2426. mlxsw_sp);
  2427. }
  2428. }
  2429. static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
  2430. enum mlxsw_reg_sfgc_type type,
  2431. enum mlxsw_reg_sfgc_bridge_type bridge_type)
  2432. {
  2433. enum mlxsw_flood_table_type table_type;
  2434. enum mlxsw_sp_flood_table flood_table;
  2435. char sfgc_pl[MLXSW_REG_SFGC_LEN];
  2436. if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
  2437. table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
  2438. else
  2439. table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
  2440. if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
  2441. flood_table = MLXSW_SP_FLOOD_TABLE_UC;
  2442. else
  2443. flood_table = MLXSW_SP_FLOOD_TABLE_BM;
  2444. mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
  2445. flood_table);
  2446. return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
  2447. }
  2448. static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
  2449. {
  2450. int type, err;
  2451. for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
  2452. if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
  2453. continue;
  2454. err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
  2455. MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
  2456. if (err)
  2457. return err;
  2458. err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
  2459. MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
  2460. if (err)
  2461. return err;
  2462. }
  2463. return 0;
  2464. }
  2465. static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
  2466. {
  2467. struct mlxsw_resources *resources;
  2468. char slcr_pl[MLXSW_REG_SLCR_LEN];
  2469. int err;
  2470. mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
  2471. MLXSW_REG_SLCR_LAG_HASH_DMAC |
  2472. MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
  2473. MLXSW_REG_SLCR_LAG_HASH_VLANID |
  2474. MLXSW_REG_SLCR_LAG_HASH_SIP |
  2475. MLXSW_REG_SLCR_LAG_HASH_DIP |
  2476. MLXSW_REG_SLCR_LAG_HASH_SPORT |
  2477. MLXSW_REG_SLCR_LAG_HASH_DPORT |
  2478. MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
  2479. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
  2480. if (err)
  2481. return err;
  2482. resources = mlxsw_core_resources_get(mlxsw_sp->core);
  2483. if (!(resources->max_lag_valid && resources->max_ports_in_lag_valid))
  2484. return -EIO;
  2485. mlxsw_sp->lags = kcalloc(resources->max_lag,
  2486. sizeof(struct mlxsw_sp_upper),
  2487. GFP_KERNEL);
  2488. if (!mlxsw_sp->lags)
  2489. return -ENOMEM;
  2490. return 0;
  2491. }
  2492. static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
  2493. {
  2494. kfree(mlxsw_sp->lags);
  2495. }
  2496. static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
  2497. const struct mlxsw_bus_info *mlxsw_bus_info)
  2498. {
  2499. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  2500. int err;
  2501. mlxsw_sp->core = mlxsw_core;
  2502. mlxsw_sp->bus_info = mlxsw_bus_info;
  2503. INIT_LIST_HEAD(&mlxsw_sp->fids);
  2504. INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
  2505. INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
  2506. err = mlxsw_sp_base_mac_get(mlxsw_sp);
  2507. if (err) {
  2508. dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
  2509. return err;
  2510. }
  2511. err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
  2512. if (err) {
  2513. dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
  2514. return err;
  2515. }
  2516. err = mlxsw_sp_traps_init(mlxsw_sp);
  2517. if (err) {
  2518. dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
  2519. goto err_rx_listener_register;
  2520. }
  2521. err = mlxsw_sp_flood_init(mlxsw_sp);
  2522. if (err) {
  2523. dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
  2524. goto err_flood_init;
  2525. }
  2526. err = mlxsw_sp_buffers_init(mlxsw_sp);
  2527. if (err) {
  2528. dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
  2529. goto err_buffers_init;
  2530. }
  2531. err = mlxsw_sp_lag_init(mlxsw_sp);
  2532. if (err) {
  2533. dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
  2534. goto err_lag_init;
  2535. }
  2536. err = mlxsw_sp_switchdev_init(mlxsw_sp);
  2537. if (err) {
  2538. dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
  2539. goto err_switchdev_init;
  2540. }
  2541. err = mlxsw_sp_router_init(mlxsw_sp);
  2542. if (err) {
  2543. dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
  2544. goto err_router_init;
  2545. }
  2546. err = mlxsw_sp_span_init(mlxsw_sp);
  2547. if (err) {
  2548. dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
  2549. goto err_span_init;
  2550. }
  2551. err = mlxsw_sp_ports_create(mlxsw_sp);
  2552. if (err) {
  2553. dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
  2554. goto err_ports_create;
  2555. }
  2556. return 0;
  2557. err_ports_create:
  2558. mlxsw_sp_span_fini(mlxsw_sp);
  2559. err_span_init:
  2560. mlxsw_sp_router_fini(mlxsw_sp);
  2561. err_router_init:
  2562. mlxsw_sp_switchdev_fini(mlxsw_sp);
  2563. err_switchdev_init:
  2564. mlxsw_sp_lag_fini(mlxsw_sp);
  2565. err_lag_init:
  2566. mlxsw_sp_buffers_fini(mlxsw_sp);
  2567. err_buffers_init:
  2568. err_flood_init:
  2569. mlxsw_sp_traps_fini(mlxsw_sp);
  2570. err_rx_listener_register:
  2571. mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
  2572. return err;
  2573. }
  2574. static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
  2575. {
  2576. struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
  2577. mlxsw_sp_ports_remove(mlxsw_sp);
  2578. mlxsw_sp_span_fini(mlxsw_sp);
  2579. mlxsw_sp_router_fini(mlxsw_sp);
  2580. mlxsw_sp_switchdev_fini(mlxsw_sp);
  2581. mlxsw_sp_lag_fini(mlxsw_sp);
  2582. mlxsw_sp_buffers_fini(mlxsw_sp);
  2583. mlxsw_sp_traps_fini(mlxsw_sp);
  2584. mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
  2585. WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
  2586. WARN_ON(!list_empty(&mlxsw_sp->fids));
  2587. }
  2588. static struct mlxsw_config_profile mlxsw_sp_config_profile = {
  2589. .used_max_vepa_channels = 1,
  2590. .max_vepa_channels = 0,
  2591. .used_max_mid = 1,
  2592. .max_mid = MLXSW_SP_MID_MAX,
  2593. .used_max_pgt = 1,
  2594. .max_pgt = 0,
  2595. .used_flood_tables = 1,
  2596. .used_flood_mode = 1,
  2597. .flood_mode = 3,
  2598. .max_fid_offset_flood_tables = 2,
  2599. .fid_offset_flood_table_size = VLAN_N_VID - 1,
  2600. .max_fid_flood_tables = 2,
  2601. .fid_flood_table_size = MLXSW_SP_VFID_MAX,
  2602. .used_max_ib_mc = 1,
  2603. .max_ib_mc = 0,
  2604. .used_max_pkey = 1,
  2605. .max_pkey = 0,
  2606. .used_kvd_split_data = 1,
  2607. .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
  2608. .kvd_hash_single_parts = 2,
  2609. .kvd_hash_double_parts = 1,
  2610. .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
  2611. .swid_config = {
  2612. {
  2613. .used_type = 1,
  2614. .type = MLXSW_PORT_SWID_TYPE_ETH,
  2615. }
  2616. },
  2617. .resource_query_enable = 1,
  2618. };
  2619. static struct mlxsw_driver mlxsw_sp_driver = {
  2620. .kind = MLXSW_DEVICE_KIND_SPECTRUM,
  2621. .owner = THIS_MODULE,
  2622. .priv_size = sizeof(struct mlxsw_sp),
  2623. .init = mlxsw_sp_init,
  2624. .fini = mlxsw_sp_fini,
  2625. .port_split = mlxsw_sp_port_split,
  2626. .port_unsplit = mlxsw_sp_port_unsplit,
  2627. .sb_pool_get = mlxsw_sp_sb_pool_get,
  2628. .sb_pool_set = mlxsw_sp_sb_pool_set,
  2629. .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
  2630. .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
  2631. .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
  2632. .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
  2633. .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
  2634. .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
  2635. .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
  2636. .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
  2637. .txhdr_construct = mlxsw_sp_txhdr_construct,
  2638. .txhdr_len = MLXSW_TXHDR_LEN,
  2639. .profile = &mlxsw_sp_config_profile,
  2640. };
  2641. static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
  2642. {
  2643. return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
  2644. }
  2645. static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
  2646. {
  2647. struct net_device *lower_dev;
  2648. struct list_head *iter;
  2649. if (mlxsw_sp_port_dev_check(dev))
  2650. return netdev_priv(dev);
  2651. netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
  2652. if (mlxsw_sp_port_dev_check(lower_dev))
  2653. return netdev_priv(lower_dev);
  2654. }
  2655. return NULL;
  2656. }
  2657. static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
  2658. {
  2659. struct mlxsw_sp_port *mlxsw_sp_port;
  2660. mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
  2661. return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
  2662. }
  2663. static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
  2664. {
  2665. struct net_device *lower_dev;
  2666. struct list_head *iter;
  2667. if (mlxsw_sp_port_dev_check(dev))
  2668. return netdev_priv(dev);
  2669. netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
  2670. if (mlxsw_sp_port_dev_check(lower_dev))
  2671. return netdev_priv(lower_dev);
  2672. }
  2673. return NULL;
  2674. }
  2675. struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
  2676. {
  2677. struct mlxsw_sp_port *mlxsw_sp_port;
  2678. rcu_read_lock();
  2679. mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
  2680. if (mlxsw_sp_port)
  2681. dev_hold(mlxsw_sp_port->dev);
  2682. rcu_read_unlock();
  2683. return mlxsw_sp_port;
  2684. }
  2685. void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
  2686. {
  2687. dev_put(mlxsw_sp_port->dev);
  2688. }
  2689. static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
  2690. unsigned long event)
  2691. {
  2692. switch (event) {
  2693. case NETDEV_UP:
  2694. if (!r)
  2695. return true;
  2696. r->ref_count++;
  2697. return false;
  2698. case NETDEV_DOWN:
  2699. if (r && --r->ref_count == 0)
  2700. return true;
  2701. /* It is possible we already removed the RIF ourselves
  2702. * if it was assigned to a netdev that is now a bridge
  2703. * or LAG slave.
  2704. */
  2705. return false;
  2706. }
  2707. return false;
  2708. }
  2709. static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
  2710. {
  2711. struct mlxsw_resources *resources;
  2712. int i;
  2713. resources = mlxsw_core_resources_get(mlxsw_sp->core);
  2714. for (i = 0; i < resources->max_rif; i++)
  2715. if (!mlxsw_sp->rifs[i])
  2716. return i;
  2717. return MLXSW_SP_INVALID_RIF;
  2718. }
  2719. static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
  2720. bool *p_lagged, u16 *p_system_port)
  2721. {
  2722. u8 local_port = mlxsw_sp_vport->local_port;
  2723. *p_lagged = mlxsw_sp_vport->lagged;
  2724. *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
  2725. }
  2726. static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
  2727. struct net_device *l3_dev, u16 rif,
  2728. bool create)
  2729. {
  2730. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
  2731. bool lagged = mlxsw_sp_vport->lagged;
  2732. char ritr_pl[MLXSW_REG_RITR_LEN];
  2733. u16 system_port;
  2734. mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
  2735. l3_dev->mtu, l3_dev->dev_addr);
  2736. mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
  2737. mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
  2738. mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
  2739. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
  2740. }
  2741. static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
  2742. static struct mlxsw_sp_fid *
  2743. mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
  2744. {
  2745. struct mlxsw_sp_fid *f;
  2746. f = kzalloc(sizeof(*f), GFP_KERNEL);
  2747. if (!f)
  2748. return NULL;
  2749. f->leave = mlxsw_sp_vport_rif_sp_leave;
  2750. f->ref_count = 0;
  2751. f->dev = l3_dev;
  2752. f->fid = fid;
  2753. return f;
  2754. }
  2755. static struct mlxsw_sp_rif *
  2756. mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
  2757. {
  2758. struct mlxsw_sp_rif *r;
  2759. r = kzalloc(sizeof(*r), GFP_KERNEL);
  2760. if (!r)
  2761. return NULL;
  2762. ether_addr_copy(r->addr, l3_dev->dev_addr);
  2763. r->mtu = l3_dev->mtu;
  2764. r->ref_count = 1;
  2765. r->dev = l3_dev;
  2766. r->rif = rif;
  2767. r->f = f;
  2768. return r;
  2769. }
  2770. static struct mlxsw_sp_rif *
  2771. mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
  2772. struct net_device *l3_dev)
  2773. {
  2774. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
  2775. struct mlxsw_sp_fid *f;
  2776. struct mlxsw_sp_rif *r;
  2777. u16 fid, rif;
  2778. int err;
  2779. rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
  2780. if (rif == MLXSW_SP_INVALID_RIF)
  2781. return ERR_PTR(-ERANGE);
  2782. err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
  2783. if (err)
  2784. return ERR_PTR(err);
  2785. fid = mlxsw_sp_rif_sp_to_fid(rif);
  2786. err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
  2787. if (err)
  2788. goto err_rif_fdb_op;
  2789. f = mlxsw_sp_rfid_alloc(fid, l3_dev);
  2790. if (!f) {
  2791. err = -ENOMEM;
  2792. goto err_rfid_alloc;
  2793. }
  2794. r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
  2795. if (!r) {
  2796. err = -ENOMEM;
  2797. goto err_rif_alloc;
  2798. }
  2799. f->r = r;
  2800. mlxsw_sp->rifs[rif] = r;
  2801. return r;
  2802. err_rif_alloc:
  2803. kfree(f);
  2804. err_rfid_alloc:
  2805. mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
  2806. err_rif_fdb_op:
  2807. mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
  2808. return ERR_PTR(err);
  2809. }
  2810. static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
  2811. struct mlxsw_sp_rif *r)
  2812. {
  2813. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
  2814. struct net_device *l3_dev = r->dev;
  2815. struct mlxsw_sp_fid *f = r->f;
  2816. u16 fid = f->fid;
  2817. u16 rif = r->rif;
  2818. mlxsw_sp->rifs[rif] = NULL;
  2819. f->r = NULL;
  2820. kfree(r);
  2821. kfree(f);
  2822. mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
  2823. mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
  2824. }
  2825. static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
  2826. struct net_device *l3_dev)
  2827. {
  2828. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
  2829. struct mlxsw_sp_rif *r;
  2830. r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
  2831. if (!r) {
  2832. r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
  2833. if (IS_ERR(r))
  2834. return PTR_ERR(r);
  2835. }
  2836. mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
  2837. r->f->ref_count++;
  2838. netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
  2839. return 0;
  2840. }
  2841. static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
  2842. {
  2843. struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
  2844. netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
  2845. mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
  2846. if (--f->ref_count == 0)
  2847. mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
  2848. }
  2849. static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
  2850. struct net_device *port_dev,
  2851. unsigned long event, u16 vid)
  2852. {
  2853. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
  2854. struct mlxsw_sp_port *mlxsw_sp_vport;
  2855. mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
  2856. if (WARN_ON(!mlxsw_sp_vport))
  2857. return -EINVAL;
  2858. switch (event) {
  2859. case NETDEV_UP:
  2860. return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
  2861. case NETDEV_DOWN:
  2862. mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
  2863. break;
  2864. }
  2865. return 0;
  2866. }
  2867. static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
  2868. unsigned long event)
  2869. {
  2870. if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
  2871. return 0;
  2872. return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
  2873. }
  2874. static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
  2875. struct net_device *lag_dev,
  2876. unsigned long event, u16 vid)
  2877. {
  2878. struct net_device *port_dev;
  2879. struct list_head *iter;
  2880. int err;
  2881. netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
  2882. if (mlxsw_sp_port_dev_check(port_dev)) {
  2883. err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
  2884. event, vid);
  2885. if (err)
  2886. return err;
  2887. }
  2888. }
  2889. return 0;
  2890. }
  2891. static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
  2892. unsigned long event)
  2893. {
  2894. if (netif_is_bridge_port(lag_dev))
  2895. return 0;
  2896. return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
  2897. }
  2898. static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
  2899. struct net_device *l3_dev)
  2900. {
  2901. u16 fid;
  2902. if (is_vlan_dev(l3_dev))
  2903. fid = vlan_dev_vlan_id(l3_dev);
  2904. else if (mlxsw_sp->master_bridge.dev == l3_dev)
  2905. fid = 1;
  2906. else
  2907. return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
  2908. return mlxsw_sp_fid_find(mlxsw_sp, fid);
  2909. }
  2910. static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
  2911. {
  2912. return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
  2913. MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
  2914. }
  2915. static u16 mlxsw_sp_flood_table_index_get(u16 fid)
  2916. {
  2917. return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
  2918. }
  2919. static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
  2920. bool set)
  2921. {
  2922. enum mlxsw_flood_table_type table_type;
  2923. char *sftr_pl;
  2924. u16 index;
  2925. int err;
  2926. sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
  2927. if (!sftr_pl)
  2928. return -ENOMEM;
  2929. table_type = mlxsw_sp_flood_table_type_get(fid);
  2930. index = mlxsw_sp_flood_table_index_get(fid);
  2931. mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
  2932. 1, MLXSW_PORT_ROUTER_PORT, set);
  2933. err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
  2934. kfree(sftr_pl);
  2935. return err;
  2936. }
  2937. static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
  2938. {
  2939. if (mlxsw_sp_fid_is_vfid(fid))
  2940. return MLXSW_REG_RITR_FID_IF;
  2941. else
  2942. return MLXSW_REG_RITR_VLAN_IF;
  2943. }
  2944. static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
  2945. struct net_device *l3_dev,
  2946. u16 fid, u16 rif,
  2947. bool create)
  2948. {
  2949. enum mlxsw_reg_ritr_if_type rif_type;
  2950. char ritr_pl[MLXSW_REG_RITR_LEN];
  2951. rif_type = mlxsw_sp_rif_type_get(fid);
  2952. mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
  2953. l3_dev->dev_addr);
  2954. mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
  2955. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
  2956. }
  2957. static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
  2958. struct net_device *l3_dev,
  2959. struct mlxsw_sp_fid *f)
  2960. {
  2961. struct mlxsw_sp_rif *r;
  2962. u16 rif;
  2963. int err;
  2964. rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
  2965. if (rif == MLXSW_SP_INVALID_RIF)
  2966. return -ERANGE;
  2967. err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
  2968. if (err)
  2969. return err;
  2970. err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
  2971. if (err)
  2972. goto err_rif_bridge_op;
  2973. err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
  2974. if (err)
  2975. goto err_rif_fdb_op;
  2976. r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
  2977. if (!r) {
  2978. err = -ENOMEM;
  2979. goto err_rif_alloc;
  2980. }
  2981. f->r = r;
  2982. mlxsw_sp->rifs[rif] = r;
  2983. netdev_dbg(l3_dev, "RIF=%d created\n", rif);
  2984. return 0;
  2985. err_rif_alloc:
  2986. mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
  2987. err_rif_fdb_op:
  2988. mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
  2989. err_rif_bridge_op:
  2990. mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
  2991. return err;
  2992. }
  2993. void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
  2994. struct mlxsw_sp_rif *r)
  2995. {
  2996. struct net_device *l3_dev = r->dev;
  2997. struct mlxsw_sp_fid *f = r->f;
  2998. u16 rif = r->rif;
  2999. mlxsw_sp->rifs[rif] = NULL;
  3000. f->r = NULL;
  3001. kfree(r);
  3002. mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
  3003. mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
  3004. mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
  3005. netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
  3006. }
  3007. static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
  3008. struct net_device *br_dev,
  3009. unsigned long event)
  3010. {
  3011. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
  3012. struct mlxsw_sp_fid *f;
  3013. /* FID can either be an actual FID if the L3 device is the
  3014. * VLAN-aware bridge or a VLAN device on top. Otherwise, the
  3015. * L3 device is a VLAN-unaware bridge and we get a vFID.
  3016. */
  3017. f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
  3018. if (WARN_ON(!f))
  3019. return -EINVAL;
  3020. switch (event) {
  3021. case NETDEV_UP:
  3022. return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
  3023. case NETDEV_DOWN:
  3024. mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
  3025. break;
  3026. }
  3027. return 0;
  3028. }
  3029. static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
  3030. unsigned long event)
  3031. {
  3032. struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
  3033. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
  3034. u16 vid = vlan_dev_vlan_id(vlan_dev);
  3035. if (mlxsw_sp_port_dev_check(real_dev))
  3036. return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
  3037. vid);
  3038. else if (netif_is_lag_master(real_dev))
  3039. return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
  3040. vid);
  3041. else if (netif_is_bridge_master(real_dev) &&
  3042. mlxsw_sp->master_bridge.dev == real_dev)
  3043. return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
  3044. event);
  3045. return 0;
  3046. }
  3047. static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
  3048. unsigned long event, void *ptr)
  3049. {
  3050. struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
  3051. struct net_device *dev = ifa->ifa_dev->dev;
  3052. struct mlxsw_sp *mlxsw_sp;
  3053. struct mlxsw_sp_rif *r;
  3054. int err = 0;
  3055. mlxsw_sp = mlxsw_sp_lower_get(dev);
  3056. if (!mlxsw_sp)
  3057. goto out;
  3058. r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
  3059. if (!mlxsw_sp_rif_should_config(r, event))
  3060. goto out;
  3061. if (mlxsw_sp_port_dev_check(dev))
  3062. err = mlxsw_sp_inetaddr_port_event(dev, event);
  3063. else if (netif_is_lag_master(dev))
  3064. err = mlxsw_sp_inetaddr_lag_event(dev, event);
  3065. else if (netif_is_bridge_master(dev))
  3066. err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
  3067. else if (is_vlan_dev(dev))
  3068. err = mlxsw_sp_inetaddr_vlan_event(dev, event);
  3069. out:
  3070. return notifier_from_errno(err);
  3071. }
  3072. static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
  3073. const char *mac, int mtu)
  3074. {
  3075. char ritr_pl[MLXSW_REG_RITR_LEN];
  3076. int err;
  3077. mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
  3078. err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
  3079. if (err)
  3080. return err;
  3081. mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
  3082. mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
  3083. mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
  3084. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
  3085. }
  3086. static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
  3087. {
  3088. struct mlxsw_sp *mlxsw_sp;
  3089. struct mlxsw_sp_rif *r;
  3090. int err;
  3091. mlxsw_sp = mlxsw_sp_lower_get(dev);
  3092. if (!mlxsw_sp)
  3093. return 0;
  3094. r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
  3095. if (!r)
  3096. return 0;
  3097. err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
  3098. if (err)
  3099. return err;
  3100. err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
  3101. if (err)
  3102. goto err_rif_edit;
  3103. err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
  3104. if (err)
  3105. goto err_rif_fdb_op;
  3106. ether_addr_copy(r->addr, dev->dev_addr);
  3107. r->mtu = dev->mtu;
  3108. netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
  3109. return 0;
  3110. err_rif_fdb_op:
  3111. mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
  3112. err_rif_edit:
  3113. mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
  3114. return err;
  3115. }
  3116. static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
  3117. u16 fid)
  3118. {
  3119. if (mlxsw_sp_fid_is_vfid(fid))
  3120. return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
  3121. else
  3122. return test_bit(fid, lag_port->active_vlans);
  3123. }
  3124. static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
  3125. u16 fid)
  3126. {
  3127. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3128. u8 local_port = mlxsw_sp_port->local_port;
  3129. u16 lag_id = mlxsw_sp_port->lag_id;
  3130. struct mlxsw_resources *resources;
  3131. int i, count = 0;
  3132. if (!mlxsw_sp_port->lagged)
  3133. return true;
  3134. resources = mlxsw_core_resources_get(mlxsw_sp->core);
  3135. for (i = 0; i < resources->max_ports_in_lag; i++) {
  3136. struct mlxsw_sp_port *lag_port;
  3137. lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
  3138. if (!lag_port || lag_port->local_port == local_port)
  3139. continue;
  3140. if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
  3141. count++;
  3142. }
  3143. return !count;
  3144. }
  3145. static int
  3146. mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
  3147. u16 fid)
  3148. {
  3149. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3150. char sfdf_pl[MLXSW_REG_SFDF_LEN];
  3151. mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
  3152. mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
  3153. mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
  3154. mlxsw_sp_port->local_port);
  3155. netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
  3156. mlxsw_sp_port->local_port, fid);
  3157. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
  3158. }
  3159. static int
  3160. mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
  3161. u16 fid)
  3162. {
  3163. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3164. char sfdf_pl[MLXSW_REG_SFDF_LEN];
  3165. mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
  3166. mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
  3167. mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
  3168. netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
  3169. mlxsw_sp_port->lag_id, fid);
  3170. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
  3171. }
  3172. int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
  3173. {
  3174. if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
  3175. return 0;
  3176. if (mlxsw_sp_port->lagged)
  3177. return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
  3178. fid);
  3179. else
  3180. return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
  3181. }
  3182. static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
  3183. {
  3184. struct mlxsw_sp_fid *f, *tmp;
  3185. list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
  3186. if (--f->ref_count == 0)
  3187. mlxsw_sp_fid_destroy(mlxsw_sp, f);
  3188. else
  3189. WARN_ON_ONCE(1);
  3190. }
  3191. static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
  3192. struct net_device *br_dev)
  3193. {
  3194. return !mlxsw_sp->master_bridge.dev ||
  3195. mlxsw_sp->master_bridge.dev == br_dev;
  3196. }
  3197. static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
  3198. struct net_device *br_dev)
  3199. {
  3200. mlxsw_sp->master_bridge.dev = br_dev;
  3201. mlxsw_sp->master_bridge.ref_count++;
  3202. }
  3203. static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
  3204. {
  3205. if (--mlxsw_sp->master_bridge.ref_count == 0) {
  3206. mlxsw_sp->master_bridge.dev = NULL;
  3207. /* It's possible upper VLAN devices are still holding
  3208. * references to underlying FIDs. Drop the reference
  3209. * and release the resources if it was the last one.
  3210. * If it wasn't, then something bad happened.
  3211. */
  3212. mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
  3213. }
  3214. }
  3215. static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
  3216. struct net_device *br_dev)
  3217. {
  3218. struct net_device *dev = mlxsw_sp_port->dev;
  3219. int err;
  3220. /* When port is not bridged untagged packets are tagged with
  3221. * PVID=VID=1, thereby creating an implicit VLAN interface in
  3222. * the device. Remove it and let bridge code take care of its
  3223. * own VLANs.
  3224. */
  3225. err = mlxsw_sp_port_kill_vid(dev, 0, 1);
  3226. if (err)
  3227. return err;
  3228. mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
  3229. mlxsw_sp_port->learning = 1;
  3230. mlxsw_sp_port->learning_sync = 1;
  3231. mlxsw_sp_port->uc_flood = 1;
  3232. mlxsw_sp_port->bridged = 1;
  3233. return 0;
  3234. }
  3235. static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
  3236. {
  3237. struct net_device *dev = mlxsw_sp_port->dev;
  3238. mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
  3239. mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
  3240. mlxsw_sp_port->learning = 0;
  3241. mlxsw_sp_port->learning_sync = 0;
  3242. mlxsw_sp_port->uc_flood = 0;
  3243. mlxsw_sp_port->bridged = 0;
  3244. /* Add implicit VLAN interface in the device, so that untagged
  3245. * packets will be classified to the default vFID.
  3246. */
  3247. mlxsw_sp_port_add_vid(dev, 0, 1);
  3248. }
  3249. static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
  3250. {
  3251. char sldr_pl[MLXSW_REG_SLDR_LEN];
  3252. mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
  3253. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
  3254. }
  3255. static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
  3256. {
  3257. char sldr_pl[MLXSW_REG_SLDR_LEN];
  3258. mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
  3259. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
  3260. }
  3261. static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
  3262. u16 lag_id, u8 port_index)
  3263. {
  3264. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3265. char slcor_pl[MLXSW_REG_SLCOR_LEN];
  3266. mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
  3267. lag_id, port_index);
  3268. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
  3269. }
  3270. static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
  3271. u16 lag_id)
  3272. {
  3273. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3274. char slcor_pl[MLXSW_REG_SLCOR_LEN];
  3275. mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
  3276. lag_id);
  3277. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
  3278. }
  3279. static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
  3280. u16 lag_id)
  3281. {
  3282. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3283. char slcor_pl[MLXSW_REG_SLCOR_LEN];
  3284. mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
  3285. lag_id);
  3286. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
  3287. }
  3288. static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
  3289. u16 lag_id)
  3290. {
  3291. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3292. char slcor_pl[MLXSW_REG_SLCOR_LEN];
  3293. mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
  3294. lag_id);
  3295. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
  3296. }
  3297. static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
  3298. struct net_device *lag_dev,
  3299. u16 *p_lag_id)
  3300. {
  3301. struct mlxsw_resources *resources;
  3302. struct mlxsw_sp_upper *lag;
  3303. int free_lag_id = -1;
  3304. int i;
  3305. resources = mlxsw_core_resources_get(mlxsw_sp->core);
  3306. for (i = 0; i < resources->max_lag; i++) {
  3307. lag = mlxsw_sp_lag_get(mlxsw_sp, i);
  3308. if (lag->ref_count) {
  3309. if (lag->dev == lag_dev) {
  3310. *p_lag_id = i;
  3311. return 0;
  3312. }
  3313. } else if (free_lag_id < 0) {
  3314. free_lag_id = i;
  3315. }
  3316. }
  3317. if (free_lag_id < 0)
  3318. return -EBUSY;
  3319. *p_lag_id = free_lag_id;
  3320. return 0;
  3321. }
  3322. static bool
  3323. mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
  3324. struct net_device *lag_dev,
  3325. struct netdev_lag_upper_info *lag_upper_info)
  3326. {
  3327. u16 lag_id;
  3328. if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
  3329. return false;
  3330. if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
  3331. return false;
  3332. return true;
  3333. }
  3334. static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
  3335. u16 lag_id, u8 *p_port_index)
  3336. {
  3337. struct mlxsw_resources *resources;
  3338. int i;
  3339. resources = mlxsw_core_resources_get(mlxsw_sp->core);
  3340. for (i = 0; i < resources->max_ports_in_lag; i++) {
  3341. if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
  3342. *p_port_index = i;
  3343. return 0;
  3344. }
  3345. }
  3346. return -EBUSY;
  3347. }
  3348. static void
  3349. mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
  3350. u16 lag_id)
  3351. {
  3352. struct mlxsw_sp_port *mlxsw_sp_vport;
  3353. struct mlxsw_sp_fid *f;
  3354. mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
  3355. if (WARN_ON(!mlxsw_sp_vport))
  3356. return;
  3357. /* If vPort is assigned a RIF, then leave it since it's no
  3358. * longer valid.
  3359. */
  3360. f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
  3361. if (f)
  3362. f->leave(mlxsw_sp_vport);
  3363. mlxsw_sp_vport->lag_id = lag_id;
  3364. mlxsw_sp_vport->lagged = 1;
  3365. }
  3366. static void
  3367. mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
  3368. {
  3369. struct mlxsw_sp_port *mlxsw_sp_vport;
  3370. struct mlxsw_sp_fid *f;
  3371. mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
  3372. if (WARN_ON(!mlxsw_sp_vport))
  3373. return;
  3374. f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
  3375. if (f)
  3376. f->leave(mlxsw_sp_vport);
  3377. mlxsw_sp_vport->lagged = 0;
  3378. }
  3379. static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
  3380. struct net_device *lag_dev)
  3381. {
  3382. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3383. struct mlxsw_sp_upper *lag;
  3384. u16 lag_id;
  3385. u8 port_index;
  3386. int err;
  3387. err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
  3388. if (err)
  3389. return err;
  3390. lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
  3391. if (!lag->ref_count) {
  3392. err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
  3393. if (err)
  3394. return err;
  3395. lag->dev = lag_dev;
  3396. }
  3397. err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
  3398. if (err)
  3399. return err;
  3400. err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
  3401. if (err)
  3402. goto err_col_port_add;
  3403. err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
  3404. if (err)
  3405. goto err_col_port_enable;
  3406. mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
  3407. mlxsw_sp_port->local_port);
  3408. mlxsw_sp_port->lag_id = lag_id;
  3409. mlxsw_sp_port->lagged = 1;
  3410. lag->ref_count++;
  3411. mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
  3412. return 0;
  3413. err_col_port_enable:
  3414. mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
  3415. err_col_port_add:
  3416. if (!lag->ref_count)
  3417. mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
  3418. return err;
  3419. }
  3420. static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
  3421. struct net_device *lag_dev)
  3422. {
  3423. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3424. u16 lag_id = mlxsw_sp_port->lag_id;
  3425. struct mlxsw_sp_upper *lag;
  3426. if (!mlxsw_sp_port->lagged)
  3427. return;
  3428. lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
  3429. WARN_ON(lag->ref_count == 0);
  3430. mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
  3431. mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
  3432. if (mlxsw_sp_port->bridged) {
  3433. mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
  3434. mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
  3435. }
  3436. if (lag->ref_count == 1)
  3437. mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
  3438. mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
  3439. mlxsw_sp_port->local_port);
  3440. mlxsw_sp_port->lagged = 0;
  3441. lag->ref_count--;
  3442. mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
  3443. }
  3444. static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
  3445. u16 lag_id)
  3446. {
  3447. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3448. char sldr_pl[MLXSW_REG_SLDR_LEN];
  3449. mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
  3450. mlxsw_sp_port->local_port);
  3451. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
  3452. }
  3453. static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
  3454. u16 lag_id)
  3455. {
  3456. struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3457. char sldr_pl[MLXSW_REG_SLDR_LEN];
  3458. mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
  3459. mlxsw_sp_port->local_port);
  3460. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
  3461. }
  3462. static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
  3463. bool lag_tx_enabled)
  3464. {
  3465. if (lag_tx_enabled)
  3466. return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
  3467. mlxsw_sp_port->lag_id);
  3468. else
  3469. return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
  3470. mlxsw_sp_port->lag_id);
  3471. }
  3472. static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
  3473. struct netdev_lag_lower_state_info *info)
  3474. {
  3475. return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
  3476. }
  3477. static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
  3478. struct net_device *vlan_dev)
  3479. {
  3480. struct mlxsw_sp_port *mlxsw_sp_vport;
  3481. u16 vid = vlan_dev_vlan_id(vlan_dev);
  3482. mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
  3483. if (WARN_ON(!mlxsw_sp_vport))
  3484. return -EINVAL;
  3485. mlxsw_sp_vport->dev = vlan_dev;
  3486. return 0;
  3487. }
  3488. static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
  3489. struct net_device *vlan_dev)
  3490. {
  3491. struct mlxsw_sp_port *mlxsw_sp_vport;
  3492. u16 vid = vlan_dev_vlan_id(vlan_dev);
  3493. mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
  3494. if (WARN_ON(!mlxsw_sp_vport))
  3495. return;
  3496. mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
  3497. }
  3498. static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
  3499. unsigned long event, void *ptr)
  3500. {
  3501. struct netdev_notifier_changeupper_info *info;
  3502. struct mlxsw_sp_port *mlxsw_sp_port;
  3503. struct net_device *upper_dev;
  3504. struct mlxsw_sp *mlxsw_sp;
  3505. int err = 0;
  3506. mlxsw_sp_port = netdev_priv(dev);
  3507. mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
  3508. info = ptr;
  3509. switch (event) {
  3510. case NETDEV_PRECHANGEUPPER:
  3511. upper_dev = info->upper_dev;
  3512. if (!is_vlan_dev(upper_dev) &&
  3513. !netif_is_lag_master(upper_dev) &&
  3514. !netif_is_bridge_master(upper_dev))
  3515. return -EINVAL;
  3516. if (!info->linking)
  3517. break;
  3518. if (netdev_has_any_upper_dev(upper_dev))
  3519. return -EINVAL;
  3520. /* HW limitation forbids to put ports to multiple bridges. */
  3521. if (netif_is_bridge_master(upper_dev) &&
  3522. !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
  3523. return -EINVAL;
  3524. if (netif_is_lag_master(upper_dev) &&
  3525. !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
  3526. info->upper_info))
  3527. return -EINVAL;
  3528. if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
  3529. return -EINVAL;
  3530. if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
  3531. !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
  3532. return -EINVAL;
  3533. break;
  3534. case NETDEV_CHANGEUPPER:
  3535. upper_dev = info->upper_dev;
  3536. if (is_vlan_dev(upper_dev)) {
  3537. if (info->linking)
  3538. err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
  3539. upper_dev);
  3540. else
  3541. mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
  3542. upper_dev);
  3543. } else if (netif_is_bridge_master(upper_dev)) {
  3544. if (info->linking)
  3545. err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
  3546. upper_dev);
  3547. else
  3548. mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
  3549. } else if (netif_is_lag_master(upper_dev)) {
  3550. if (info->linking)
  3551. err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
  3552. upper_dev);
  3553. else
  3554. mlxsw_sp_port_lag_leave(mlxsw_sp_port,
  3555. upper_dev);
  3556. } else {
  3557. err = -EINVAL;
  3558. WARN_ON(1);
  3559. }
  3560. break;
  3561. }
  3562. return err;
  3563. }
  3564. static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
  3565. unsigned long event, void *ptr)
  3566. {
  3567. struct netdev_notifier_changelowerstate_info *info;
  3568. struct mlxsw_sp_port *mlxsw_sp_port;
  3569. int err;
  3570. mlxsw_sp_port = netdev_priv(dev);
  3571. info = ptr;
  3572. switch (event) {
  3573. case NETDEV_CHANGELOWERSTATE:
  3574. if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
  3575. err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
  3576. info->lower_state_info);
  3577. if (err)
  3578. netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
  3579. }
  3580. break;
  3581. }
  3582. return 0;
  3583. }
  3584. static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
  3585. unsigned long event, void *ptr)
  3586. {
  3587. switch (event) {
  3588. case NETDEV_PRECHANGEUPPER:
  3589. case NETDEV_CHANGEUPPER:
  3590. return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
  3591. case NETDEV_CHANGELOWERSTATE:
  3592. return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
  3593. }
  3594. return 0;
  3595. }
  3596. static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
  3597. unsigned long event, void *ptr)
  3598. {
  3599. struct net_device *dev;
  3600. struct list_head *iter;
  3601. int ret;
  3602. netdev_for_each_lower_dev(lag_dev, dev, iter) {
  3603. if (mlxsw_sp_port_dev_check(dev)) {
  3604. ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
  3605. if (ret)
  3606. return ret;
  3607. }
  3608. }
  3609. return 0;
  3610. }
  3611. static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
  3612. struct net_device *vlan_dev)
  3613. {
  3614. u16 fid = vlan_dev_vlan_id(vlan_dev);
  3615. struct mlxsw_sp_fid *f;
  3616. f = mlxsw_sp_fid_find(mlxsw_sp, fid);
  3617. if (!f) {
  3618. f = mlxsw_sp_fid_create(mlxsw_sp, fid);
  3619. if (IS_ERR(f))
  3620. return PTR_ERR(f);
  3621. }
  3622. f->ref_count++;
  3623. return 0;
  3624. }
  3625. static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
  3626. struct net_device *vlan_dev)
  3627. {
  3628. u16 fid = vlan_dev_vlan_id(vlan_dev);
  3629. struct mlxsw_sp_fid *f;
  3630. f = mlxsw_sp_fid_find(mlxsw_sp, fid);
  3631. if (f && f->r)
  3632. mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
  3633. if (f && --f->ref_count == 0)
  3634. mlxsw_sp_fid_destroy(mlxsw_sp, f);
  3635. }
  3636. static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
  3637. unsigned long event, void *ptr)
  3638. {
  3639. struct netdev_notifier_changeupper_info *info;
  3640. struct net_device *upper_dev;
  3641. struct mlxsw_sp *mlxsw_sp;
  3642. int err;
  3643. mlxsw_sp = mlxsw_sp_lower_get(br_dev);
  3644. if (!mlxsw_sp)
  3645. return 0;
  3646. if (br_dev != mlxsw_sp->master_bridge.dev)
  3647. return 0;
  3648. info = ptr;
  3649. switch (event) {
  3650. case NETDEV_CHANGEUPPER:
  3651. upper_dev = info->upper_dev;
  3652. if (!is_vlan_dev(upper_dev))
  3653. break;
  3654. if (info->linking) {
  3655. err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
  3656. upper_dev);
  3657. if (err)
  3658. return err;
  3659. } else {
  3660. mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
  3661. }
  3662. break;
  3663. }
  3664. return 0;
  3665. }
  3666. static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
  3667. {
  3668. return find_first_zero_bit(mlxsw_sp->vfids.mapped,
  3669. MLXSW_SP_VFID_MAX);
  3670. }
  3671. static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
  3672. {
  3673. char sfmr_pl[MLXSW_REG_SFMR_LEN];
  3674. mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
  3675. return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
  3676. }
  3677. static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
  3678. static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
  3679. struct net_device *br_dev)
  3680. {
  3681. struct device *dev = mlxsw_sp->bus_info->dev;
  3682. struct mlxsw_sp_fid *f;
  3683. u16 vfid, fid;
  3684. int err;
  3685. vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
  3686. if (vfid == MLXSW_SP_VFID_MAX) {
  3687. dev_err(dev, "No available vFIDs\n");
  3688. return ERR_PTR(-ERANGE);
  3689. }
  3690. fid = mlxsw_sp_vfid_to_fid(vfid);
  3691. err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
  3692. if (err) {
  3693. dev_err(dev, "Failed to create FID=%d\n", fid);
  3694. return ERR_PTR(err);
  3695. }
  3696. f = kzalloc(sizeof(*f), GFP_KERNEL);
  3697. if (!f)
  3698. goto err_allocate_vfid;
  3699. f->leave = mlxsw_sp_vport_vfid_leave;
  3700. f->fid = fid;
  3701. f->dev = br_dev;
  3702. list_add(&f->list, &mlxsw_sp->vfids.list);
  3703. set_bit(vfid, mlxsw_sp->vfids.mapped);
  3704. return f;
  3705. err_allocate_vfid:
  3706. mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
  3707. return ERR_PTR(-ENOMEM);
  3708. }
  3709. static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
  3710. struct mlxsw_sp_fid *f)
  3711. {
  3712. u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
  3713. u16 fid = f->fid;
  3714. clear_bit(vfid, mlxsw_sp->vfids.mapped);
  3715. list_del(&f->list);
  3716. if (f->r)
  3717. mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
  3718. kfree(f);
  3719. mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
  3720. }
  3721. static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
  3722. bool valid)
  3723. {
  3724. enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
  3725. u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
  3726. return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
  3727. vid);
  3728. }
  3729. static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
  3730. struct net_device *br_dev)
  3731. {
  3732. struct mlxsw_sp_fid *f;
  3733. int err;
  3734. f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
  3735. if (!f) {
  3736. f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
  3737. if (IS_ERR(f))
  3738. return PTR_ERR(f);
  3739. }
  3740. err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
  3741. if (err)
  3742. goto err_vport_flood_set;
  3743. err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
  3744. if (err)
  3745. goto err_vport_fid_map;
  3746. mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
  3747. f->ref_count++;
  3748. netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
  3749. return 0;
  3750. err_vport_fid_map:
  3751. mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
  3752. err_vport_flood_set:
  3753. if (!f->ref_count)
  3754. mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
  3755. return err;
  3756. }
  3757. static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
  3758. {
  3759. struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
  3760. netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
  3761. mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
  3762. mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
  3763. mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
  3764. mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
  3765. if (--f->ref_count == 0)
  3766. mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
  3767. }
  3768. static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
  3769. struct net_device *br_dev)
  3770. {
  3771. struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
  3772. u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
  3773. struct net_device *dev = mlxsw_sp_vport->dev;
  3774. int err;
  3775. if (f && !WARN_ON(!f->leave))
  3776. f->leave(mlxsw_sp_vport);
  3777. err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
  3778. if (err) {
  3779. netdev_err(dev, "Failed to join vFID\n");
  3780. return err;
  3781. }
  3782. err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
  3783. if (err) {
  3784. netdev_err(dev, "Failed to enable learning\n");
  3785. goto err_port_vid_learning_set;
  3786. }
  3787. mlxsw_sp_vport->learning = 1;
  3788. mlxsw_sp_vport->learning_sync = 1;
  3789. mlxsw_sp_vport->uc_flood = 1;
  3790. mlxsw_sp_vport->bridged = 1;
  3791. return 0;
  3792. err_port_vid_learning_set:
  3793. mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
  3794. return err;
  3795. }
  3796. static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
  3797. {
  3798. u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
  3799. mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
  3800. mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
  3801. mlxsw_sp_vport->learning = 0;
  3802. mlxsw_sp_vport->learning_sync = 0;
  3803. mlxsw_sp_vport->uc_flood = 0;
  3804. mlxsw_sp_vport->bridged = 0;
  3805. }
  3806. static bool
  3807. mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
  3808. const struct net_device *br_dev)
  3809. {
  3810. struct mlxsw_sp_port *mlxsw_sp_vport;
  3811. list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
  3812. vport.list) {
  3813. struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
  3814. if (dev && dev == br_dev)
  3815. return false;
  3816. }
  3817. return true;
  3818. }
  3819. static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
  3820. unsigned long event, void *ptr,
  3821. u16 vid)
  3822. {
  3823. struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
  3824. struct netdev_notifier_changeupper_info *info = ptr;
  3825. struct mlxsw_sp_port *mlxsw_sp_vport;
  3826. struct net_device *upper_dev;
  3827. int err = 0;
  3828. mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
  3829. switch (event) {
  3830. case NETDEV_PRECHANGEUPPER:
  3831. upper_dev = info->upper_dev;
  3832. if (!netif_is_bridge_master(upper_dev))
  3833. return -EINVAL;
  3834. if (!info->linking)
  3835. break;
  3836. if (netdev_has_any_upper_dev(upper_dev))
  3837. return -EINVAL;
  3838. /* We can't have multiple VLAN interfaces configured on
  3839. * the same port and being members in the same bridge.
  3840. */
  3841. if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
  3842. upper_dev))
  3843. return -EINVAL;
  3844. break;
  3845. case NETDEV_CHANGEUPPER:
  3846. upper_dev = info->upper_dev;
  3847. if (info->linking) {
  3848. if (WARN_ON(!mlxsw_sp_vport))
  3849. return -EINVAL;
  3850. err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
  3851. upper_dev);
  3852. } else {
  3853. if (!mlxsw_sp_vport)
  3854. return 0;
  3855. mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
  3856. }
  3857. }
  3858. return err;
  3859. }
  3860. static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
  3861. unsigned long event, void *ptr,
  3862. u16 vid)
  3863. {
  3864. struct net_device *dev;
  3865. struct list_head *iter;
  3866. int ret;
  3867. netdev_for_each_lower_dev(lag_dev, dev, iter) {
  3868. if (mlxsw_sp_port_dev_check(dev)) {
  3869. ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
  3870. vid);
  3871. if (ret)
  3872. return ret;
  3873. }
  3874. }
  3875. return 0;
  3876. }
  3877. static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
  3878. unsigned long event, void *ptr)
  3879. {
  3880. struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
  3881. u16 vid = vlan_dev_vlan_id(vlan_dev);
  3882. if (mlxsw_sp_port_dev_check(real_dev))
  3883. return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
  3884. vid);
  3885. else if (netif_is_lag_master(real_dev))
  3886. return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
  3887. vid);
  3888. return 0;
  3889. }
  3890. static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
  3891. unsigned long event, void *ptr)
  3892. {
  3893. struct net_device *dev = netdev_notifier_info_to_dev(ptr);
  3894. int err = 0;
  3895. if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
  3896. err = mlxsw_sp_netdevice_router_port_event(dev);
  3897. else if (mlxsw_sp_port_dev_check(dev))
  3898. err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
  3899. else if (netif_is_lag_master(dev))
  3900. err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
  3901. else if (netif_is_bridge_master(dev))
  3902. err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
  3903. else if (is_vlan_dev(dev))
  3904. err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
  3905. return notifier_from_errno(err);
  3906. }
  3907. static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
  3908. .notifier_call = mlxsw_sp_netdevice_event,
  3909. };
  3910. static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
  3911. .notifier_call = mlxsw_sp_inetaddr_event,
  3912. .priority = 10, /* Must be called before FIB notifier block */
  3913. };
  3914. static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
  3915. .notifier_call = mlxsw_sp_router_netevent_event,
  3916. };
  3917. static int __init mlxsw_sp_module_init(void)
  3918. {
  3919. int err;
  3920. register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
  3921. register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
  3922. register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
  3923. err = mlxsw_core_driver_register(&mlxsw_sp_driver);
  3924. if (err)
  3925. goto err_core_driver_register;
  3926. return 0;
  3927. err_core_driver_register:
  3928. unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
  3929. unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
  3930. unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
  3931. return err;
  3932. }
  3933. static void __exit mlxsw_sp_module_exit(void)
  3934. {
  3935. mlxsw_core_driver_unregister(&mlxsw_sp_driver);
  3936. unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
  3937. unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
  3938. unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
  3939. }
  3940. module_init(mlxsw_sp_module_init);
  3941. module_exit(mlxsw_sp_module_exit);
  3942. MODULE_LICENSE("Dual BSD/GPL");
  3943. MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
  3944. MODULE_DESCRIPTION("Mellanox Spectrum driver");
  3945. MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);