sriov.c 5.8 KB

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  1. /*
  2. * Copyright (c) 2014, Mellanox Technologies inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/pci.h>
  33. #include <linux/mlx5/driver.h>
  34. #include "mlx5_core.h"
  35. #ifdef CONFIG_MLX5_CORE_EN
  36. #include "eswitch.h"
  37. #endif
  38. bool mlx5_sriov_is_enabled(struct mlx5_core_dev *dev)
  39. {
  40. struct mlx5_core_sriov *sriov = &dev->priv.sriov;
  41. return !!sriov->num_vfs;
  42. }
  43. static int mlx5_device_enable_sriov(struct mlx5_core_dev *dev, int num_vfs)
  44. {
  45. struct mlx5_core_sriov *sriov = &dev->priv.sriov;
  46. int err;
  47. int vf;
  48. if (sriov->enabled_vfs) {
  49. mlx5_core_warn(dev,
  50. "failed to enable SRIOV on device, already enabled with %d vfs\n",
  51. sriov->enabled_vfs);
  52. return -EBUSY;
  53. }
  54. #ifdef CONFIG_MLX5_CORE_EN
  55. err = mlx5_eswitch_enable_sriov(dev->priv.eswitch, num_vfs, SRIOV_LEGACY);
  56. if (err) {
  57. mlx5_core_warn(dev,
  58. "failed to enable eswitch SRIOV (%d)\n", err);
  59. return err;
  60. }
  61. #endif
  62. for (vf = 0; vf < num_vfs; vf++) {
  63. err = mlx5_core_enable_hca(dev, vf + 1);
  64. if (err) {
  65. mlx5_core_warn(dev, "failed to enable VF %d (%d)\n", vf, err);
  66. continue;
  67. }
  68. sriov->vfs_ctx[vf].enabled = 1;
  69. sriov->enabled_vfs++;
  70. mlx5_core_dbg(dev, "successfully enabled VF* %d\n", vf);
  71. }
  72. return 0;
  73. }
  74. static void mlx5_device_disable_sriov(struct mlx5_core_dev *dev)
  75. {
  76. struct mlx5_core_sriov *sriov = &dev->priv.sriov;
  77. int err;
  78. int vf;
  79. if (!sriov->enabled_vfs)
  80. return;
  81. for (vf = 0; vf < sriov->num_vfs; vf++) {
  82. if (!sriov->vfs_ctx[vf].enabled)
  83. continue;
  84. err = mlx5_core_disable_hca(dev, vf + 1);
  85. if (err) {
  86. mlx5_core_warn(dev, "failed to disable VF %d\n", vf);
  87. continue;
  88. }
  89. sriov->vfs_ctx[vf].enabled = 0;
  90. sriov->enabled_vfs--;
  91. }
  92. #ifdef CONFIG_MLX5_CORE_EN
  93. mlx5_eswitch_disable_sriov(dev->priv.eswitch);
  94. #endif
  95. if (mlx5_wait_for_vf_pages(dev))
  96. mlx5_core_warn(dev, "timeout reclaiming VFs pages\n");
  97. }
  98. static int mlx5_pci_enable_sriov(struct pci_dev *pdev, int num_vfs)
  99. {
  100. struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
  101. int err = 0;
  102. if (pci_num_vf(pdev)) {
  103. mlx5_core_warn(dev, "Unable to enable pci sriov, already enabled\n");
  104. return -EBUSY;
  105. }
  106. err = pci_enable_sriov(pdev, num_vfs);
  107. if (err)
  108. mlx5_core_warn(dev, "pci_enable_sriov failed : %d\n", err);
  109. return err;
  110. }
  111. static void mlx5_pci_disable_sriov(struct pci_dev *pdev)
  112. {
  113. pci_disable_sriov(pdev);
  114. }
  115. static int mlx5_sriov_enable(struct pci_dev *pdev, int num_vfs)
  116. {
  117. struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
  118. struct mlx5_core_sriov *sriov = &dev->priv.sriov;
  119. int err = 0;
  120. err = mlx5_device_enable_sriov(dev, num_vfs);
  121. if (err) {
  122. mlx5_core_warn(dev, "mlx5_device_enable_sriov failed : %d\n", err);
  123. return err;
  124. }
  125. err = mlx5_pci_enable_sriov(pdev, num_vfs);
  126. if (err) {
  127. mlx5_core_warn(dev, "mlx5_pci_enable_sriov failed : %d\n", err);
  128. mlx5_device_disable_sriov(dev);
  129. return err;
  130. }
  131. sriov->num_vfs = num_vfs;
  132. return 0;
  133. }
  134. static void mlx5_sriov_disable(struct pci_dev *pdev)
  135. {
  136. struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
  137. struct mlx5_core_sriov *sriov = &dev->priv.sriov;
  138. mlx5_pci_disable_sriov(pdev);
  139. mlx5_device_disable_sriov(dev);
  140. sriov->num_vfs = 0;
  141. }
  142. int mlx5_core_sriov_configure(struct pci_dev *pdev, int num_vfs)
  143. {
  144. struct mlx5_core_dev *dev = pci_get_drvdata(pdev);
  145. int err = 0;
  146. mlx5_core_dbg(dev, "requested num_vfs %d\n", num_vfs);
  147. if (!mlx5_core_is_pf(dev))
  148. return -EPERM;
  149. if (num_vfs && mlx5_lag_is_active(dev)) {
  150. mlx5_core_warn(dev, "can't turn sriov on while LAG is active");
  151. return -EINVAL;
  152. }
  153. if (num_vfs)
  154. err = mlx5_sriov_enable(pdev, num_vfs);
  155. else
  156. mlx5_sriov_disable(pdev);
  157. return err ? err : num_vfs;
  158. }
  159. int mlx5_sriov_attach(struct mlx5_core_dev *dev)
  160. {
  161. struct mlx5_core_sriov *sriov = &dev->priv.sriov;
  162. if (!mlx5_core_is_pf(dev) || !sriov->num_vfs)
  163. return 0;
  164. /* If sriov VFs exist in PCI level, enable them in device level */
  165. return mlx5_device_enable_sriov(dev, sriov->num_vfs);
  166. }
  167. void mlx5_sriov_detach(struct mlx5_core_dev *dev)
  168. {
  169. if (!mlx5_core_is_pf(dev))
  170. return;
  171. mlx5_device_disable_sriov(dev);
  172. }
  173. int mlx5_sriov_init(struct mlx5_core_dev *dev)
  174. {
  175. struct mlx5_core_sriov *sriov = &dev->priv.sriov;
  176. struct pci_dev *pdev = dev->pdev;
  177. int total_vfs;
  178. if (!mlx5_core_is_pf(dev))
  179. return 0;
  180. total_vfs = pci_sriov_get_totalvfs(pdev);
  181. sriov->num_vfs = pci_num_vf(pdev);
  182. sriov->vfs_ctx = kcalloc(total_vfs, sizeof(*sriov->vfs_ctx), GFP_KERNEL);
  183. if (!sriov->vfs_ctx)
  184. return -ENOMEM;
  185. return 0;
  186. }
  187. void mlx5_sriov_cleanup(struct mlx5_core_dev *dev)
  188. {
  189. struct mlx5_core_sriov *sriov = &dev->priv.sriov;
  190. if (!mlx5_core_is_pf(dev))
  191. return;
  192. kfree(sriov->vfs_ctx);
  193. }