enic_res.c 9.4 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/netdevice.h>
  24. #include "wq_enet_desc.h"
  25. #include "rq_enet_desc.h"
  26. #include "cq_enet_desc.h"
  27. #include "vnic_resource.h"
  28. #include "vnic_enet.h"
  29. #include "vnic_dev.h"
  30. #include "vnic_wq.h"
  31. #include "vnic_rq.h"
  32. #include "vnic_cq.h"
  33. #include "vnic_intr.h"
  34. #include "vnic_stats.h"
  35. #include "vnic_nic.h"
  36. #include "vnic_rss.h"
  37. #include "enic_res.h"
  38. #include "enic.h"
  39. int enic_get_vnic_config(struct enic *enic)
  40. {
  41. struct vnic_enet_config *c = &enic->config;
  42. int err;
  43. err = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);
  44. if (err) {
  45. dev_err(enic_get_dev(enic),
  46. "Error getting MAC addr, %d\n", err);
  47. return err;
  48. }
  49. #define GET_CONFIG(m) \
  50. do { \
  51. err = vnic_dev_spec(enic->vdev, \
  52. offsetof(struct vnic_enet_config, m), \
  53. sizeof(c->m), &c->m); \
  54. if (err) { \
  55. dev_err(enic_get_dev(enic), \
  56. "Error getting %s, %d\n", #m, err); \
  57. return err; \
  58. } \
  59. } while (0)
  60. GET_CONFIG(flags);
  61. GET_CONFIG(wq_desc_count);
  62. GET_CONFIG(rq_desc_count);
  63. GET_CONFIG(mtu);
  64. GET_CONFIG(intr_timer_type);
  65. GET_CONFIG(intr_mode);
  66. GET_CONFIG(intr_timer_usec);
  67. GET_CONFIG(loop_tag);
  68. GET_CONFIG(num_arfs);
  69. c->wq_desc_count =
  70. min_t(u32, ENIC_MAX_WQ_DESCS,
  71. max_t(u32, ENIC_MIN_WQ_DESCS,
  72. c->wq_desc_count));
  73. c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  74. c->rq_desc_count =
  75. min_t(u32, ENIC_MAX_RQ_DESCS,
  76. max_t(u32, ENIC_MIN_RQ_DESCS,
  77. c->rq_desc_count));
  78. c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
  79. if (c->mtu == 0)
  80. c->mtu = 1500;
  81. c->mtu = min_t(u16, ENIC_MAX_MTU,
  82. max_t(u16, ENIC_MIN_MTU,
  83. c->mtu));
  84. c->intr_timer_usec = min_t(u32, c->intr_timer_usec,
  85. vnic_dev_get_intr_coal_timer_max(enic->vdev));
  86. dev_info(enic_get_dev(enic),
  87. "vNIC MAC addr %pM wq/rq %d/%d mtu %d\n",
  88. enic->mac_addr, c->wq_desc_count, c->rq_desc_count, c->mtu);
  89. dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s "
  90. "tso/lro %s/%s rss %s intr mode %s type %s timer %d usec "
  91. "loopback tag 0x%04x\n",
  92. ENIC_SETTING(enic, TXCSUM) ? "yes" : "no",
  93. ENIC_SETTING(enic, RXCSUM) ? "yes" : "no",
  94. ENIC_SETTING(enic, TSO) ? "yes" : "no",
  95. ENIC_SETTING(enic, LRO) ? "yes" : "no",
  96. ENIC_SETTING(enic, RSS) ? "yes" : "no",
  97. c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" :
  98. c->intr_mode == VENET_INTR_MODE_MSI ? "MSI" :
  99. c->intr_mode == VENET_INTR_MODE_ANY ? "any" :
  100. "unknown",
  101. c->intr_timer_type == VENET_INTR_TYPE_MIN ? "min" :
  102. c->intr_timer_type == VENET_INTR_TYPE_IDLE ? "idle" :
  103. "unknown",
  104. c->intr_timer_usec,
  105. c->loop_tag);
  106. return 0;
  107. }
  108. int enic_add_vlan(struct enic *enic, u16 vlanid)
  109. {
  110. u64 a0 = vlanid, a1 = 0;
  111. int wait = 1000;
  112. int err;
  113. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
  114. if (err)
  115. dev_err(enic_get_dev(enic), "Can't add vlan id, %d\n", err);
  116. return err;
  117. }
  118. int enic_del_vlan(struct enic *enic, u16 vlanid)
  119. {
  120. u64 a0 = vlanid, a1 = 0;
  121. int wait = 1000;
  122. int err;
  123. err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
  124. if (err)
  125. dev_err(enic_get_dev(enic), "Can't delete vlan id, %d\n", err);
  126. return err;
  127. }
  128. int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
  129. u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
  130. u8 ig_vlan_strip_en)
  131. {
  132. u64 a0, a1;
  133. u32 nic_cfg;
  134. int wait = 1000;
  135. vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
  136. rss_hash_type, rss_hash_bits, rss_base_cpu,
  137. rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
  138. a0 = nic_cfg;
  139. a1 = 0;
  140. return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
  141. }
  142. int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
  143. {
  144. u64 a0 = (u64)key_pa, a1 = len;
  145. int wait = 1000;
  146. return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
  147. }
  148. int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
  149. {
  150. u64 a0 = (u64)cpu_pa, a1 = len;
  151. int wait = 1000;
  152. return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
  153. }
  154. void enic_free_vnic_resources(struct enic *enic)
  155. {
  156. unsigned int i;
  157. for (i = 0; i < enic->wq_count; i++)
  158. vnic_wq_free(&enic->wq[i]);
  159. for (i = 0; i < enic->rq_count; i++)
  160. vnic_rq_free(&enic->rq[i]);
  161. for (i = 0; i < enic->cq_count; i++)
  162. vnic_cq_free(&enic->cq[i]);
  163. for (i = 0; i < enic->intr_count; i++)
  164. vnic_intr_free(&enic->intr[i]);
  165. }
  166. void enic_get_res_counts(struct enic *enic)
  167. {
  168. enic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
  169. enic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
  170. enic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
  171. enic->intr_count = vnic_dev_get_res_count(enic->vdev,
  172. RES_TYPE_INTR_CTRL);
  173. dev_info(enic_get_dev(enic),
  174. "vNIC resources avail: wq %d rq %d cq %d intr %d\n",
  175. enic->wq_count, enic->rq_count,
  176. enic->cq_count, enic->intr_count);
  177. }
  178. void enic_init_vnic_resources(struct enic *enic)
  179. {
  180. enum vnic_dev_intr_mode intr_mode;
  181. unsigned int mask_on_assertion;
  182. unsigned int interrupt_offset;
  183. unsigned int error_interrupt_enable;
  184. unsigned int error_interrupt_offset;
  185. unsigned int cq_index;
  186. unsigned int i;
  187. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  188. /* Init RQ/WQ resources.
  189. *
  190. * RQ[0 - n-1] point to CQ[0 - n-1]
  191. * WQ[0 - m-1] point to CQ[n - n+m-1]
  192. *
  193. * Error interrupt is not enabled for MSI.
  194. */
  195. switch (intr_mode) {
  196. case VNIC_DEV_INTR_MODE_INTX:
  197. case VNIC_DEV_INTR_MODE_MSIX:
  198. error_interrupt_enable = 1;
  199. error_interrupt_offset = enic->intr_count - 2;
  200. break;
  201. default:
  202. error_interrupt_enable = 0;
  203. error_interrupt_offset = 0;
  204. break;
  205. }
  206. for (i = 0; i < enic->rq_count; i++) {
  207. cq_index = i;
  208. vnic_rq_init(&enic->rq[i],
  209. cq_index,
  210. error_interrupt_enable,
  211. error_interrupt_offset);
  212. }
  213. for (i = 0; i < enic->wq_count; i++) {
  214. cq_index = enic->rq_count + i;
  215. vnic_wq_init(&enic->wq[i],
  216. cq_index,
  217. error_interrupt_enable,
  218. error_interrupt_offset);
  219. }
  220. /* Init CQ resources
  221. *
  222. * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
  223. * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
  224. */
  225. for (i = 0; i < enic->cq_count; i++) {
  226. switch (intr_mode) {
  227. case VNIC_DEV_INTR_MODE_MSIX:
  228. interrupt_offset = i;
  229. break;
  230. default:
  231. interrupt_offset = 0;
  232. break;
  233. }
  234. vnic_cq_init(&enic->cq[i],
  235. 0 /* flow_control_enable */,
  236. 1 /* color_enable */,
  237. 0 /* cq_head */,
  238. 0 /* cq_tail */,
  239. 1 /* cq_tail_color */,
  240. 1 /* interrupt_enable */,
  241. 1 /* cq_entry_enable */,
  242. 0 /* cq_message_enable */,
  243. interrupt_offset,
  244. 0 /* cq_message_addr */);
  245. }
  246. /* Init INTR resources
  247. *
  248. * mask_on_assertion is not used for INTx due to the level-
  249. * triggered nature of INTx
  250. */
  251. switch (intr_mode) {
  252. case VNIC_DEV_INTR_MODE_MSI:
  253. case VNIC_DEV_INTR_MODE_MSIX:
  254. mask_on_assertion = 1;
  255. break;
  256. default:
  257. mask_on_assertion = 0;
  258. break;
  259. }
  260. for (i = 0; i < enic->intr_count; i++) {
  261. vnic_intr_init(&enic->intr[i],
  262. enic->config.intr_timer_usec,
  263. enic->config.intr_timer_type,
  264. mask_on_assertion);
  265. }
  266. }
  267. int enic_alloc_vnic_resources(struct enic *enic)
  268. {
  269. enum vnic_dev_intr_mode intr_mode;
  270. unsigned int i;
  271. int err;
  272. intr_mode = vnic_dev_get_intr_mode(enic->vdev);
  273. dev_info(enic_get_dev(enic), "vNIC resources used: "
  274. "wq %d rq %d cq %d intr %d intr mode %s\n",
  275. enic->wq_count, enic->rq_count,
  276. enic->cq_count, enic->intr_count,
  277. intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
  278. intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
  279. intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
  280. "unknown");
  281. /* Allocate queue resources
  282. */
  283. for (i = 0; i < enic->wq_count; i++) {
  284. err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
  285. enic->config.wq_desc_count,
  286. sizeof(struct wq_enet_desc));
  287. if (err)
  288. goto err_out_cleanup;
  289. }
  290. for (i = 0; i < enic->rq_count; i++) {
  291. err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
  292. enic->config.rq_desc_count,
  293. sizeof(struct rq_enet_desc));
  294. if (err)
  295. goto err_out_cleanup;
  296. }
  297. for (i = 0; i < enic->cq_count; i++) {
  298. if (i < enic->rq_count)
  299. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  300. enic->config.rq_desc_count,
  301. sizeof(struct cq_enet_rq_desc));
  302. else
  303. err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
  304. enic->config.wq_desc_count,
  305. sizeof(struct cq_enet_wq_desc));
  306. if (err)
  307. goto err_out_cleanup;
  308. }
  309. for (i = 0; i < enic->intr_count; i++) {
  310. err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
  311. if (err)
  312. goto err_out_cleanup;
  313. }
  314. /* Hook remaining resource
  315. */
  316. enic->legacy_pba = vnic_dev_get_res(enic->vdev,
  317. RES_TYPE_INTR_PBA_LEGACY, 0);
  318. if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
  319. dev_err(enic_get_dev(enic),
  320. "Failed to hook legacy pba resource\n");
  321. err = -ENODEV;
  322. goto err_out_cleanup;
  323. }
  324. return 0;
  325. err_out_cleanup:
  326. enic_free_vnic_resources(enic);
  327. return err;
  328. }