cphy.h 6.2 KB

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  1. /*****************************************************************************
  2. * *
  3. * File: cphy.h *
  4. * $Revision: 1.7 $ *
  5. * $Date: 2005/06/21 18:29:47 $ *
  6. * Description: *
  7. * part of the Chelsio 10Gb Ethernet Driver. *
  8. * *
  9. * This program is free software; you can redistribute it and/or modify *
  10. * it under the terms of the GNU General Public License, version 2, as *
  11. * published by the Free Software Foundation. *
  12. * *
  13. * You should have received a copy of the GNU General Public License along *
  14. * with this program; if not, see <http://www.gnu.org/licenses/>. *
  15. * *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
  17. * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
  18. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
  19. * *
  20. * http://www.chelsio.com *
  21. * *
  22. * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
  23. * All rights reserved. *
  24. * *
  25. * Maintainers: maintainers@chelsio.com *
  26. * *
  27. * Authors: Dimitrios Michailidis <dm@chelsio.com> *
  28. * Tina Yang <tainay@chelsio.com> *
  29. * Felix Marti <felix@chelsio.com> *
  30. * Scott Bardone <sbardone@chelsio.com> *
  31. * Kurt Ottaway <kottaway@chelsio.com> *
  32. * Frank DiMambro <frank@chelsio.com> *
  33. * *
  34. * History: *
  35. * *
  36. ****************************************************************************/
  37. #ifndef _CXGB_CPHY_H_
  38. #define _CXGB_CPHY_H_
  39. #include "common.h"
  40. struct mdio_ops {
  41. void (*init)(adapter_t *adapter, const struct board_info *bi);
  42. int (*read)(struct net_device *dev, int phy_addr, int mmd_addr,
  43. u16 reg_addr);
  44. int (*write)(struct net_device *dev, int phy_addr, int mmd_addr,
  45. u16 reg_addr, u16 val);
  46. unsigned mode_support;
  47. };
  48. /* PHY interrupt types */
  49. enum {
  50. cphy_cause_link_change = 0x1,
  51. cphy_cause_error = 0x2,
  52. cphy_cause_fifo_error = 0x3
  53. };
  54. enum {
  55. PHY_LINK_UP = 0x1,
  56. PHY_AUTONEG_RDY = 0x2,
  57. PHY_AUTONEG_EN = 0x4
  58. };
  59. struct cphy;
  60. /* PHY operations */
  61. struct cphy_ops {
  62. void (*destroy)(struct cphy *);
  63. int (*reset)(struct cphy *, int wait);
  64. int (*interrupt_enable)(struct cphy *);
  65. int (*interrupt_disable)(struct cphy *);
  66. int (*interrupt_clear)(struct cphy *);
  67. int (*interrupt_handler)(struct cphy *);
  68. int (*autoneg_enable)(struct cphy *);
  69. int (*autoneg_disable)(struct cphy *);
  70. int (*autoneg_restart)(struct cphy *);
  71. int (*advertise)(struct cphy *phy, unsigned int advertise_map);
  72. int (*set_loopback)(struct cphy *, int on);
  73. int (*set_speed_duplex)(struct cphy *phy, int speed, int duplex);
  74. int (*get_link_status)(struct cphy *phy, int *link_ok, int *speed,
  75. int *duplex, int *fc);
  76. u32 mmds;
  77. };
  78. /* A PHY instance */
  79. struct cphy {
  80. int state; /* Link status state machine */
  81. adapter_t *adapter; /* associated adapter */
  82. struct delayed_work phy_update;
  83. u16 bmsr;
  84. int count;
  85. int act_count;
  86. int act_on;
  87. u32 elmer_gpo;
  88. const struct cphy_ops *ops; /* PHY operations */
  89. struct mdio_if_info mdio;
  90. struct cphy_instance *instance;
  91. };
  92. /* Convenience MDIO read/write wrappers */
  93. static inline int cphy_mdio_read(struct cphy *cphy, int mmd, int reg,
  94. unsigned int *valp)
  95. {
  96. int rc = cphy->mdio.mdio_read(cphy->mdio.dev, cphy->mdio.prtad, mmd,
  97. reg);
  98. *valp = (rc >= 0) ? rc : -1;
  99. return (rc >= 0) ? 0 : rc;
  100. }
  101. static inline int cphy_mdio_write(struct cphy *cphy, int mmd, int reg,
  102. unsigned int val)
  103. {
  104. return cphy->mdio.mdio_write(cphy->mdio.dev, cphy->mdio.prtad, mmd,
  105. reg, val);
  106. }
  107. static inline int simple_mdio_read(struct cphy *cphy, int reg,
  108. unsigned int *valp)
  109. {
  110. return cphy_mdio_read(cphy, MDIO_DEVAD_NONE, reg, valp);
  111. }
  112. static inline int simple_mdio_write(struct cphy *cphy, int reg,
  113. unsigned int val)
  114. {
  115. return cphy_mdio_write(cphy, MDIO_DEVAD_NONE, reg, val);
  116. }
  117. /* Convenience initializer */
  118. static inline void cphy_init(struct cphy *phy, struct net_device *dev,
  119. int phy_addr, const struct cphy_ops *phy_ops,
  120. const struct mdio_ops *mdio_ops)
  121. {
  122. struct adapter *adapter = netdev_priv(dev);
  123. phy->adapter = adapter;
  124. phy->ops = phy_ops;
  125. if (mdio_ops) {
  126. phy->mdio.prtad = phy_addr;
  127. phy->mdio.mmds = phy_ops->mmds;
  128. phy->mdio.mode_support = mdio_ops->mode_support;
  129. phy->mdio.mdio_read = mdio_ops->read;
  130. phy->mdio.mdio_write = mdio_ops->write;
  131. }
  132. phy->mdio.dev = dev;
  133. }
  134. /* Operations of the PHY-instance factory */
  135. struct gphy {
  136. /* Construct a PHY instance with the given PHY address */
  137. struct cphy *(*create)(struct net_device *dev, int phy_addr,
  138. const struct mdio_ops *mdio_ops);
  139. /*
  140. * Reset the PHY chip. This resets the whole PHY chip, not individual
  141. * ports.
  142. */
  143. int (*reset)(adapter_t *adapter);
  144. };
  145. extern const struct gphy t1_my3126_ops;
  146. extern const struct gphy t1_mv88e1xxx_ops;
  147. extern const struct gphy t1_vsc8244_ops;
  148. extern const struct gphy t1_mv88x201x_ops;
  149. #endif /* _CXGB_CPHY_H_ */