ni65.c 30 KB

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  1. /*
  2. * ni6510 (am7990 'lance' chip) driver for Linux-net-3
  3. * BETAcode v0.71 (96/09/29) for 2.0.0 (or later)
  4. * copyrights (c) 1994,1995,1996 by M.Hipp
  5. *
  6. * This driver can handle the old ni6510 board and the newer ni6510
  7. * EtherBlaster. (probably it also works with every full NE2100
  8. * compatible card)
  9. *
  10. * driver probes: io: 0x360,0x300,0x320,0x340 / dma: 3,5,6,7
  11. *
  12. * This is an extension to the Linux operating system, and is covered by the
  13. * same GNU General Public License that covers the Linux-kernel.
  14. *
  15. * comments/bugs/suggestions can be sent to:
  16. * Michael Hipp
  17. * email: hippm@informatik.uni-tuebingen.de
  18. *
  19. * sources:
  20. * some things are from the 'ni6510-packet-driver for dos by Russ Nelson'
  21. * and from the original drivers by D.Becker
  22. *
  23. * known problems:
  24. * - on some PCI boards (including my own) the card/board/ISA-bridge has
  25. * problems with bus master DMA. This results in lotsa overruns.
  26. * It may help to '#define RCV_PARANOIA_CHECK' or try to #undef
  27. * the XMT and RCV_VIA_SKB option .. this reduces driver performance.
  28. * Or just play with your BIOS options to optimize ISA-DMA access.
  29. * Maybe you also wanna play with the LOW_PERFORAMCE and MID_PERFORMANCE
  30. * defines -> please report me your experience then
  31. * - Harald reported for ASUS SP3G mainboards, that you should use
  32. * the 'optimal settings' from the user's manual on page 3-12!
  33. *
  34. * credits:
  35. * thanx to Jason Sullivan for sending me a ni6510 card!
  36. * lot of debug runs with ASUS SP3G Boards (Intel Saturn) by Harald Koenig
  37. *
  38. * simple performance test: (486DX-33/Ni6510-EB receives from 486DX4-100/Ni6510-EB)
  39. * average: FTP -> 8384421 bytes received in 8.5 seconds
  40. * (no RCV_VIA_SKB,no XMT_VIA_SKB,PARANOIA_CHECK,4 XMIT BUFS, 8 RCV_BUFFS)
  41. * peak: FTP -> 8384421 bytes received in 7.5 seconds
  42. * (RCV_VIA_SKB,XMT_VIA_SKB,no PARANOIA_CHECK,1(!) XMIT BUF, 16 RCV BUFFS)
  43. */
  44. /*
  45. * 99.Jun.8: added support for /proc/net/dev byte count for xosview (HK)
  46. * 96.Sept.29: virt_to_bus stuff added for new memory modell
  47. * 96.April.29: Added Harald Koenig's Patches (MH)
  48. * 96.April.13: enhanced error handling .. more tests (MH)
  49. * 96.April.5/6: a lot of performance tests. Got it stable now (hopefully) (MH)
  50. * 96.April.1: (no joke ;) .. added EtherBlaster and Module support (MH)
  51. * 96.Feb.19: fixed a few bugs .. cleanups .. tested for 1.3.66 (MH)
  52. * hopefully no more 16MB limit
  53. *
  54. * 95.Nov.18: multicast tweaked (AC).
  55. *
  56. * 94.Aug.22: changes in xmit_intr (ack more than one xmitted-packet), ni65_send_packet (p->lock) (MH)
  57. *
  58. * 94.July.16: fixed bugs in recv_skb and skb-alloc stuff (MH)
  59. */
  60. #include <linux/kernel.h>
  61. #include <linux/string.h>
  62. #include <linux/errno.h>
  63. #include <linux/ioport.h>
  64. #include <linux/slab.h>
  65. #include <linux/interrupt.h>
  66. #include <linux/delay.h>
  67. #include <linux/init.h>
  68. #include <linux/netdevice.h>
  69. #include <linux/etherdevice.h>
  70. #include <linux/skbuff.h>
  71. #include <linux/module.h>
  72. #include <linux/bitops.h>
  73. #include <asm/io.h>
  74. #include <asm/dma.h>
  75. #include "ni65.h"
  76. /*
  77. * the current setting allows an acceptable performance
  78. * for 'RCV_PARANOIA_CHECK' read the 'known problems' part in
  79. * the header of this file
  80. * 'invert' the defines for max. performance. This may cause DMA problems
  81. * on some boards (e.g on my ASUS SP3G)
  82. */
  83. #undef XMT_VIA_SKB
  84. #undef RCV_VIA_SKB
  85. #define RCV_PARANOIA_CHECK
  86. #define MID_PERFORMANCE
  87. #if defined( LOW_PERFORMANCE )
  88. static int isa0=7,isa1=7,csr80=0x0c10;
  89. #elif defined( MID_PERFORMANCE )
  90. static int isa0=5,isa1=5,csr80=0x2810;
  91. #else /* high performance */
  92. static int isa0=4,isa1=4,csr80=0x0017;
  93. #endif
  94. /*
  95. * a few card/vendor specific defines
  96. */
  97. #define NI65_ID0 0x00
  98. #define NI65_ID1 0x55
  99. #define NI65_EB_ID0 0x52
  100. #define NI65_EB_ID1 0x44
  101. #define NE2100_ID0 0x57
  102. #define NE2100_ID1 0x57
  103. #define PORT p->cmdr_addr
  104. /*
  105. * buffer configuration
  106. */
  107. #if 1
  108. #define RMDNUM 16
  109. #define RMDNUMMASK 0x80000000
  110. #else
  111. #define RMDNUM 8
  112. #define RMDNUMMASK 0x60000000 /* log2(RMDNUM)<<29 */
  113. #endif
  114. #if 0
  115. #define TMDNUM 1
  116. #define TMDNUMMASK 0x00000000
  117. #else
  118. #define TMDNUM 4
  119. #define TMDNUMMASK 0x40000000 /* log2(TMDNUM)<<29 */
  120. #endif
  121. /* slightly oversized */
  122. #define R_BUF_SIZE 1544
  123. #define T_BUF_SIZE 1544
  124. /*
  125. * lance register defines
  126. */
  127. #define L_DATAREG 0x00
  128. #define L_ADDRREG 0x02
  129. #define L_RESET 0x04
  130. #define L_CONFIG 0x05
  131. #define L_BUSIF 0x06
  132. /*
  133. * to access the lance/am7990-regs, you have to write
  134. * reg-number into L_ADDRREG, then you can access it using L_DATAREG
  135. */
  136. #define CSR0 0x00
  137. #define CSR1 0x01
  138. #define CSR2 0x02
  139. #define CSR3 0x03
  140. #define INIT_RING_BEFORE_START 0x1
  141. #define FULL_RESET_ON_ERROR 0x2
  142. #if 0
  143. #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
  144. outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
  145. #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
  146. inw(PORT+L_DATAREG))
  147. #if 0
  148. #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
  149. #else
  150. #define writedatareg(val) { writereg(val,CSR0); }
  151. #endif
  152. #else
  153. #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
  154. #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
  155. #define writedatareg(val) { writereg(val,CSR0); }
  156. #endif
  157. static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };
  158. static struct card {
  159. unsigned char id0,id1;
  160. short id_offset;
  161. short total_size;
  162. short cmd_offset;
  163. short addr_offset;
  164. unsigned char *vendor_id;
  165. char *cardname;
  166. unsigned long config;
  167. } cards[] = {
  168. {
  169. .id0 = NI65_ID0,
  170. .id1 = NI65_ID1,
  171. .id_offset = 0x0e,
  172. .total_size = 0x10,
  173. .cmd_offset = 0x0,
  174. .addr_offset = 0x8,
  175. .vendor_id = ni_vendor,
  176. .cardname = "ni6510",
  177. .config = 0x1,
  178. },
  179. {
  180. .id0 = NI65_EB_ID0,
  181. .id1 = NI65_EB_ID1,
  182. .id_offset = 0x0e,
  183. .total_size = 0x18,
  184. .cmd_offset = 0x10,
  185. .addr_offset = 0x0,
  186. .vendor_id = ni_vendor,
  187. .cardname = "ni6510 EtherBlaster",
  188. .config = 0x2,
  189. },
  190. {
  191. .id0 = NE2100_ID0,
  192. .id1 = NE2100_ID1,
  193. .id_offset = 0x0e,
  194. .total_size = 0x18,
  195. .cmd_offset = 0x10,
  196. .addr_offset = 0x0,
  197. .vendor_id = NULL,
  198. .cardname = "generic NE2100",
  199. .config = 0x0,
  200. },
  201. };
  202. #define NUM_CARDS 3
  203. struct priv
  204. {
  205. struct rmd rmdhead[RMDNUM];
  206. struct tmd tmdhead[TMDNUM];
  207. struct init_block ib;
  208. int rmdnum;
  209. int tmdnum,tmdlast;
  210. #ifdef RCV_VIA_SKB
  211. struct sk_buff *recv_skb[RMDNUM];
  212. #else
  213. void *recvbounce[RMDNUM];
  214. #endif
  215. #ifdef XMT_VIA_SKB
  216. struct sk_buff *tmd_skb[TMDNUM];
  217. #endif
  218. void *tmdbounce[TMDNUM];
  219. int tmdbouncenum;
  220. int lock,xmit_queued;
  221. void *self;
  222. int cmdr_addr;
  223. int cardno;
  224. int features;
  225. spinlock_t ring_lock;
  226. };
  227. static int ni65_probe1(struct net_device *dev,int);
  228. static irqreturn_t ni65_interrupt(int irq, void * dev_id);
  229. static void ni65_recv_intr(struct net_device *dev,int);
  230. static void ni65_xmit_intr(struct net_device *dev,int);
  231. static int ni65_open(struct net_device *dev);
  232. static int ni65_lance_reinit(struct net_device *dev);
  233. static void ni65_init_lance(struct priv *p,unsigned char*,int,int);
  234. static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
  235. struct net_device *dev);
  236. static void ni65_timeout(struct net_device *dev);
  237. static int ni65_close(struct net_device *dev);
  238. static int ni65_alloc_buffer(struct net_device *dev);
  239. static void ni65_free_buffer(struct priv *p);
  240. static void set_multicast_list(struct net_device *dev);
  241. static int irqtab[] __initdata = { 9,12,15,5 }; /* irq config-translate */
  242. static int dmatab[] __initdata = { 0,3,5,6,7 }; /* dma config-translate and autodetect */
  243. static int debuglevel = 1;
  244. /*
  245. * set 'performance' registers .. we must STOP lance for that
  246. */
  247. static void ni65_set_performance(struct priv *p)
  248. {
  249. writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */
  250. if( !(cards[p->cardno].config & 0x02) )
  251. return;
  252. outw(80,PORT+L_ADDRREG);
  253. if(inw(PORT+L_ADDRREG) != 80)
  254. return;
  255. writereg( (csr80 & 0x3fff) ,80); /* FIFO watermarks */
  256. outw(0,PORT+L_ADDRREG);
  257. outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */
  258. outw(1,PORT+L_ADDRREG);
  259. outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns */
  260. outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */
  261. }
  262. /*
  263. * open interface (up)
  264. */
  265. static int ni65_open(struct net_device *dev)
  266. {
  267. struct priv *p = dev->ml_priv;
  268. int irqval = request_irq(dev->irq, ni65_interrupt,0,
  269. cards[p->cardno].cardname,dev);
  270. if (irqval) {
  271. printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",
  272. dev->name,dev->irq, irqval);
  273. return -EAGAIN;
  274. }
  275. if(ni65_lance_reinit(dev))
  276. {
  277. netif_start_queue(dev);
  278. return 0;
  279. }
  280. else
  281. {
  282. free_irq(dev->irq,dev);
  283. return -EAGAIN;
  284. }
  285. }
  286. /*
  287. * close interface (down)
  288. */
  289. static int ni65_close(struct net_device *dev)
  290. {
  291. struct priv *p = dev->ml_priv;
  292. netif_stop_queue(dev);
  293. outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */
  294. #ifdef XMT_VIA_SKB
  295. {
  296. int i;
  297. for(i=0;i<TMDNUM;i++)
  298. {
  299. if(p->tmd_skb[i]) {
  300. dev_kfree_skb(p->tmd_skb[i]);
  301. p->tmd_skb[i] = NULL;
  302. }
  303. }
  304. }
  305. #endif
  306. free_irq(dev->irq,dev);
  307. return 0;
  308. }
  309. static void cleanup_card(struct net_device *dev)
  310. {
  311. struct priv *p = dev->ml_priv;
  312. disable_dma(dev->dma);
  313. free_dma(dev->dma);
  314. release_region(dev->base_addr, cards[p->cardno].total_size);
  315. ni65_free_buffer(p);
  316. }
  317. /* set: io,irq,dma or set it when calling insmod */
  318. static int irq;
  319. static int io;
  320. static int dma;
  321. /*
  322. * Probe The Card (not the lance-chip)
  323. */
  324. struct net_device * __init ni65_probe(int unit)
  325. {
  326. struct net_device *dev = alloc_etherdev(0);
  327. static const int ports[] = { 0x360, 0x300, 0x320, 0x340, 0 };
  328. const int *port;
  329. int err = 0;
  330. if (!dev)
  331. return ERR_PTR(-ENOMEM);
  332. if (unit >= 0) {
  333. sprintf(dev->name, "eth%d", unit);
  334. netdev_boot_setup_check(dev);
  335. irq = dev->irq;
  336. dma = dev->dma;
  337. } else {
  338. dev->base_addr = io;
  339. }
  340. if (dev->base_addr > 0x1ff) { /* Check a single specified location. */
  341. err = ni65_probe1(dev, dev->base_addr);
  342. } else if (dev->base_addr > 0) { /* Don't probe at all. */
  343. err = -ENXIO;
  344. } else {
  345. for (port = ports; *port && ni65_probe1(dev, *port); port++)
  346. ;
  347. if (!*port)
  348. err = -ENODEV;
  349. }
  350. if (err)
  351. goto out;
  352. err = register_netdev(dev);
  353. if (err)
  354. goto out1;
  355. return dev;
  356. out1:
  357. cleanup_card(dev);
  358. out:
  359. free_netdev(dev);
  360. return ERR_PTR(err);
  361. }
  362. static const struct net_device_ops ni65_netdev_ops = {
  363. .ndo_open = ni65_open,
  364. .ndo_stop = ni65_close,
  365. .ndo_start_xmit = ni65_send_packet,
  366. .ndo_tx_timeout = ni65_timeout,
  367. .ndo_set_rx_mode = set_multicast_list,
  368. .ndo_change_mtu = eth_change_mtu,
  369. .ndo_set_mac_address = eth_mac_addr,
  370. .ndo_validate_addr = eth_validate_addr,
  371. };
  372. /*
  373. * this is the real card probe ..
  374. */
  375. static int __init ni65_probe1(struct net_device *dev,int ioaddr)
  376. {
  377. int i,j;
  378. struct priv *p;
  379. unsigned long flags;
  380. dev->irq = irq;
  381. dev->dma = dma;
  382. for(i=0;i<NUM_CARDS;i++) {
  383. if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))
  384. continue;
  385. if(cards[i].id_offset >= 0) {
  386. if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||
  387. inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {
  388. release_region(ioaddr, cards[i].total_size);
  389. continue;
  390. }
  391. }
  392. if(cards[i].vendor_id) {
  393. for(j=0;j<3;j++)
  394. if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j]) {
  395. release_region(ioaddr, cards[i].total_size);
  396. continue;
  397. }
  398. }
  399. break;
  400. }
  401. if(i == NUM_CARDS)
  402. return -ENODEV;
  403. for(j=0;j<6;j++)
  404. dev->dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);
  405. if( (j=ni65_alloc_buffer(dev)) < 0) {
  406. release_region(ioaddr, cards[i].total_size);
  407. return j;
  408. }
  409. p = dev->ml_priv;
  410. p->cmdr_addr = ioaddr + cards[i].cmd_offset;
  411. p->cardno = i;
  412. spin_lock_init(&p->ring_lock);
  413. printk(KERN_INFO "%s: %s found at %#3x, ", dev->name, cards[p->cardno].cardname , ioaddr);
  414. outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
  415. if( (j=readreg(CSR0)) != 0x4) {
  416. printk("failed.\n");
  417. printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev->name, j);
  418. ni65_free_buffer(p);
  419. release_region(ioaddr, cards[p->cardno].total_size);
  420. return -EAGAIN;
  421. }
  422. outw(88,PORT+L_ADDRREG);
  423. if(inw(PORT+L_ADDRREG) == 88) {
  424. unsigned long v;
  425. v = inw(PORT+L_DATAREG);
  426. v <<= 16;
  427. outw(89,PORT+L_ADDRREG);
  428. v |= inw(PORT+L_DATAREG);
  429. printk("Version %#08lx, ",v);
  430. p->features = INIT_RING_BEFORE_START;
  431. }
  432. else {
  433. printk("ancient LANCE, ");
  434. p->features = 0x0;
  435. }
  436. if(test_bit(0,&cards[i].config)) {
  437. dev->irq = irqtab[(inw(ioaddr+L_CONFIG)>>2)&3];
  438. dev->dma = dmatab[inw(ioaddr+L_CONFIG)&3];
  439. printk("IRQ %d (from card), DMA %d (from card).\n",dev->irq,dev->dma);
  440. }
  441. else {
  442. if(dev->dma == 0) {
  443. /* 'stuck test' from lance.c */
  444. unsigned long dma_channels =
  445. ((inb(DMA1_STAT_REG) >> 4) & 0x0f)
  446. | (inb(DMA2_STAT_REG) & 0xf0);
  447. for(i=1;i<5;i++) {
  448. int dma = dmatab[i];
  449. if(test_bit(dma,&dma_channels) || request_dma(dma,"ni6510"))
  450. continue;
  451. flags=claim_dma_lock();
  452. disable_dma(dma);
  453. set_dma_mode(dma,DMA_MODE_CASCADE);
  454. enable_dma(dma);
  455. release_dma_lock(flags);
  456. ni65_init_lance(p,dev->dev_addr,0,0); /* trigger memory access */
  457. flags=claim_dma_lock();
  458. disable_dma(dma);
  459. free_dma(dma);
  460. release_dma_lock(flags);
  461. if(readreg(CSR0) & CSR0_IDON)
  462. break;
  463. }
  464. if(i == 5) {
  465. printk("failed.\n");
  466. printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev->name);
  467. ni65_free_buffer(p);
  468. release_region(ioaddr, cards[p->cardno].total_size);
  469. return -EAGAIN;
  470. }
  471. dev->dma = dmatab[i];
  472. printk("DMA %d (autodetected), ",dev->dma);
  473. }
  474. else
  475. printk("DMA %d (assigned), ",dev->dma);
  476. if(dev->irq < 2)
  477. {
  478. unsigned long irq_mask;
  479. ni65_init_lance(p,dev->dev_addr,0,0);
  480. irq_mask = probe_irq_on();
  481. writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */
  482. msleep(20);
  483. dev->irq = probe_irq_off(irq_mask);
  484. if(!dev->irq)
  485. {
  486. printk("Failed to detect IRQ line!\n");
  487. ni65_free_buffer(p);
  488. release_region(ioaddr, cards[p->cardno].total_size);
  489. return -EAGAIN;
  490. }
  491. printk("IRQ %d (autodetected).\n",dev->irq);
  492. }
  493. else
  494. printk("IRQ %d (assigned).\n",dev->irq);
  495. }
  496. if(request_dma(dev->dma, cards[p->cardno].cardname ) != 0)
  497. {
  498. printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev->name,(int) dev->dma);
  499. ni65_free_buffer(p);
  500. release_region(ioaddr, cards[p->cardno].total_size);
  501. return -EAGAIN;
  502. }
  503. dev->base_addr = ioaddr;
  504. dev->netdev_ops = &ni65_netdev_ops;
  505. dev->watchdog_timeo = HZ/2;
  506. return 0; /* everything is OK */
  507. }
  508. /*
  509. * set lance register and trigger init
  510. */
  511. static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)
  512. {
  513. int i;
  514. u32 pib;
  515. writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
  516. for(i=0;i<6;i++)
  517. p->ib.eaddr[i] = daddr[i];
  518. for(i=0;i<8;i++)
  519. p->ib.filter[i] = filter;
  520. p->ib.mode = mode;
  521. p->ib.trp = (u32) isa_virt_to_bus(p->tmdhead) | TMDNUMMASK;
  522. p->ib.rrp = (u32) isa_virt_to_bus(p->rmdhead) | RMDNUMMASK;
  523. writereg(0,CSR3); /* busmaster/no word-swap */
  524. pib = (u32) isa_virt_to_bus(&p->ib);
  525. writereg(pib & 0xffff,CSR1);
  526. writereg(pib >> 16,CSR2);
  527. writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */
  528. for(i=0;i<32;i++)
  529. {
  530. mdelay(4);
  531. if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
  532. break; /* init ok ? */
  533. }
  534. }
  535. /*
  536. * allocate memory area and check the 16MB border
  537. */
  538. static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)
  539. {
  540. struct sk_buff *skb=NULL;
  541. unsigned char *ptr;
  542. void *ret;
  543. if(type) {
  544. ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);
  545. if(!skb) {
  546. printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
  547. return NULL;
  548. }
  549. skb_reserve(skb,2+16);
  550. skb_put(skb,R_BUF_SIZE); /* grab the whole space .. (not necessary) */
  551. ptr = skb->data;
  552. }
  553. else {
  554. ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);
  555. if(!ret)
  556. return NULL;
  557. }
  558. if( (u32) virt_to_phys(ptr+size) > 0x1000000) {
  559. printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev->name,what);
  560. if(type)
  561. kfree_skb(skb);
  562. else
  563. kfree(ptr);
  564. return NULL;
  565. }
  566. return ret;
  567. }
  568. /*
  569. * allocate all memory structures .. send/recv buffers etc ...
  570. */
  571. static int ni65_alloc_buffer(struct net_device *dev)
  572. {
  573. unsigned char *ptr;
  574. struct priv *p;
  575. int i;
  576. /*
  577. * we need 8-aligned memory ..
  578. */
  579. ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);
  580. if(!ptr)
  581. return -ENOMEM;
  582. p = dev->ml_priv = (struct priv *) (((unsigned long) ptr + 7) & ~0x7);
  583. memset((char *)p, 0, sizeof(struct priv));
  584. p->self = ptr;
  585. for(i=0;i<TMDNUM;i++)
  586. {
  587. #ifdef XMT_VIA_SKB
  588. p->tmd_skb[i] = NULL;
  589. #endif
  590. p->tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);
  591. if(!p->tmdbounce[i]) {
  592. ni65_free_buffer(p);
  593. return -ENOMEM;
  594. }
  595. }
  596. for(i=0;i<RMDNUM;i++)
  597. {
  598. #ifdef RCV_VIA_SKB
  599. p->recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);
  600. if(!p->recv_skb[i]) {
  601. ni65_free_buffer(p);
  602. return -ENOMEM;
  603. }
  604. #else
  605. p->recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);
  606. if(!p->recvbounce[i]) {
  607. ni65_free_buffer(p);
  608. return -ENOMEM;
  609. }
  610. #endif
  611. }
  612. return 0; /* everything is OK */
  613. }
  614. /*
  615. * free buffers and private struct
  616. */
  617. static void ni65_free_buffer(struct priv *p)
  618. {
  619. int i;
  620. if(!p)
  621. return;
  622. for(i=0;i<TMDNUM;i++) {
  623. kfree(p->tmdbounce[i]);
  624. #ifdef XMT_VIA_SKB
  625. if(p->tmd_skb[i])
  626. dev_kfree_skb(p->tmd_skb[i]);
  627. #endif
  628. }
  629. for(i=0;i<RMDNUM;i++)
  630. {
  631. #ifdef RCV_VIA_SKB
  632. if(p->recv_skb[i])
  633. dev_kfree_skb(p->recv_skb[i]);
  634. #else
  635. kfree(p->recvbounce[i]);
  636. #endif
  637. }
  638. kfree(p->self);
  639. }
  640. /*
  641. * stop and (re)start lance .. e.g after an error
  642. */
  643. static void ni65_stop_start(struct net_device *dev,struct priv *p)
  644. {
  645. int csr0 = CSR0_INEA;
  646. writedatareg(CSR0_STOP);
  647. if(debuglevel > 1)
  648. printk(KERN_DEBUG "ni65_stop_start\n");
  649. if(p->features & INIT_RING_BEFORE_START) {
  650. int i;
  651. #ifdef XMT_VIA_SKB
  652. struct sk_buff *skb_save[TMDNUM];
  653. #endif
  654. unsigned long buffer[TMDNUM];
  655. short blen[TMDNUM];
  656. if(p->xmit_queued) {
  657. while(1) {
  658. if((p->tmdhead[p->tmdlast].u.s.status & XMIT_OWN))
  659. break;
  660. p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
  661. if(p->tmdlast == p->tmdnum)
  662. break;
  663. }
  664. }
  665. for(i=0;i<TMDNUM;i++) {
  666. struct tmd *tmdp = p->tmdhead + i;
  667. #ifdef XMT_VIA_SKB
  668. skb_save[i] = p->tmd_skb[i];
  669. #endif
  670. buffer[i] = (u32) isa_bus_to_virt(tmdp->u.buffer);
  671. blen[i] = tmdp->blen;
  672. tmdp->u.s.status = 0x0;
  673. }
  674. for(i=0;i<RMDNUM;i++) {
  675. struct rmd *rmdp = p->rmdhead + i;
  676. rmdp->u.s.status = RCV_OWN;
  677. }
  678. p->tmdnum = p->xmit_queued = 0;
  679. writedatareg(CSR0_STRT | csr0);
  680. for(i=0;i<TMDNUM;i++) {
  681. int num = (i + p->tmdlast) & (TMDNUM-1);
  682. p->tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]); /* status is part of buffer field */
  683. p->tmdhead[i].blen = blen[num];
  684. if(p->tmdhead[i].u.s.status & XMIT_OWN) {
  685. p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
  686. p->xmit_queued = 1;
  687. writedatareg(CSR0_TDMD | CSR0_INEA | csr0);
  688. }
  689. #ifdef XMT_VIA_SKB
  690. p->tmd_skb[i] = skb_save[num];
  691. #endif
  692. }
  693. p->rmdnum = p->tmdlast = 0;
  694. if(!p->lock)
  695. if (p->tmdnum || !p->xmit_queued)
  696. netif_wake_queue(dev);
  697. netif_trans_update(dev); /* prevent tx timeout */
  698. }
  699. else
  700. writedatareg(CSR0_STRT | csr0);
  701. }
  702. /*
  703. * init lance (write init-values .. init-buffers) (open-helper)
  704. */
  705. static int ni65_lance_reinit(struct net_device *dev)
  706. {
  707. int i;
  708. struct priv *p = dev->ml_priv;
  709. unsigned long flags;
  710. p->lock = 0;
  711. p->xmit_queued = 0;
  712. flags=claim_dma_lock();
  713. disable_dma(dev->dma); /* I've never worked with dma, but we do it like the packetdriver */
  714. set_dma_mode(dev->dma,DMA_MODE_CASCADE);
  715. enable_dma(dev->dma);
  716. release_dma_lock(flags);
  717. outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
  718. if( (i=readreg(CSR0) ) != 0x4)
  719. {
  720. printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev->name,
  721. cards[p->cardno].cardname,(int) i);
  722. flags=claim_dma_lock();
  723. disable_dma(dev->dma);
  724. release_dma_lock(flags);
  725. return 0;
  726. }
  727. p->rmdnum = p->tmdnum = p->tmdlast = p->tmdbouncenum = 0;
  728. for(i=0;i<TMDNUM;i++)
  729. {
  730. struct tmd *tmdp = p->tmdhead + i;
  731. #ifdef XMT_VIA_SKB
  732. if(p->tmd_skb[i]) {
  733. dev_kfree_skb(p->tmd_skb[i]);
  734. p->tmd_skb[i] = NULL;
  735. }
  736. #endif
  737. tmdp->u.buffer = 0x0;
  738. tmdp->u.s.status = XMIT_START | XMIT_END;
  739. tmdp->blen = tmdp->status2 = 0;
  740. }
  741. for(i=0;i<RMDNUM;i++)
  742. {
  743. struct rmd *rmdp = p->rmdhead + i;
  744. #ifdef RCV_VIA_SKB
  745. rmdp->u.buffer = (u32) isa_virt_to_bus(p->recv_skb[i]->data);
  746. #else
  747. rmdp->u.buffer = (u32) isa_virt_to_bus(p->recvbounce[i]);
  748. #endif
  749. rmdp->blen = -(R_BUF_SIZE-8);
  750. rmdp->mlen = 0;
  751. rmdp->u.s.status = RCV_OWN;
  752. }
  753. if(dev->flags & IFF_PROMISC)
  754. ni65_init_lance(p,dev->dev_addr,0x00,M_PROM);
  755. else if (netdev_mc_count(dev) || dev->flags & IFF_ALLMULTI)
  756. ni65_init_lance(p,dev->dev_addr,0xff,0x0);
  757. else
  758. ni65_init_lance(p,dev->dev_addr,0x00,0x00);
  759. /*
  760. * ni65_set_lance_mem() sets L_ADDRREG to CSR0
  761. * NOW, WE WILL NEVER CHANGE THE L_ADDRREG, CSR0 IS ALWAYS SELECTED
  762. */
  763. if(inw(PORT+L_DATAREG) & CSR0_IDON) {
  764. ni65_set_performance(p);
  765. /* init OK: start lance , enable interrupts */
  766. writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
  767. return 1; /* ->OK */
  768. }
  769. printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
  770. flags=claim_dma_lock();
  771. disable_dma(dev->dma);
  772. release_dma_lock(flags);
  773. return 0; /* ->Error */
  774. }
  775. /*
  776. * interrupt handler
  777. */
  778. static irqreturn_t ni65_interrupt(int irq, void * dev_id)
  779. {
  780. int csr0 = 0;
  781. struct net_device *dev = dev_id;
  782. struct priv *p;
  783. int bcnt = 32;
  784. p = dev->ml_priv;
  785. spin_lock(&p->ring_lock);
  786. while(--bcnt) {
  787. csr0 = inw(PORT+L_DATAREG);
  788. #if 0
  789. writedatareg( (csr0 & CSR0_CLRALL) ); /* ack interrupts, disable int. */
  790. #else
  791. writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA ); /* ack interrupts, interrupts enabled */
  792. #endif
  793. if(!(csr0 & (CSR0_ERR | CSR0_RINT | CSR0_TINT)))
  794. break;
  795. if(csr0 & CSR0_RINT) /* RECV-int? */
  796. ni65_recv_intr(dev,csr0);
  797. if(csr0 & CSR0_TINT) /* XMIT-int? */
  798. ni65_xmit_intr(dev,csr0);
  799. if(csr0 & CSR0_ERR)
  800. {
  801. if(debuglevel > 1)
  802. printk(KERN_ERR "%s: general error: %04x.\n",dev->name,csr0);
  803. if(csr0 & CSR0_BABL)
  804. dev->stats.tx_errors++;
  805. if(csr0 & CSR0_MISS) {
  806. int i;
  807. for(i=0;i<RMDNUM;i++)
  808. printk("%02x ",p->rmdhead[i].u.s.status);
  809. printk("\n");
  810. dev->stats.rx_errors++;
  811. }
  812. if(csr0 & CSR0_MERR) {
  813. if(debuglevel > 1)
  814. printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev->name,csr0);
  815. ni65_stop_start(dev,p);
  816. }
  817. }
  818. }
  819. #ifdef RCV_PARANOIA_CHECK
  820. {
  821. int j;
  822. for(j=0;j<RMDNUM;j++)
  823. {
  824. int i, num2;
  825. for(i=RMDNUM-1;i>0;i--) {
  826. num2 = (p->rmdnum + i) & (RMDNUM-1);
  827. if(!(p->rmdhead[num2].u.s.status & RCV_OWN))
  828. break;
  829. }
  830. if(i) {
  831. int k, num1;
  832. for(k=0;k<RMDNUM;k++) {
  833. num1 = (p->rmdnum + k) & (RMDNUM-1);
  834. if(!(p->rmdhead[num1].u.s.status & RCV_OWN))
  835. break;
  836. }
  837. if(!k)
  838. break;
  839. if(debuglevel > 0)
  840. {
  841. char buf[256],*buf1;
  842. buf1 = buf;
  843. for(k=0;k<RMDNUM;k++) {
  844. sprintf(buf1,"%02x ",(p->rmdhead[k].u.s.status)); /* & RCV_OWN) ); */
  845. buf1 += 3;
  846. }
  847. *buf1 = 0;
  848. printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev->name,p->rmdnum,i,buf);
  849. }
  850. p->rmdnum = num1;
  851. ni65_recv_intr(dev,csr0);
  852. if((p->rmdhead[num2].u.s.status & RCV_OWN))
  853. break; /* ok, we are 'in sync' again */
  854. }
  855. else
  856. break;
  857. }
  858. }
  859. #endif
  860. if( (csr0 & (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {
  861. printk(KERN_DEBUG "%s: RX or TX was offline -> restart\n",dev->name);
  862. ni65_stop_start(dev,p);
  863. }
  864. else
  865. writedatareg(CSR0_INEA);
  866. spin_unlock(&p->ring_lock);
  867. return IRQ_HANDLED;
  868. }
  869. /*
  870. * We have received an Xmit-Interrupt ..
  871. * send a new packet if necessary
  872. */
  873. static void ni65_xmit_intr(struct net_device *dev,int csr0)
  874. {
  875. struct priv *p = dev->ml_priv;
  876. while(p->xmit_queued)
  877. {
  878. struct tmd *tmdp = p->tmdhead + p->tmdlast;
  879. int tmdstat = tmdp->u.s.status;
  880. if(tmdstat & XMIT_OWN)
  881. break;
  882. if(tmdstat & XMIT_ERR)
  883. {
  884. #if 0
  885. if(tmdp->status2 & XMIT_TDRMASK && debuglevel > 3)
  886. printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev->name);
  887. #endif
  888. /* checking some errors */
  889. if(tmdp->status2 & XMIT_RTRY)
  890. dev->stats.tx_aborted_errors++;
  891. if(tmdp->status2 & XMIT_LCAR)
  892. dev->stats.tx_carrier_errors++;
  893. if(tmdp->status2 & (XMIT_BUFF | XMIT_UFLO )) {
  894. /* this stops the xmitter */
  895. dev->stats.tx_fifo_errors++;
  896. if(debuglevel > 0)
  897. printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev->name);
  898. if(p->features & INIT_RING_BEFORE_START) {
  899. tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END; /* test: resend this frame */
  900. ni65_stop_start(dev,p);
  901. break; /* no more Xmit processing .. */
  902. }
  903. else
  904. ni65_stop_start(dev,p);
  905. }
  906. if(debuglevel > 2)
  907. printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev->name,csr0,(int) tmdstat,(int) tmdp->status2);
  908. if(!(csr0 & CSR0_BABL)) /* don't count errors twice */
  909. dev->stats.tx_errors++;
  910. tmdp->status2 = 0;
  911. }
  912. else {
  913. dev->stats.tx_bytes -= (short)(tmdp->blen);
  914. dev->stats.tx_packets++;
  915. }
  916. #ifdef XMT_VIA_SKB
  917. if(p->tmd_skb[p->tmdlast]) {
  918. dev_kfree_skb_irq(p->tmd_skb[p->tmdlast]);
  919. p->tmd_skb[p->tmdlast] = NULL;
  920. }
  921. #endif
  922. p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
  923. if(p->tmdlast == p->tmdnum)
  924. p->xmit_queued = 0;
  925. }
  926. netif_wake_queue(dev);
  927. }
  928. /*
  929. * We have received a packet
  930. */
  931. static void ni65_recv_intr(struct net_device *dev,int csr0)
  932. {
  933. struct rmd *rmdp;
  934. int rmdstat,len;
  935. int cnt=0;
  936. struct priv *p = dev->ml_priv;
  937. rmdp = p->rmdhead + p->rmdnum;
  938. while(!( (rmdstat = rmdp->u.s.status) & RCV_OWN))
  939. {
  940. cnt++;
  941. if( (rmdstat & (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) ) /* error or oversized? */
  942. {
  943. if(!(rmdstat & RCV_ERR)) {
  944. if(rmdstat & RCV_START)
  945. {
  946. dev->stats.rx_length_errors++;
  947. printk(KERN_ERR "%s: recv, packet too long: %d\n",dev->name,rmdp->mlen & 0x0fff);
  948. }
  949. }
  950. else {
  951. if(debuglevel > 2)
  952. printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",
  953. dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );
  954. if(rmdstat & RCV_FRAM)
  955. dev->stats.rx_frame_errors++;
  956. if(rmdstat & RCV_OFLO)
  957. dev->stats.rx_over_errors++;
  958. if(rmdstat & RCV_CRC)
  959. dev->stats.rx_crc_errors++;
  960. if(rmdstat & RCV_BUF_ERR)
  961. dev->stats.rx_fifo_errors++;
  962. }
  963. if(!(csr0 & CSR0_MISS)) /* don't count errors twice */
  964. dev->stats.rx_errors++;
  965. }
  966. else if( (len = (rmdp->mlen & 0x0fff) - 4) >= 60)
  967. {
  968. #ifdef RCV_VIA_SKB
  969. struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);
  970. if (skb)
  971. skb_reserve(skb,16);
  972. #else
  973. struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
  974. #endif
  975. if(skb)
  976. {
  977. skb_reserve(skb,2);
  978. #ifdef RCV_VIA_SKB
  979. if( (unsigned long) (skb->data + R_BUF_SIZE) > 0x1000000) {
  980. skb_put(skb,len);
  981. skb_copy_to_linear_data(skb, (unsigned char *)(p->recv_skb[p->rmdnum]->data),len);
  982. }
  983. else {
  984. struct sk_buff *skb1 = p->recv_skb[p->rmdnum];
  985. skb_put(skb,R_BUF_SIZE);
  986. p->recv_skb[p->rmdnum] = skb;
  987. rmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
  988. skb = skb1;
  989. skb_trim(skb,len);
  990. }
  991. #else
  992. skb_put(skb,len);
  993. skb_copy_to_linear_data(skb, (unsigned char *) p->recvbounce[p->rmdnum],len);
  994. #endif
  995. dev->stats.rx_packets++;
  996. dev->stats.rx_bytes += len;
  997. skb->protocol=eth_type_trans(skb,dev);
  998. netif_rx(skb);
  999. }
  1000. else
  1001. {
  1002. printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev->name);
  1003. dev->stats.rx_dropped++;
  1004. }
  1005. }
  1006. else {
  1007. printk(KERN_INFO "%s: received runt packet\n",dev->name);
  1008. dev->stats.rx_errors++;
  1009. }
  1010. rmdp->blen = -(R_BUF_SIZE-8);
  1011. rmdp->mlen = 0;
  1012. rmdp->u.s.status = RCV_OWN; /* change owner */
  1013. p->rmdnum = (p->rmdnum + 1) & (RMDNUM-1);
  1014. rmdp = p->rmdhead + p->rmdnum;
  1015. }
  1016. }
  1017. /*
  1018. * kick xmitter ..
  1019. */
  1020. static void ni65_timeout(struct net_device *dev)
  1021. {
  1022. int i;
  1023. struct priv *p = dev->ml_priv;
  1024. printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev->name);
  1025. for(i=0;i<TMDNUM;i++)
  1026. printk("%02x ",p->tmdhead[i].u.s.status);
  1027. printk("\n");
  1028. ni65_lance_reinit(dev);
  1029. netif_trans_update(dev); /* prevent tx timeout */
  1030. netif_wake_queue(dev);
  1031. }
  1032. /*
  1033. * Send a packet
  1034. */
  1035. static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
  1036. struct net_device *dev)
  1037. {
  1038. struct priv *p = dev->ml_priv;
  1039. netif_stop_queue(dev);
  1040. if (test_and_set_bit(0, (void*)&p->lock)) {
  1041. printk(KERN_ERR "%s: Queue was locked.\n", dev->name);
  1042. return NETDEV_TX_BUSY;
  1043. }
  1044. {
  1045. short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
  1046. struct tmd *tmdp;
  1047. unsigned long flags;
  1048. #ifdef XMT_VIA_SKB
  1049. if( (unsigned long) (skb->data + skb->len) > 0x1000000) {
  1050. #endif
  1051. skb_copy_from_linear_data(skb, p->tmdbounce[p->tmdbouncenum],
  1052. skb->len > T_BUF_SIZE ? T_BUF_SIZE :
  1053. skb->len);
  1054. if (len > skb->len)
  1055. memset((char *)p->tmdbounce[p->tmdbouncenum]+skb->len, 0, len-skb->len);
  1056. dev_kfree_skb (skb);
  1057. spin_lock_irqsave(&p->ring_lock, flags);
  1058. tmdp = p->tmdhead + p->tmdnum;
  1059. tmdp->u.buffer = (u32) isa_virt_to_bus(p->tmdbounce[p->tmdbouncenum]);
  1060. p->tmdbouncenum = (p->tmdbouncenum + 1) & (TMDNUM - 1);
  1061. #ifdef XMT_VIA_SKB
  1062. }
  1063. else {
  1064. spin_lock_irqsave(&p->ring_lock, flags);
  1065. tmdp = p->tmdhead + p->tmdnum;
  1066. tmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
  1067. p->tmd_skb[p->tmdnum] = skb;
  1068. }
  1069. #endif
  1070. tmdp->blen = -len;
  1071. tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
  1072. writedatareg(CSR0_TDMD | CSR0_INEA); /* enable xmit & interrupt */
  1073. p->xmit_queued = 1;
  1074. p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
  1075. if(p->tmdnum != p->tmdlast)
  1076. netif_wake_queue(dev);
  1077. p->lock = 0;
  1078. spin_unlock_irqrestore(&p->ring_lock, flags);
  1079. }
  1080. return NETDEV_TX_OK;
  1081. }
  1082. static void set_multicast_list(struct net_device *dev)
  1083. {
  1084. if(!ni65_lance_reinit(dev))
  1085. printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name);
  1086. netif_wake_queue(dev);
  1087. }
  1088. #ifdef MODULE
  1089. static struct net_device *dev_ni65;
  1090. module_param(irq, int, 0);
  1091. module_param(io, int, 0);
  1092. module_param(dma, int, 0);
  1093. MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");
  1094. MODULE_PARM_DESC(io, "ni6510 I/O base address");
  1095. MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");
  1096. int __init init_module(void)
  1097. {
  1098. dev_ni65 = ni65_probe(-1);
  1099. return PTR_ERR_OR_ZERO(dev_ni65);
  1100. }
  1101. void __exit cleanup_module(void)
  1102. {
  1103. unregister_netdev(dev_ni65);
  1104. cleanup_card(dev_ni65);
  1105. free_netdev(dev_ni65);
  1106. }
  1107. #endif /* MODULE */
  1108. MODULE_LICENSE("GPL");