wm8994-irq.c 6.0 KB

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  1. /*
  2. * wm8994-irq.c -- Interrupt controller support for Wolfson WM8994
  3. *
  4. * Copyright 2010 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/gpio.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/mfd/core.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/irqdomain.h>
  22. #include <linux/regmap.h>
  23. #include <linux/mfd/wm8994/core.h>
  24. #include <linux/mfd/wm8994/pdata.h>
  25. #include <linux/mfd/wm8994/registers.h>
  26. #include <linux/delay.h>
  27. static const struct regmap_irq wm8994_irqs[] = {
  28. [WM8994_IRQ_TEMP_SHUT] = {
  29. .reg_offset = 1,
  30. .mask = WM8994_TEMP_SHUT_EINT,
  31. },
  32. [WM8994_IRQ_MIC1_DET] = {
  33. .reg_offset = 1,
  34. .mask = WM8994_MIC1_DET_EINT,
  35. },
  36. [WM8994_IRQ_MIC1_SHRT] = {
  37. .reg_offset = 1,
  38. .mask = WM8994_MIC1_SHRT_EINT,
  39. },
  40. [WM8994_IRQ_MIC2_DET] = {
  41. .reg_offset = 1,
  42. .mask = WM8994_MIC2_DET_EINT,
  43. },
  44. [WM8994_IRQ_MIC2_SHRT] = {
  45. .reg_offset = 1,
  46. .mask = WM8994_MIC2_SHRT_EINT,
  47. },
  48. [WM8994_IRQ_FLL1_LOCK] = {
  49. .reg_offset = 1,
  50. .mask = WM8994_FLL1_LOCK_EINT,
  51. },
  52. [WM8994_IRQ_FLL2_LOCK] = {
  53. .reg_offset = 1,
  54. .mask = WM8994_FLL2_LOCK_EINT,
  55. },
  56. [WM8994_IRQ_SRC1_LOCK] = {
  57. .reg_offset = 1,
  58. .mask = WM8994_SRC1_LOCK_EINT,
  59. },
  60. [WM8994_IRQ_SRC2_LOCK] = {
  61. .reg_offset = 1,
  62. .mask = WM8994_SRC2_LOCK_EINT,
  63. },
  64. [WM8994_IRQ_AIF1DRC1_SIG_DET] = {
  65. .reg_offset = 1,
  66. .mask = WM8994_AIF1DRC1_SIG_DET,
  67. },
  68. [WM8994_IRQ_AIF1DRC2_SIG_DET] = {
  69. .reg_offset = 1,
  70. .mask = WM8994_AIF1DRC2_SIG_DET_EINT,
  71. },
  72. [WM8994_IRQ_AIF2DRC_SIG_DET] = {
  73. .reg_offset = 1,
  74. .mask = WM8994_AIF2DRC_SIG_DET_EINT,
  75. },
  76. [WM8994_IRQ_FIFOS_ERR] = {
  77. .reg_offset = 1,
  78. .mask = WM8994_FIFOS_ERR_EINT,
  79. },
  80. [WM8994_IRQ_WSEQ_DONE] = {
  81. .reg_offset = 1,
  82. .mask = WM8994_WSEQ_DONE_EINT,
  83. },
  84. [WM8994_IRQ_DCS_DONE] = {
  85. .reg_offset = 1,
  86. .mask = WM8994_DCS_DONE_EINT,
  87. },
  88. [WM8994_IRQ_TEMP_WARN] = {
  89. .reg_offset = 1,
  90. .mask = WM8994_TEMP_WARN_EINT,
  91. },
  92. [WM8994_IRQ_GPIO(1)] = {
  93. .mask = WM8994_GP1_EINT,
  94. },
  95. [WM8994_IRQ_GPIO(2)] = {
  96. .mask = WM8994_GP2_EINT,
  97. },
  98. [WM8994_IRQ_GPIO(3)] = {
  99. .mask = WM8994_GP3_EINT,
  100. },
  101. [WM8994_IRQ_GPIO(4)] = {
  102. .mask = WM8994_GP4_EINT,
  103. },
  104. [WM8994_IRQ_GPIO(5)] = {
  105. .mask = WM8994_GP5_EINT,
  106. },
  107. [WM8994_IRQ_GPIO(6)] = {
  108. .mask = WM8994_GP6_EINT,
  109. },
  110. [WM8994_IRQ_GPIO(7)] = {
  111. .mask = WM8994_GP7_EINT,
  112. },
  113. [WM8994_IRQ_GPIO(8)] = {
  114. .mask = WM8994_GP8_EINT,
  115. },
  116. [WM8994_IRQ_GPIO(9)] = {
  117. .mask = WM8994_GP8_EINT,
  118. },
  119. [WM8994_IRQ_GPIO(10)] = {
  120. .mask = WM8994_GP10_EINT,
  121. },
  122. [WM8994_IRQ_GPIO(11)] = {
  123. .mask = WM8994_GP11_EINT,
  124. },
  125. };
  126. static const struct regmap_irq_chip wm8994_irq_chip = {
  127. .name = "wm8994",
  128. .irqs = wm8994_irqs,
  129. .num_irqs = ARRAY_SIZE(wm8994_irqs),
  130. .num_regs = 2,
  131. .status_base = WM8994_INTERRUPT_STATUS_1,
  132. .mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
  133. .ack_base = WM8994_INTERRUPT_STATUS_1,
  134. .runtime_pm = true,
  135. };
  136. static void wm8994_edge_irq_enable(struct irq_data *data)
  137. {
  138. }
  139. static void wm8994_edge_irq_disable(struct irq_data *data)
  140. {
  141. }
  142. static struct irq_chip wm8994_edge_irq_chip = {
  143. .name = "wm8994_edge",
  144. .irq_disable = wm8994_edge_irq_disable,
  145. .irq_enable = wm8994_edge_irq_enable,
  146. };
  147. static irqreturn_t wm8994_edge_irq(int irq, void *data)
  148. {
  149. struct wm8994 *wm8994 = data;
  150. while (gpio_get_value_cansleep(wm8994->pdata.irq_gpio))
  151. handle_nested_irq(irq_create_mapping(wm8994->edge_irq, 0));
  152. return IRQ_HANDLED;
  153. }
  154. static int wm8994_edge_irq_map(struct irq_domain *h, unsigned int virq,
  155. irq_hw_number_t hw)
  156. {
  157. struct wm8994 *wm8994 = h->host_data;
  158. irq_set_chip_data(virq, wm8994);
  159. irq_set_chip_and_handler(virq, &wm8994_edge_irq_chip, handle_edge_irq);
  160. irq_set_nested_thread(virq, 1);
  161. irq_set_noprobe(virq);
  162. return 0;
  163. }
  164. static const struct irq_domain_ops wm8994_edge_irq_ops = {
  165. .map = wm8994_edge_irq_map,
  166. .xlate = irq_domain_xlate_twocell,
  167. };
  168. int wm8994_irq_init(struct wm8994 *wm8994)
  169. {
  170. int ret;
  171. unsigned long irqflags;
  172. struct wm8994_pdata *pdata = &wm8994->pdata;
  173. if (!wm8994->irq) {
  174. dev_warn(wm8994->dev,
  175. "No interrupt specified, no interrupts\n");
  176. wm8994->irq_base = 0;
  177. return 0;
  178. }
  179. /* select user or default irq flags */
  180. irqflags = IRQF_TRIGGER_HIGH | IRQF_ONESHOT;
  181. if (pdata->irq_flags)
  182. irqflags = pdata->irq_flags;
  183. /* use a GPIO for edge triggered controllers */
  184. if (irqflags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
  185. if (gpio_to_irq(pdata->irq_gpio) != wm8994->irq) {
  186. dev_warn(wm8994->dev, "IRQ %d is not GPIO %d (%d)\n",
  187. wm8994->irq, pdata->irq_gpio,
  188. gpio_to_irq(pdata->irq_gpio));
  189. wm8994->irq = gpio_to_irq(pdata->irq_gpio);
  190. }
  191. ret = devm_gpio_request_one(wm8994->dev, pdata->irq_gpio,
  192. GPIOF_IN, "WM8994 IRQ");
  193. if (ret != 0) {
  194. dev_err(wm8994->dev, "Failed to get IRQ GPIO: %d\n",
  195. ret);
  196. return ret;
  197. }
  198. wm8994->edge_irq = irq_domain_add_linear(NULL, 1,
  199. &wm8994_edge_irq_ops,
  200. wm8994);
  201. ret = regmap_add_irq_chip(wm8994->regmap,
  202. irq_create_mapping(wm8994->edge_irq,
  203. 0),
  204. IRQF_ONESHOT,
  205. wm8994->irq_base, &wm8994_irq_chip,
  206. &wm8994->irq_data);
  207. if (ret != 0) {
  208. dev_err(wm8994->dev, "Failed to get IRQ: %d\n",
  209. ret);
  210. return ret;
  211. }
  212. ret = request_threaded_irq(wm8994->irq,
  213. NULL, wm8994_edge_irq,
  214. irqflags,
  215. "WM8994 edge", wm8994);
  216. } else {
  217. ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
  218. irqflags,
  219. wm8994->irq_base, &wm8994_irq_chip,
  220. &wm8994->irq_data);
  221. }
  222. if (ret != 0) {
  223. dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
  224. return ret;
  225. }
  226. /* Enable top level interrupt if it was masked */
  227. wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
  228. return 0;
  229. }
  230. EXPORT_SYMBOL(wm8994_irq_init);
  231. void wm8994_irq_exit(struct wm8994 *wm8994)
  232. {
  233. regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
  234. }
  235. EXPORT_SYMBOL(wm8994_irq_exit);