twl-core.c 32 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269
  1. /*
  2. * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
  3. * and audio CODEC devices
  4. *
  5. * Copyright (C) 2005-2006 Texas Instruments, Inc.
  6. *
  7. * Modifications to defer interrupt handling to a kernel thread:
  8. * Copyright (C) 2006 MontaVista Software, Inc.
  9. *
  10. * Based on tlv320aic23.c:
  11. * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
  12. *
  13. * Code cleanup and modifications to IRQ handler.
  14. * by syed khasim <x0khasim@ti.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  29. */
  30. #include <linux/init.h>
  31. #include <linux/mutex.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/regmap.h>
  34. #include <linux/clk.h>
  35. #include <linux/err.h>
  36. #include <linux/device.h>
  37. #include <linux/of.h>
  38. #include <linux/of_irq.h>
  39. #include <linux/of_platform.h>
  40. #include <linux/irq.h>
  41. #include <linux/irqdomain.h>
  42. #include <linux/regulator/machine.h>
  43. #include <linux/i2c.h>
  44. #include <linux/i2c/twl.h>
  45. /* Register descriptions for audio */
  46. #include <linux/mfd/twl4030-audio.h>
  47. #include "twl-core.h"
  48. /*
  49. * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
  50. * Management and System Companion Device" chips originally designed for
  51. * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
  52. * often at around 3 Mbit/sec, including for interrupt handling.
  53. *
  54. * This driver core provides genirq support for the interrupts emitted,
  55. * by the various modules, and exports register access primitives.
  56. *
  57. * FIXME this driver currently requires use of the first interrupt line
  58. * (and associated registers).
  59. */
  60. #define DRIVER_NAME "twl"
  61. /* Triton Core internal information (BEGIN) */
  62. /* Base Address defns for twl4030_map[] */
  63. /* subchip/slave 0 - USB ID */
  64. #define TWL4030_BASEADD_USB 0x0000
  65. /* subchip/slave 1 - AUD ID */
  66. #define TWL4030_BASEADD_AUDIO_VOICE 0x0000
  67. #define TWL4030_BASEADD_GPIO 0x0098
  68. #define TWL4030_BASEADD_INTBR 0x0085
  69. #define TWL4030_BASEADD_PIH 0x0080
  70. #define TWL4030_BASEADD_TEST 0x004C
  71. /* subchip/slave 2 - AUX ID */
  72. #define TWL4030_BASEADD_INTERRUPTS 0x00B9
  73. #define TWL4030_BASEADD_LED 0x00EE
  74. #define TWL4030_BASEADD_MADC 0x0000
  75. #define TWL4030_BASEADD_MAIN_CHARGE 0x0074
  76. #define TWL4030_BASEADD_PRECHARGE 0x00AA
  77. #define TWL4030_BASEADD_PWM 0x00F8
  78. #define TWL4030_BASEADD_KEYPAD 0x00D2
  79. #define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
  80. #define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
  81. one */
  82. /* subchip/slave 3 - POWER ID */
  83. #define TWL4030_BASEADD_BACKUP 0x0014
  84. #define TWL4030_BASEADD_INT 0x002E
  85. #define TWL4030_BASEADD_PM_MASTER 0x0036
  86. #define TWL4030_BASEADD_PM_RECEIVER 0x005B
  87. #define TWL4030_DCDC_GLOBAL_CFG 0x06
  88. #define SMARTREFLEX_ENABLE BIT(3)
  89. #define TWL4030_BASEADD_RTC 0x001C
  90. #define TWL4030_BASEADD_SECURED_REG 0x0000
  91. /* Triton Core internal information (END) */
  92. /* subchip/slave 0 0x48 - POWER */
  93. #define TWL6030_BASEADD_RTC 0x0000
  94. #define TWL6030_BASEADD_SECURED_REG 0x0017
  95. #define TWL6030_BASEADD_PM_MASTER 0x001F
  96. #define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
  97. #define TWL6030_BASEADD_PM_MISC 0x00E2
  98. #define TWL6030_BASEADD_PM_PUPD 0x00F0
  99. /* subchip/slave 1 0x49 - FEATURE */
  100. #define TWL6030_BASEADD_USB 0x0000
  101. #define TWL6030_BASEADD_GPADC_CTRL 0x002E
  102. #define TWL6030_BASEADD_AUX 0x0090
  103. #define TWL6030_BASEADD_PWM 0x00BA
  104. #define TWL6030_BASEADD_GASGAUGE 0x00C0
  105. #define TWL6030_BASEADD_PIH 0x00D0
  106. #define TWL6030_BASEADD_CHARGER 0x00E0
  107. #define TWL6032_BASEADD_CHARGER 0x00DA
  108. #define TWL6030_BASEADD_LED 0x00F4
  109. /* subchip/slave 2 0x4A - DFT */
  110. #define TWL6030_BASEADD_DIEID 0x00C0
  111. /* subchip/slave 3 0x4B - AUDIO */
  112. #define TWL6030_BASEADD_AUDIO 0x0000
  113. #define TWL6030_BASEADD_RSV 0x0000
  114. #define TWL6030_BASEADD_ZERO 0x0000
  115. /* Few power values */
  116. #define R_CFG_BOOT 0x05
  117. /* some fields in R_CFG_BOOT */
  118. #define HFCLK_FREQ_19p2_MHZ (1 << 0)
  119. #define HFCLK_FREQ_26_MHZ (2 << 0)
  120. #define HFCLK_FREQ_38p4_MHZ (3 << 0)
  121. #define HIGH_PERF_SQ (1 << 3)
  122. #define CK32K_LOWPWR_EN (1 << 7)
  123. /*----------------------------------------------------------------------*/
  124. /* Structure for each TWL4030/TWL6030 Slave */
  125. struct twl_client {
  126. struct i2c_client *client;
  127. struct regmap *regmap;
  128. };
  129. /* mapping the module id to slave id and base address */
  130. struct twl_mapping {
  131. unsigned char sid; /* Slave ID */
  132. unsigned char base; /* base address */
  133. };
  134. struct twl_private {
  135. bool ready; /* The core driver is ready to be used */
  136. u32 twl_idcode; /* TWL IDCODE Register value */
  137. unsigned int twl_id;
  138. struct twl_mapping *twl_map;
  139. struct twl_client *twl_modules;
  140. };
  141. static struct twl_private *twl_priv;
  142. static struct twl_mapping twl4030_map[] = {
  143. /*
  144. * NOTE: don't change this table without updating the
  145. * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
  146. * so they continue to match the order in this table.
  147. */
  148. /* Common IPs */
  149. { 0, TWL4030_BASEADD_USB },
  150. { 1, TWL4030_BASEADD_PIH },
  151. { 2, TWL4030_BASEADD_MAIN_CHARGE },
  152. { 3, TWL4030_BASEADD_PM_MASTER },
  153. { 3, TWL4030_BASEADD_PM_RECEIVER },
  154. { 3, TWL4030_BASEADD_RTC },
  155. { 2, TWL4030_BASEADD_PWM },
  156. { 2, TWL4030_BASEADD_LED },
  157. { 3, TWL4030_BASEADD_SECURED_REG },
  158. /* TWL4030 specific IPs */
  159. { 1, TWL4030_BASEADD_AUDIO_VOICE },
  160. { 1, TWL4030_BASEADD_GPIO },
  161. { 1, TWL4030_BASEADD_INTBR },
  162. { 1, TWL4030_BASEADD_TEST },
  163. { 2, TWL4030_BASEADD_KEYPAD },
  164. { 2, TWL4030_BASEADD_MADC },
  165. { 2, TWL4030_BASEADD_INTERRUPTS },
  166. { 2, TWL4030_BASEADD_PRECHARGE },
  167. { 3, TWL4030_BASEADD_BACKUP },
  168. { 3, TWL4030_BASEADD_INT },
  169. { 2, TWL5031_BASEADD_ACCESSORY },
  170. { 2, TWL5031_BASEADD_INTERRUPTS },
  171. };
  172. static const struct reg_default twl4030_49_defaults[] = {
  173. /* Audio Registers */
  174. { 0x01, 0x00}, /* CODEC_MODE */
  175. { 0x02, 0x00}, /* OPTION */
  176. /* 0x03 Unused */
  177. { 0x04, 0x00}, /* MICBIAS_CTL */
  178. { 0x05, 0x00}, /* ANAMICL */
  179. { 0x06, 0x00}, /* ANAMICR */
  180. { 0x07, 0x00}, /* AVADC_CTL */
  181. { 0x08, 0x00}, /* ADCMICSEL */
  182. { 0x09, 0x00}, /* DIGMIXING */
  183. { 0x0a, 0x0f}, /* ATXL1PGA */
  184. { 0x0b, 0x0f}, /* ATXR1PGA */
  185. { 0x0c, 0x0f}, /* AVTXL2PGA */
  186. { 0x0d, 0x0f}, /* AVTXR2PGA */
  187. { 0x0e, 0x00}, /* AUDIO_IF */
  188. { 0x0f, 0x00}, /* VOICE_IF */
  189. { 0x10, 0x3f}, /* ARXR1PGA */
  190. { 0x11, 0x3f}, /* ARXL1PGA */
  191. { 0x12, 0x3f}, /* ARXR2PGA */
  192. { 0x13, 0x3f}, /* ARXL2PGA */
  193. { 0x14, 0x25}, /* VRXPGA */
  194. { 0x15, 0x00}, /* VSTPGA */
  195. { 0x16, 0x00}, /* VRX2ARXPGA */
  196. { 0x17, 0x00}, /* AVDAC_CTL */
  197. { 0x18, 0x00}, /* ARX2VTXPGA */
  198. { 0x19, 0x32}, /* ARXL1_APGA_CTL*/
  199. { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/
  200. { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/
  201. { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/
  202. { 0x1d, 0x00}, /* ATX2ARXPGA */
  203. { 0x1e, 0x00}, /* BT_IF */
  204. { 0x1f, 0x55}, /* BTPGA */
  205. { 0x20, 0x00}, /* BTSTPGA */
  206. { 0x21, 0x00}, /* EAR_CTL */
  207. { 0x22, 0x00}, /* HS_SEL */
  208. { 0x23, 0x00}, /* HS_GAIN_SET */
  209. { 0x24, 0x00}, /* HS_POPN_SET */
  210. { 0x25, 0x00}, /* PREDL_CTL */
  211. { 0x26, 0x00}, /* PREDR_CTL */
  212. { 0x27, 0x00}, /* PRECKL_CTL */
  213. { 0x28, 0x00}, /* PRECKR_CTL */
  214. { 0x29, 0x00}, /* HFL_CTL */
  215. { 0x2a, 0x00}, /* HFR_CTL */
  216. { 0x2b, 0x05}, /* ALC_CTL */
  217. { 0x2c, 0x00}, /* ALC_SET1 */
  218. { 0x2d, 0x00}, /* ALC_SET2 */
  219. { 0x2e, 0x00}, /* BOOST_CTL */
  220. { 0x2f, 0x00}, /* SOFTVOL_CTL */
  221. { 0x30, 0x13}, /* DTMF_FREQSEL */
  222. { 0x31, 0x00}, /* DTMF_TONEXT1H */
  223. { 0x32, 0x00}, /* DTMF_TONEXT1L */
  224. { 0x33, 0x00}, /* DTMF_TONEXT2H */
  225. { 0x34, 0x00}, /* DTMF_TONEXT2L */
  226. { 0x35, 0x79}, /* DTMF_TONOFF */
  227. { 0x36, 0x11}, /* DTMF_WANONOFF */
  228. { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */
  229. { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */
  230. { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */
  231. { 0x3a, 0x06}, /* APLL_CTL */
  232. { 0x3b, 0x00}, /* DTMF_CTL */
  233. { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */
  234. { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */
  235. { 0x3e, 0x00}, /* MISC_SET_1 */
  236. { 0x3f, 0x00}, /* PCMBTMUX */
  237. /* 0x40 - 0x42 Unused */
  238. { 0x43, 0x00}, /* RX_PATH_SEL */
  239. { 0x44, 0x32}, /* VDL_APGA_CTL */
  240. { 0x45, 0x00}, /* VIBRA_CTL */
  241. { 0x46, 0x00}, /* VIBRA_SET */
  242. { 0x47, 0x00}, /* VIBRA_PWM_SET */
  243. { 0x48, 0x00}, /* ANAMIC_GAIN */
  244. { 0x49, 0x00}, /* MISC_SET_2 */
  245. /* End of Audio Registers */
  246. };
  247. static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
  248. {
  249. switch (reg) {
  250. case 0x00:
  251. case 0x03:
  252. case 0x40:
  253. case 0x41:
  254. case 0x42:
  255. return false;
  256. default:
  257. return true;
  258. }
  259. }
  260. static const struct regmap_range twl4030_49_volatile_ranges[] = {
  261. regmap_reg_range(TWL4030_BASEADD_TEST, 0xff),
  262. };
  263. static const struct regmap_access_table twl4030_49_volatile_table = {
  264. .yes_ranges = twl4030_49_volatile_ranges,
  265. .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges),
  266. };
  267. static const struct regmap_config twl4030_regmap_config[4] = {
  268. {
  269. /* Address 0x48 */
  270. .reg_bits = 8,
  271. .val_bits = 8,
  272. .max_register = 0xff,
  273. },
  274. {
  275. /* Address 0x49 */
  276. .reg_bits = 8,
  277. .val_bits = 8,
  278. .max_register = 0xff,
  279. .readable_reg = twl4030_49_nop_reg,
  280. .writeable_reg = twl4030_49_nop_reg,
  281. .volatile_table = &twl4030_49_volatile_table,
  282. .reg_defaults = twl4030_49_defaults,
  283. .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults),
  284. .cache_type = REGCACHE_RBTREE,
  285. },
  286. {
  287. /* Address 0x4a */
  288. .reg_bits = 8,
  289. .val_bits = 8,
  290. .max_register = 0xff,
  291. },
  292. {
  293. /* Address 0x4b */
  294. .reg_bits = 8,
  295. .val_bits = 8,
  296. .max_register = 0xff,
  297. },
  298. };
  299. static struct twl_mapping twl6030_map[] = {
  300. /*
  301. * NOTE: don't change this table without updating the
  302. * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
  303. * so they continue to match the order in this table.
  304. */
  305. /* Common IPs */
  306. { 1, TWL6030_BASEADD_USB },
  307. { 1, TWL6030_BASEADD_PIH },
  308. { 1, TWL6030_BASEADD_CHARGER },
  309. { 0, TWL6030_BASEADD_PM_MASTER },
  310. { 0, TWL6030_BASEADD_PM_SLAVE_MISC },
  311. { 0, TWL6030_BASEADD_RTC },
  312. { 1, TWL6030_BASEADD_PWM },
  313. { 1, TWL6030_BASEADD_LED },
  314. { 0, TWL6030_BASEADD_SECURED_REG },
  315. /* TWL6030 specific IPs */
  316. { 0, TWL6030_BASEADD_ZERO },
  317. { 1, TWL6030_BASEADD_ZERO },
  318. { 2, TWL6030_BASEADD_ZERO },
  319. { 1, TWL6030_BASEADD_GPADC_CTRL },
  320. { 1, TWL6030_BASEADD_GASGAUGE },
  321. };
  322. static const struct regmap_config twl6030_regmap_config[3] = {
  323. {
  324. /* Address 0x48 */
  325. .reg_bits = 8,
  326. .val_bits = 8,
  327. .max_register = 0xff,
  328. },
  329. {
  330. /* Address 0x49 */
  331. .reg_bits = 8,
  332. .val_bits = 8,
  333. .max_register = 0xff,
  334. },
  335. {
  336. /* Address 0x4a */
  337. .reg_bits = 8,
  338. .val_bits = 8,
  339. .max_register = 0xff,
  340. },
  341. };
  342. /*----------------------------------------------------------------------*/
  343. static inline int twl_get_num_slaves(void)
  344. {
  345. if (twl_class_is_4030())
  346. return 4; /* TWL4030 class have four slave address */
  347. else
  348. return 3; /* TWL6030 class have three slave address */
  349. }
  350. static inline int twl_get_last_module(void)
  351. {
  352. if (twl_class_is_4030())
  353. return TWL4030_MODULE_LAST;
  354. else
  355. return TWL6030_MODULE_LAST;
  356. }
  357. /* Exported Functions */
  358. unsigned int twl_rev(void)
  359. {
  360. return twl_priv ? twl_priv->twl_id : 0;
  361. }
  362. EXPORT_SYMBOL(twl_rev);
  363. /**
  364. * twl_get_regmap - Get the regmap associated with the given module
  365. * @mod_no: module number
  366. *
  367. * Returns the regmap pointer or NULL in case of failure.
  368. */
  369. static struct regmap *twl_get_regmap(u8 mod_no)
  370. {
  371. int sid;
  372. struct twl_client *twl;
  373. if (unlikely(!twl_priv || !twl_priv->ready)) {
  374. pr_err("%s: not initialized\n", DRIVER_NAME);
  375. return NULL;
  376. }
  377. if (unlikely(mod_no >= twl_get_last_module())) {
  378. pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
  379. return NULL;
  380. }
  381. sid = twl_priv->twl_map[mod_no].sid;
  382. twl = &twl_priv->twl_modules[sid];
  383. return twl->regmap;
  384. }
  385. /**
  386. * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
  387. * @mod_no: module number
  388. * @value: an array of num_bytes+1 containing data to write
  389. * @reg: register address (just offset will do)
  390. * @num_bytes: number of bytes to transfer
  391. *
  392. * Returns the result of operation - 0 is success
  393. */
  394. int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
  395. {
  396. struct regmap *regmap = twl_get_regmap(mod_no);
  397. int ret;
  398. if (!regmap)
  399. return -EPERM;
  400. ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg,
  401. value, num_bytes);
  402. if (ret)
  403. pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
  404. DRIVER_NAME, mod_no, reg, num_bytes);
  405. return ret;
  406. }
  407. EXPORT_SYMBOL(twl_i2c_write);
  408. /**
  409. * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
  410. * @mod_no: module number
  411. * @value: an array of num_bytes containing data to be read
  412. * @reg: register address (just offset will do)
  413. * @num_bytes: number of bytes to transfer
  414. *
  415. * Returns result of operation - num_bytes is success else failure.
  416. */
  417. int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
  418. {
  419. struct regmap *regmap = twl_get_regmap(mod_no);
  420. int ret;
  421. if (!regmap)
  422. return -EPERM;
  423. ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg,
  424. value, num_bytes);
  425. if (ret)
  426. pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
  427. DRIVER_NAME, mod_no, reg, num_bytes);
  428. return ret;
  429. }
  430. EXPORT_SYMBOL(twl_i2c_read);
  431. /**
  432. * twl_regcache_bypass - Configure the regcache bypass for the regmap associated
  433. * with the module
  434. * @mod_no: module number
  435. * @enable: Regcache bypass state
  436. *
  437. * Returns 0 else failure.
  438. */
  439. int twl_set_regcache_bypass(u8 mod_no, bool enable)
  440. {
  441. struct regmap *regmap = twl_get_regmap(mod_no);
  442. if (!regmap)
  443. return -EPERM;
  444. regcache_cache_bypass(regmap, enable);
  445. return 0;
  446. }
  447. EXPORT_SYMBOL(twl_set_regcache_bypass);
  448. /*----------------------------------------------------------------------*/
  449. /**
  450. * twl_read_idcode_register - API to read the IDCODE register.
  451. *
  452. * Unlocks the IDCODE register and read the 32 bit value.
  453. */
  454. static int twl_read_idcode_register(void)
  455. {
  456. int err;
  457. err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
  458. REG_UNLOCK_TEST_REG);
  459. if (err) {
  460. pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
  461. goto fail;
  462. }
  463. err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode),
  464. REG_IDCODE_7_0, 4);
  465. if (err) {
  466. pr_err("TWL4030: unable to read IDCODE -%d\n", err);
  467. goto fail;
  468. }
  469. err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
  470. if (err)
  471. pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
  472. fail:
  473. return err;
  474. }
  475. /**
  476. * twl_get_type - API to get TWL Si type.
  477. *
  478. * Api to get the TWL Si type from IDCODE value.
  479. */
  480. int twl_get_type(void)
  481. {
  482. return TWL_SIL_TYPE(twl_priv->twl_idcode);
  483. }
  484. EXPORT_SYMBOL_GPL(twl_get_type);
  485. /**
  486. * twl_get_version - API to get TWL Si version.
  487. *
  488. * Api to get the TWL Si version from IDCODE value.
  489. */
  490. int twl_get_version(void)
  491. {
  492. return TWL_SIL_REV(twl_priv->twl_idcode);
  493. }
  494. EXPORT_SYMBOL_GPL(twl_get_version);
  495. /**
  496. * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
  497. *
  498. * Api to get the TWL HFCLK rate based on BOOT_CFG register.
  499. */
  500. int twl_get_hfclk_rate(void)
  501. {
  502. u8 ctrl;
  503. int rate;
  504. twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
  505. switch (ctrl & 0x3) {
  506. case HFCLK_FREQ_19p2_MHZ:
  507. rate = 19200000;
  508. break;
  509. case HFCLK_FREQ_26_MHZ:
  510. rate = 26000000;
  511. break;
  512. case HFCLK_FREQ_38p4_MHZ:
  513. rate = 38400000;
  514. break;
  515. default:
  516. pr_err("TWL4030: HFCLK is not configured\n");
  517. rate = -EINVAL;
  518. break;
  519. }
  520. return rate;
  521. }
  522. EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
  523. static struct device *
  524. add_numbered_child(unsigned mod_no, const char *name, int num,
  525. void *pdata, unsigned pdata_len,
  526. bool can_wakeup, int irq0, int irq1)
  527. {
  528. struct platform_device *pdev;
  529. struct twl_client *twl;
  530. int status, sid;
  531. if (unlikely(mod_no >= twl_get_last_module())) {
  532. pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
  533. return ERR_PTR(-EPERM);
  534. }
  535. sid = twl_priv->twl_map[mod_no].sid;
  536. twl = &twl_priv->twl_modules[sid];
  537. pdev = platform_device_alloc(name, num);
  538. if (!pdev)
  539. return ERR_PTR(-ENOMEM);
  540. pdev->dev.parent = &twl->client->dev;
  541. if (pdata) {
  542. status = platform_device_add_data(pdev, pdata, pdata_len);
  543. if (status < 0) {
  544. dev_dbg(&pdev->dev, "can't add platform_data\n");
  545. goto put_device;
  546. }
  547. }
  548. if (irq0) {
  549. struct resource r[2] = {
  550. { .start = irq0, .flags = IORESOURCE_IRQ, },
  551. { .start = irq1, .flags = IORESOURCE_IRQ, },
  552. };
  553. status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
  554. if (status < 0) {
  555. dev_dbg(&pdev->dev, "can't add irqs\n");
  556. goto put_device;
  557. }
  558. }
  559. status = platform_device_add(pdev);
  560. if (status)
  561. goto put_device;
  562. device_init_wakeup(&pdev->dev, can_wakeup);
  563. return &pdev->dev;
  564. put_device:
  565. platform_device_put(pdev);
  566. dev_err(&twl->client->dev, "failed to add device %s\n", name);
  567. return ERR_PTR(status);
  568. }
  569. static inline struct device *add_child(unsigned mod_no, const char *name,
  570. void *pdata, unsigned pdata_len,
  571. bool can_wakeup, int irq0, int irq1)
  572. {
  573. return add_numbered_child(mod_no, name, -1, pdata, pdata_len,
  574. can_wakeup, irq0, irq1);
  575. }
  576. static struct device *
  577. add_regulator_linked(int num, struct regulator_init_data *pdata,
  578. struct regulator_consumer_supply *consumers,
  579. unsigned num_consumers, unsigned long features)
  580. {
  581. struct twl_regulator_driver_data drv_data;
  582. /* regulator framework demands init_data ... */
  583. if (!pdata)
  584. return NULL;
  585. if (consumers) {
  586. pdata->consumer_supplies = consumers;
  587. pdata->num_consumer_supplies = num_consumers;
  588. }
  589. if (pdata->driver_data) {
  590. /* If we have existing drv_data, just add the flags */
  591. struct twl_regulator_driver_data *tmp;
  592. tmp = pdata->driver_data;
  593. tmp->features |= features;
  594. } else {
  595. /* add new driver data struct, used only during init */
  596. drv_data.features = features;
  597. drv_data.set_voltage = NULL;
  598. drv_data.get_voltage = NULL;
  599. drv_data.data = NULL;
  600. pdata->driver_data = &drv_data;
  601. }
  602. /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
  603. return add_numbered_child(TWL_MODULE_PM_MASTER, "twl_reg", num,
  604. pdata, sizeof(*pdata), false, 0, 0);
  605. }
  606. static struct device *
  607. add_regulator(int num, struct regulator_init_data *pdata,
  608. unsigned long features)
  609. {
  610. return add_regulator_linked(num, pdata, NULL, 0, features);
  611. }
  612. /*
  613. * NOTE: We know the first 8 IRQs after pdata->base_irq are
  614. * for the PIH, and the next are for the PWR_INT SIH, since
  615. * that's how twl_init_irq() sets things up.
  616. */
  617. static int
  618. add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
  619. unsigned long features)
  620. {
  621. struct device *child;
  622. if (IS_ENABLED(CONFIG_GPIO_TWL4030) && pdata->gpio) {
  623. child = add_child(TWL4030_MODULE_GPIO, "twl4030_gpio",
  624. pdata->gpio, sizeof(*pdata->gpio),
  625. false, irq_base + GPIO_INTR_OFFSET, 0);
  626. if (IS_ERR(child))
  627. return PTR_ERR(child);
  628. }
  629. if (IS_ENABLED(CONFIG_KEYBOARD_TWL4030) && pdata->keypad) {
  630. child = add_child(TWL4030_MODULE_KEYPAD, "twl4030_keypad",
  631. pdata->keypad, sizeof(*pdata->keypad),
  632. true, irq_base + KEYPAD_INTR_OFFSET, 0);
  633. if (IS_ERR(child))
  634. return PTR_ERR(child);
  635. }
  636. if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc &&
  637. twl_class_is_4030()) {
  638. child = add_child(TWL4030_MODULE_MADC, "twl4030_madc",
  639. pdata->madc, sizeof(*pdata->madc),
  640. true, irq_base + MADC_INTR_OFFSET, 0);
  641. if (IS_ERR(child))
  642. return PTR_ERR(child);
  643. }
  644. if (IS_ENABLED(CONFIG_RTC_DRV_TWL4030)) {
  645. /*
  646. * REVISIT platform_data here currently might expose the
  647. * "msecure" line ... but for now we just expect board
  648. * setup to tell the chip "it's always ok to SET_TIME".
  649. * Eventually, Linux might become more aware of such
  650. * HW security concerns, and "least privilege".
  651. */
  652. child = add_child(TWL_MODULE_RTC, "twl_rtc", NULL, 0,
  653. true, irq_base + RTC_INTR_OFFSET, 0);
  654. if (IS_ERR(child))
  655. return PTR_ERR(child);
  656. }
  657. if (IS_ENABLED(CONFIG_PWM_TWL)) {
  658. child = add_child(TWL_MODULE_PWM, "twl-pwm", NULL, 0,
  659. false, 0, 0);
  660. if (IS_ERR(child))
  661. return PTR_ERR(child);
  662. }
  663. if (IS_ENABLED(CONFIG_PWM_TWL_LED)) {
  664. child = add_child(TWL_MODULE_LED, "twl-pwmled", NULL, 0,
  665. false, 0, 0);
  666. if (IS_ERR(child))
  667. return PTR_ERR(child);
  668. }
  669. if (IS_ENABLED(CONFIG_TWL4030_USB) && pdata->usb &&
  670. twl_class_is_4030()) {
  671. static struct regulator_consumer_supply usb1v5 = {
  672. .supply = "usb1v5",
  673. };
  674. static struct regulator_consumer_supply usb1v8 = {
  675. .supply = "usb1v8",
  676. };
  677. static struct regulator_consumer_supply usb3v1 = {
  678. .supply = "usb3v1",
  679. };
  680. /* First add the regulators so that they can be used by transceiver */
  681. if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) {
  682. /* this is a template that gets copied */
  683. struct regulator_init_data usb_fixed = {
  684. .constraints.valid_modes_mask =
  685. REGULATOR_MODE_NORMAL
  686. | REGULATOR_MODE_STANDBY,
  687. .constraints.valid_ops_mask =
  688. REGULATOR_CHANGE_MODE
  689. | REGULATOR_CHANGE_STATUS,
  690. };
  691. child = add_regulator_linked(TWL4030_REG_VUSB1V5,
  692. &usb_fixed, &usb1v5, 1,
  693. features);
  694. if (IS_ERR(child))
  695. return PTR_ERR(child);
  696. child = add_regulator_linked(TWL4030_REG_VUSB1V8,
  697. &usb_fixed, &usb1v8, 1,
  698. features);
  699. if (IS_ERR(child))
  700. return PTR_ERR(child);
  701. child = add_regulator_linked(TWL4030_REG_VUSB3V1,
  702. &usb_fixed, &usb3v1, 1,
  703. features);
  704. if (IS_ERR(child))
  705. return PTR_ERR(child);
  706. }
  707. child = add_child(TWL_MODULE_USB, "twl4030_usb",
  708. pdata->usb, sizeof(*pdata->usb), true,
  709. /* irq0 = USB_PRES, irq1 = USB */
  710. irq_base + USB_PRES_INTR_OFFSET,
  711. irq_base + USB_INTR_OFFSET);
  712. if (IS_ERR(child))
  713. return PTR_ERR(child);
  714. /* we need to connect regulators to this transceiver */
  715. if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) {
  716. usb1v5.dev_name = dev_name(child);
  717. usb1v8.dev_name = dev_name(child);
  718. usb3v1.dev_name = dev_name(child);
  719. }
  720. }
  721. if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) {
  722. child = add_child(TWL_MODULE_PM_RECEIVER, "twl4030_wdt", NULL,
  723. 0, false, 0, 0);
  724. if (IS_ERR(child))
  725. return PTR_ERR(child);
  726. }
  727. if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) {
  728. child = add_child(TWL_MODULE_PM_MASTER, "twl4030_pwrbutton",
  729. NULL, 0, true, irq_base + 8 + 0, 0);
  730. if (IS_ERR(child))
  731. return PTR_ERR(child);
  732. }
  733. if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio &&
  734. twl_class_is_4030()) {
  735. child = add_child(TWL4030_MODULE_AUDIO_VOICE, "twl4030-audio",
  736. pdata->audio, sizeof(*pdata->audio),
  737. false, 0, 0);
  738. if (IS_ERR(child))
  739. return PTR_ERR(child);
  740. }
  741. /* twl4030 regulators */
  742. if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_4030()) {
  743. child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
  744. features);
  745. if (IS_ERR(child))
  746. return PTR_ERR(child);
  747. child = add_regulator(TWL4030_REG_VIO, pdata->vio,
  748. features);
  749. if (IS_ERR(child))
  750. return PTR_ERR(child);
  751. child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1,
  752. features);
  753. if (IS_ERR(child))
  754. return PTR_ERR(child);
  755. child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2,
  756. features);
  757. if (IS_ERR(child))
  758. return PTR_ERR(child);
  759. child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1,
  760. features);
  761. if (IS_ERR(child))
  762. return PTR_ERR(child);
  763. child = add_regulator(TWL4030_REG_VDAC, pdata->vdac,
  764. features);
  765. if (IS_ERR(child))
  766. return PTR_ERR(child);
  767. child = add_regulator((features & TWL4030_VAUX2)
  768. ? TWL4030_REG_VAUX2_4030
  769. : TWL4030_REG_VAUX2,
  770. pdata->vaux2, features);
  771. if (IS_ERR(child))
  772. return PTR_ERR(child);
  773. child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1,
  774. features);
  775. if (IS_ERR(child))
  776. return PTR_ERR(child);
  777. child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2,
  778. features);
  779. if (IS_ERR(child))
  780. return PTR_ERR(child);
  781. child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig,
  782. features);
  783. if (IS_ERR(child))
  784. return PTR_ERR(child);
  785. }
  786. /* maybe add LDOs that are omitted on cost-reduced parts */
  787. if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && !(features & TPS_SUBSET)
  788. && twl_class_is_4030()) {
  789. child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
  790. features);
  791. if (IS_ERR(child))
  792. return PTR_ERR(child);
  793. child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2,
  794. features);
  795. if (IS_ERR(child))
  796. return PTR_ERR(child);
  797. child = add_regulator(TWL4030_REG_VSIM, pdata->vsim,
  798. features);
  799. if (IS_ERR(child))
  800. return PTR_ERR(child);
  801. child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1,
  802. features);
  803. if (IS_ERR(child))
  804. return PTR_ERR(child);
  805. child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3,
  806. features);
  807. if (IS_ERR(child))
  808. return PTR_ERR(child);
  809. child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4,
  810. features);
  811. if (IS_ERR(child))
  812. return PTR_ERR(child);
  813. }
  814. if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci &&
  815. !(features & (TPS_SUBSET | TWL5031))) {
  816. child = add_child(TWL_MODULE_MAIN_CHARGE, "twl4030_bci",
  817. pdata->bci, sizeof(*pdata->bci), false,
  818. /* irq0 = CHG_PRES, irq1 = BCI */
  819. irq_base + BCI_PRES_INTR_OFFSET,
  820. irq_base + BCI_INTR_OFFSET);
  821. if (IS_ERR(child))
  822. return PTR_ERR(child);
  823. }
  824. if (IS_ENABLED(CONFIG_TWL4030_POWER) && pdata->power) {
  825. child = add_child(TWL_MODULE_PM_MASTER, "twl4030_power",
  826. pdata->power, sizeof(*pdata->power), false,
  827. 0, 0);
  828. if (IS_ERR(child))
  829. return PTR_ERR(child);
  830. }
  831. return 0;
  832. }
  833. /*----------------------------------------------------------------------*/
  834. /*
  835. * These three functions initialize the on-chip clock framework,
  836. * letting it generate the right frequencies for USB, MADC, and
  837. * other purposes.
  838. */
  839. static inline int __init protect_pm_master(void)
  840. {
  841. int e = 0;
  842. e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
  843. TWL4030_PM_MASTER_PROTECT_KEY);
  844. return e;
  845. }
  846. static inline int __init unprotect_pm_master(void)
  847. {
  848. int e = 0;
  849. e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
  850. TWL4030_PM_MASTER_PROTECT_KEY);
  851. e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
  852. TWL4030_PM_MASTER_PROTECT_KEY);
  853. return e;
  854. }
  855. static void clocks_init(struct device *dev,
  856. struct twl4030_clock_init_data *clock)
  857. {
  858. int e = 0;
  859. struct clk *osc;
  860. u32 rate;
  861. u8 ctrl = HFCLK_FREQ_26_MHZ;
  862. osc = clk_get(dev, "fck");
  863. if (IS_ERR(osc)) {
  864. printk(KERN_WARNING "Skipping twl internal clock init and "
  865. "using bootloader value (unknown osc rate)\n");
  866. return;
  867. }
  868. rate = clk_get_rate(osc);
  869. clk_put(osc);
  870. switch (rate) {
  871. case 19200000:
  872. ctrl = HFCLK_FREQ_19p2_MHZ;
  873. break;
  874. case 26000000:
  875. ctrl = HFCLK_FREQ_26_MHZ;
  876. break;
  877. case 38400000:
  878. ctrl = HFCLK_FREQ_38p4_MHZ;
  879. break;
  880. }
  881. ctrl |= HIGH_PERF_SQ;
  882. if (clock && clock->ck32k_lowpwr_enable)
  883. ctrl |= CK32K_LOWPWR_EN;
  884. e |= unprotect_pm_master();
  885. /* effect->MADC+USB ck en */
  886. e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
  887. e |= protect_pm_master();
  888. if (e < 0)
  889. pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
  890. }
  891. /*----------------------------------------------------------------------*/
  892. static int twl_remove(struct i2c_client *client)
  893. {
  894. unsigned i, num_slaves;
  895. int status;
  896. if (twl_class_is_4030())
  897. status = twl4030_exit_irq();
  898. else
  899. status = twl6030_exit_irq();
  900. if (status < 0)
  901. return status;
  902. num_slaves = twl_get_num_slaves();
  903. for (i = 0; i < num_slaves; i++) {
  904. struct twl_client *twl = &twl_priv->twl_modules[i];
  905. if (twl->client && twl->client != client)
  906. i2c_unregister_device(twl->client);
  907. twl->client = NULL;
  908. }
  909. twl_priv->ready = false;
  910. return 0;
  911. }
  912. static struct of_dev_auxdata twl_auxdata_lookup[] = {
  913. OF_DEV_AUXDATA("ti,twl4030-gpio", 0, "twl4030-gpio", NULL),
  914. { /* sentinel */ },
  915. };
  916. /* NOTE: This driver only handles a single twl4030/tps659x0 chip */
  917. static int
  918. twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
  919. {
  920. struct twl4030_platform_data *pdata = dev_get_platdata(&client->dev);
  921. struct device_node *node = client->dev.of_node;
  922. struct platform_device *pdev;
  923. const struct regmap_config *twl_regmap_config;
  924. int irq_base = 0;
  925. int status;
  926. unsigned i, num_slaves;
  927. if (!node && !pdata) {
  928. dev_err(&client->dev, "no platform data\n");
  929. return -EINVAL;
  930. }
  931. if (twl_priv) {
  932. dev_dbg(&client->dev, "only one instance of %s allowed\n",
  933. DRIVER_NAME);
  934. return -EBUSY;
  935. }
  936. pdev = platform_device_alloc(DRIVER_NAME, -1);
  937. if (!pdev) {
  938. dev_err(&client->dev, "can't alloc pdev\n");
  939. return -ENOMEM;
  940. }
  941. status = platform_device_add(pdev);
  942. if (status) {
  943. platform_device_put(pdev);
  944. return status;
  945. }
  946. if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
  947. dev_dbg(&client->dev, "can't talk I2C?\n");
  948. status = -EIO;
  949. goto free;
  950. }
  951. twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private),
  952. GFP_KERNEL);
  953. if (!twl_priv) {
  954. status = -ENOMEM;
  955. goto free;
  956. }
  957. if ((id->driver_data) & TWL6030_CLASS) {
  958. twl_priv->twl_id = TWL6030_CLASS_ID;
  959. twl_priv->twl_map = &twl6030_map[0];
  960. /* The charger base address is different in twl6032 */
  961. if ((id->driver_data) & TWL6032_SUBCLASS)
  962. twl_priv->twl_map[TWL_MODULE_MAIN_CHARGE].base =
  963. TWL6032_BASEADD_CHARGER;
  964. twl_regmap_config = twl6030_regmap_config;
  965. } else {
  966. twl_priv->twl_id = TWL4030_CLASS_ID;
  967. twl_priv->twl_map = &twl4030_map[0];
  968. twl_regmap_config = twl4030_regmap_config;
  969. }
  970. num_slaves = twl_get_num_slaves();
  971. twl_priv->twl_modules = devm_kzalloc(&client->dev,
  972. sizeof(struct twl_client) * num_slaves,
  973. GFP_KERNEL);
  974. if (!twl_priv->twl_modules) {
  975. status = -ENOMEM;
  976. goto free;
  977. }
  978. for (i = 0; i < num_slaves; i++) {
  979. struct twl_client *twl = &twl_priv->twl_modules[i];
  980. if (i == 0) {
  981. twl->client = client;
  982. } else {
  983. twl->client = i2c_new_dummy(client->adapter,
  984. client->addr + i);
  985. if (!twl->client) {
  986. dev_err(&client->dev,
  987. "can't attach client %d\n", i);
  988. status = -ENOMEM;
  989. goto fail;
  990. }
  991. }
  992. twl->regmap = devm_regmap_init_i2c(twl->client,
  993. &twl_regmap_config[i]);
  994. if (IS_ERR(twl->regmap)) {
  995. status = PTR_ERR(twl->regmap);
  996. dev_err(&client->dev,
  997. "Failed to allocate regmap %d, err: %d\n", i,
  998. status);
  999. goto fail;
  1000. }
  1001. }
  1002. twl_priv->ready = true;
  1003. /* setup clock framework */
  1004. clocks_init(&pdev->dev, pdata ? pdata->clock : NULL);
  1005. /* read TWL IDCODE Register */
  1006. if (twl_class_is_4030()) {
  1007. status = twl_read_idcode_register();
  1008. WARN(status < 0, "Error: reading twl_idcode register value\n");
  1009. }
  1010. /* Maybe init the T2 Interrupt subsystem */
  1011. if (client->irq) {
  1012. if (twl_class_is_4030()) {
  1013. twl4030_init_chip_irq(id->name);
  1014. irq_base = twl4030_init_irq(&client->dev, client->irq);
  1015. } else {
  1016. irq_base = twl6030_init_irq(&client->dev, client->irq);
  1017. }
  1018. if (irq_base < 0) {
  1019. status = irq_base;
  1020. goto fail;
  1021. }
  1022. }
  1023. /*
  1024. * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
  1025. * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
  1026. * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
  1027. *
  1028. * Also, always enable SmartReflex bit as that's needed for omaps to
  1029. * to do anything over I2C4 for voltage scaling even if SmartReflex
  1030. * is disabled. Without the SmartReflex bit omap sys_clkreq idle
  1031. * signal will never trigger for retention idle.
  1032. */
  1033. if (twl_class_is_4030()) {
  1034. u8 temp;
  1035. twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
  1036. temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
  1037. I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
  1038. twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
  1039. twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
  1040. TWL4030_DCDC_GLOBAL_CFG);
  1041. temp |= SMARTREFLEX_ENABLE;
  1042. twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
  1043. TWL4030_DCDC_GLOBAL_CFG);
  1044. }
  1045. if (node) {
  1046. if (pdata)
  1047. twl_auxdata_lookup[0].platform_data = pdata->gpio;
  1048. status = of_platform_populate(node, NULL, twl_auxdata_lookup,
  1049. &client->dev);
  1050. } else {
  1051. status = add_children(pdata, irq_base, id->driver_data);
  1052. }
  1053. fail:
  1054. if (status < 0)
  1055. twl_remove(client);
  1056. free:
  1057. if (status < 0)
  1058. platform_device_unregister(pdev);
  1059. return status;
  1060. }
  1061. static const struct i2c_device_id twl_ids[] = {
  1062. { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
  1063. { "twl5030", 0 }, /* T2 updated */
  1064. { "twl5031", TWL5031 }, /* TWL5030 updated */
  1065. { "tps65950", 0 }, /* catalog version of twl5030 */
  1066. { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
  1067. { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
  1068. { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
  1069. and vibrator. Charger in USB module*/
  1070. { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
  1071. { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */
  1072. { /* end of list */ },
  1073. };
  1074. /* One Client Driver , 4 Clients */
  1075. static struct i2c_driver twl_driver = {
  1076. .driver.name = DRIVER_NAME,
  1077. .id_table = twl_ids,
  1078. .probe = twl_probe,
  1079. .remove = twl_remove,
  1080. };
  1081. builtin_i2c_driver(twl_driver);