tps65910.c 13 KB

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  1. /*
  2. * tps65910.c -- TI TPS6591x
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/slab.h>
  20. #include <linux/i2c.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/irq.h>
  23. #include <linux/irqdomain.h>
  24. #include <linux/mfd/core.h>
  25. #include <linux/regmap.h>
  26. #include <linux/mfd/tps65910.h>
  27. #include <linux/of.h>
  28. #include <linux/of_device.h>
  29. static struct resource rtc_resources[] = {
  30. {
  31. .start = TPS65910_IRQ_RTC_ALARM,
  32. .end = TPS65910_IRQ_RTC_ALARM,
  33. .flags = IORESOURCE_IRQ,
  34. }
  35. };
  36. static const struct mfd_cell tps65910s[] = {
  37. {
  38. .name = "tps65910-gpio",
  39. },
  40. {
  41. .name = "tps65910-pmic",
  42. },
  43. {
  44. .name = "tps65910-rtc",
  45. .num_resources = ARRAY_SIZE(rtc_resources),
  46. .resources = &rtc_resources[0],
  47. },
  48. {
  49. .name = "tps65910-power",
  50. },
  51. };
  52. static const struct regmap_irq tps65911_irqs[] = {
  53. /* INT_STS */
  54. [TPS65911_IRQ_PWRHOLD_F] = {
  55. .mask = INT_MSK_PWRHOLD_F_IT_MSK_MASK,
  56. .reg_offset = 0,
  57. },
  58. [TPS65911_IRQ_VBAT_VMHI] = {
  59. .mask = INT_MSK_VMBHI_IT_MSK_MASK,
  60. .reg_offset = 0,
  61. },
  62. [TPS65911_IRQ_PWRON] = {
  63. .mask = INT_MSK_PWRON_IT_MSK_MASK,
  64. .reg_offset = 0,
  65. },
  66. [TPS65911_IRQ_PWRON_LP] = {
  67. .mask = INT_MSK_PWRON_LP_IT_MSK_MASK,
  68. .reg_offset = 0,
  69. },
  70. [TPS65911_IRQ_PWRHOLD_R] = {
  71. .mask = INT_MSK_PWRHOLD_R_IT_MSK_MASK,
  72. .reg_offset = 0,
  73. },
  74. [TPS65911_IRQ_HOTDIE] = {
  75. .mask = INT_MSK_HOTDIE_IT_MSK_MASK,
  76. .reg_offset = 0,
  77. },
  78. [TPS65911_IRQ_RTC_ALARM] = {
  79. .mask = INT_MSK_RTC_ALARM_IT_MSK_MASK,
  80. .reg_offset = 0,
  81. },
  82. [TPS65911_IRQ_RTC_PERIOD] = {
  83. .mask = INT_MSK_RTC_PERIOD_IT_MSK_MASK,
  84. .reg_offset = 0,
  85. },
  86. /* INT_STS2 */
  87. [TPS65911_IRQ_GPIO0_R] = {
  88. .mask = INT_MSK2_GPIO0_R_IT_MSK_MASK,
  89. .reg_offset = 1,
  90. },
  91. [TPS65911_IRQ_GPIO0_F] = {
  92. .mask = INT_MSK2_GPIO0_F_IT_MSK_MASK,
  93. .reg_offset = 1,
  94. },
  95. [TPS65911_IRQ_GPIO1_R] = {
  96. .mask = INT_MSK2_GPIO1_R_IT_MSK_MASK,
  97. .reg_offset = 1,
  98. },
  99. [TPS65911_IRQ_GPIO1_F] = {
  100. .mask = INT_MSK2_GPIO1_F_IT_MSK_MASK,
  101. .reg_offset = 1,
  102. },
  103. [TPS65911_IRQ_GPIO2_R] = {
  104. .mask = INT_MSK2_GPIO2_R_IT_MSK_MASK,
  105. .reg_offset = 1,
  106. },
  107. [TPS65911_IRQ_GPIO2_F] = {
  108. .mask = INT_MSK2_GPIO2_F_IT_MSK_MASK,
  109. .reg_offset = 1,
  110. },
  111. [TPS65911_IRQ_GPIO3_R] = {
  112. .mask = INT_MSK2_GPIO3_R_IT_MSK_MASK,
  113. .reg_offset = 1,
  114. },
  115. [TPS65911_IRQ_GPIO3_F] = {
  116. .mask = INT_MSK2_GPIO3_F_IT_MSK_MASK,
  117. .reg_offset = 1,
  118. },
  119. /* INT_STS2 */
  120. [TPS65911_IRQ_GPIO4_R] = {
  121. .mask = INT_MSK3_GPIO4_R_IT_MSK_MASK,
  122. .reg_offset = 2,
  123. },
  124. [TPS65911_IRQ_GPIO4_F] = {
  125. .mask = INT_MSK3_GPIO4_F_IT_MSK_MASK,
  126. .reg_offset = 2,
  127. },
  128. [TPS65911_IRQ_GPIO5_R] = {
  129. .mask = INT_MSK3_GPIO5_R_IT_MSK_MASK,
  130. .reg_offset = 2,
  131. },
  132. [TPS65911_IRQ_GPIO5_F] = {
  133. .mask = INT_MSK3_GPIO5_F_IT_MSK_MASK,
  134. .reg_offset = 2,
  135. },
  136. [TPS65911_IRQ_WTCHDG] = {
  137. .mask = INT_MSK3_WTCHDG_IT_MSK_MASK,
  138. .reg_offset = 2,
  139. },
  140. [TPS65911_IRQ_VMBCH2_H] = {
  141. .mask = INT_MSK3_VMBCH2_H_IT_MSK_MASK,
  142. .reg_offset = 2,
  143. },
  144. [TPS65911_IRQ_VMBCH2_L] = {
  145. .mask = INT_MSK3_VMBCH2_L_IT_MSK_MASK,
  146. .reg_offset = 2,
  147. },
  148. [TPS65911_IRQ_PWRDN] = {
  149. .mask = INT_MSK3_PWRDN_IT_MSK_MASK,
  150. .reg_offset = 2,
  151. },
  152. };
  153. static const struct regmap_irq tps65910_irqs[] = {
  154. /* INT_STS */
  155. [TPS65910_IRQ_VBAT_VMBDCH] = {
  156. .mask = TPS65910_INT_MSK_VMBDCH_IT_MSK_MASK,
  157. .reg_offset = 0,
  158. },
  159. [TPS65910_IRQ_VBAT_VMHI] = {
  160. .mask = TPS65910_INT_MSK_VMBHI_IT_MSK_MASK,
  161. .reg_offset = 0,
  162. },
  163. [TPS65910_IRQ_PWRON] = {
  164. .mask = TPS65910_INT_MSK_PWRON_IT_MSK_MASK,
  165. .reg_offset = 0,
  166. },
  167. [TPS65910_IRQ_PWRON_LP] = {
  168. .mask = TPS65910_INT_MSK_PWRON_LP_IT_MSK_MASK,
  169. .reg_offset = 0,
  170. },
  171. [TPS65910_IRQ_PWRHOLD] = {
  172. .mask = TPS65910_INT_MSK_PWRHOLD_IT_MSK_MASK,
  173. .reg_offset = 0,
  174. },
  175. [TPS65910_IRQ_HOTDIE] = {
  176. .mask = TPS65910_INT_MSK_HOTDIE_IT_MSK_MASK,
  177. .reg_offset = 0,
  178. },
  179. [TPS65910_IRQ_RTC_ALARM] = {
  180. .mask = TPS65910_INT_MSK_RTC_ALARM_IT_MSK_MASK,
  181. .reg_offset = 0,
  182. },
  183. [TPS65910_IRQ_RTC_PERIOD] = {
  184. .mask = TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_MASK,
  185. .reg_offset = 0,
  186. },
  187. /* INT_STS2 */
  188. [TPS65910_IRQ_GPIO_R] = {
  189. .mask = TPS65910_INT_MSK2_GPIO0_F_IT_MSK_MASK,
  190. .reg_offset = 1,
  191. },
  192. [TPS65910_IRQ_GPIO_F] = {
  193. .mask = TPS65910_INT_MSK2_GPIO0_R_IT_MSK_MASK,
  194. .reg_offset = 1,
  195. },
  196. };
  197. static struct regmap_irq_chip tps65911_irq_chip = {
  198. .name = "tps65910",
  199. .irqs = tps65911_irqs,
  200. .num_irqs = ARRAY_SIZE(tps65911_irqs),
  201. .num_regs = 3,
  202. .irq_reg_stride = 2,
  203. .status_base = TPS65910_INT_STS,
  204. .mask_base = TPS65910_INT_MSK,
  205. .ack_base = TPS65910_INT_STS,
  206. };
  207. static struct regmap_irq_chip tps65910_irq_chip = {
  208. .name = "tps65910",
  209. .irqs = tps65910_irqs,
  210. .num_irqs = ARRAY_SIZE(tps65910_irqs),
  211. .num_regs = 2,
  212. .irq_reg_stride = 2,
  213. .status_base = TPS65910_INT_STS,
  214. .mask_base = TPS65910_INT_MSK,
  215. .ack_base = TPS65910_INT_STS,
  216. };
  217. static int tps65910_irq_init(struct tps65910 *tps65910, int irq,
  218. struct tps65910_platform_data *pdata)
  219. {
  220. int ret = 0;
  221. static struct regmap_irq_chip *tps6591x_irqs_chip;
  222. if (!irq) {
  223. dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
  224. return -EINVAL;
  225. }
  226. if (!pdata) {
  227. dev_warn(tps65910->dev, "No interrupt support, no pdata\n");
  228. return -EINVAL;
  229. }
  230. switch (tps65910_chip_id(tps65910)) {
  231. case TPS65910:
  232. tps6591x_irqs_chip = &tps65910_irq_chip;
  233. break;
  234. case TPS65911:
  235. tps6591x_irqs_chip = &tps65911_irq_chip;
  236. break;
  237. }
  238. tps65910->chip_irq = irq;
  239. ret = devm_regmap_add_irq_chip(tps65910->dev, tps65910->regmap,
  240. tps65910->chip_irq,
  241. IRQF_ONESHOT, pdata->irq_base,
  242. tps6591x_irqs_chip, &tps65910->irq_data);
  243. if (ret < 0) {
  244. dev_warn(tps65910->dev, "Failed to add irq_chip %d\n", ret);
  245. tps65910->chip_irq = 0;
  246. }
  247. return ret;
  248. }
  249. static bool is_volatile_reg(struct device *dev, unsigned int reg)
  250. {
  251. struct tps65910 *tps65910 = dev_get_drvdata(dev);
  252. /*
  253. * Caching all regulator registers.
  254. * All regualator register address range is same for
  255. * TPS65910 and TPS65911
  256. */
  257. if ((reg >= TPS65910_VIO) && (reg <= TPS65910_VDAC)) {
  258. /* Check for non-existing register */
  259. if (tps65910_chip_id(tps65910) == TPS65910)
  260. if ((reg == TPS65911_VDDCTRL_OP) ||
  261. (reg == TPS65911_VDDCTRL_SR))
  262. return true;
  263. return false;
  264. }
  265. return true;
  266. }
  267. static const struct regmap_config tps65910_regmap_config = {
  268. .reg_bits = 8,
  269. .val_bits = 8,
  270. .volatile_reg = is_volatile_reg,
  271. .max_register = TPS65910_MAX_REGISTER - 1,
  272. .cache_type = REGCACHE_RBTREE,
  273. };
  274. static int tps65910_ck32k_init(struct tps65910 *tps65910,
  275. struct tps65910_board *pmic_pdata)
  276. {
  277. int ret;
  278. if (!pmic_pdata->en_ck32k_xtal)
  279. return 0;
  280. ret = tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
  281. DEVCTRL_CK32K_CTRL_MASK);
  282. if (ret < 0) {
  283. dev_err(tps65910->dev, "clear ck32k_ctrl failed: %d\n", ret);
  284. return ret;
  285. }
  286. return 0;
  287. }
  288. static int tps65910_sleepinit(struct tps65910 *tps65910,
  289. struct tps65910_board *pmic_pdata)
  290. {
  291. struct device *dev = NULL;
  292. int ret = 0;
  293. dev = tps65910->dev;
  294. if (!pmic_pdata->en_dev_slp)
  295. return 0;
  296. /* enabling SLEEP device state */
  297. ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,
  298. DEVCTRL_DEV_SLP_MASK);
  299. if (ret < 0) {
  300. dev_err(dev, "set dev_slp failed: %d\n", ret);
  301. goto err_sleep_init;
  302. }
  303. /* Return if there is no sleep keepon data. */
  304. if (!pmic_pdata->slp_keepon)
  305. return 0;
  306. if (pmic_pdata->slp_keepon->therm_keepon) {
  307. ret = tps65910_reg_set_bits(tps65910,
  308. TPS65910_SLEEP_KEEP_RES_ON,
  309. SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK);
  310. if (ret < 0) {
  311. dev_err(dev, "set therm_keepon failed: %d\n", ret);
  312. goto disable_dev_slp;
  313. }
  314. }
  315. if (pmic_pdata->slp_keepon->clkout32k_keepon) {
  316. ret = tps65910_reg_set_bits(tps65910,
  317. TPS65910_SLEEP_KEEP_RES_ON,
  318. SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK);
  319. if (ret < 0) {
  320. dev_err(dev, "set clkout32k_keepon failed: %d\n", ret);
  321. goto disable_dev_slp;
  322. }
  323. }
  324. if (pmic_pdata->slp_keepon->i2chs_keepon) {
  325. ret = tps65910_reg_set_bits(tps65910,
  326. TPS65910_SLEEP_KEEP_RES_ON,
  327. SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK);
  328. if (ret < 0) {
  329. dev_err(dev, "set i2chs_keepon failed: %d\n", ret);
  330. goto disable_dev_slp;
  331. }
  332. }
  333. return 0;
  334. disable_dev_slp:
  335. tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
  336. DEVCTRL_DEV_SLP_MASK);
  337. err_sleep_init:
  338. return ret;
  339. }
  340. #ifdef CONFIG_OF
  341. static const struct of_device_id tps65910_of_match[] = {
  342. { .compatible = "ti,tps65910", .data = (void *)TPS65910},
  343. { .compatible = "ti,tps65911", .data = (void *)TPS65911},
  344. { },
  345. };
  346. MODULE_DEVICE_TABLE(of, tps65910_of_match);
  347. static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,
  348. unsigned long *chip_id)
  349. {
  350. struct device_node *np = client->dev.of_node;
  351. struct tps65910_board *board_info;
  352. unsigned int prop;
  353. const struct of_device_id *match;
  354. int ret = 0;
  355. match = of_match_device(tps65910_of_match, &client->dev);
  356. if (!match) {
  357. dev_err(&client->dev, "Failed to find matching dt id\n");
  358. return NULL;
  359. }
  360. *chip_id = (unsigned long)match->data;
  361. board_info = devm_kzalloc(&client->dev, sizeof(*board_info),
  362. GFP_KERNEL);
  363. if (!board_info) {
  364. dev_err(&client->dev, "Failed to allocate pdata\n");
  365. return NULL;
  366. }
  367. ret = of_property_read_u32(np, "ti,vmbch-threshold", &prop);
  368. if (!ret)
  369. board_info->vmbch_threshold = prop;
  370. ret = of_property_read_u32(np, "ti,vmbch2-threshold", &prop);
  371. if (!ret)
  372. board_info->vmbch2_threshold = prop;
  373. prop = of_property_read_bool(np, "ti,en-ck32k-xtal");
  374. board_info->en_ck32k_xtal = prop;
  375. board_info->irq = client->irq;
  376. board_info->irq_base = -1;
  377. board_info->pm_off = of_property_read_bool(np,
  378. "ti,system-power-controller");
  379. return board_info;
  380. }
  381. #else
  382. static inline
  383. struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,
  384. unsigned long *chip_id)
  385. {
  386. return NULL;
  387. }
  388. #endif
  389. static struct i2c_client *tps65910_i2c_client;
  390. static void tps65910_power_off(void)
  391. {
  392. struct tps65910 *tps65910;
  393. tps65910 = dev_get_drvdata(&tps65910_i2c_client->dev);
  394. if (tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,
  395. DEVCTRL_PWR_OFF_MASK) < 0)
  396. return;
  397. tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
  398. DEVCTRL_DEV_ON_MASK);
  399. }
  400. static int tps65910_i2c_probe(struct i2c_client *i2c,
  401. const struct i2c_device_id *id)
  402. {
  403. struct tps65910 *tps65910;
  404. struct tps65910_board *pmic_plat_data;
  405. struct tps65910_board *of_pmic_plat_data = NULL;
  406. struct tps65910_platform_data *init_data;
  407. unsigned long chip_id = id->driver_data;
  408. int ret = 0;
  409. pmic_plat_data = dev_get_platdata(&i2c->dev);
  410. if (!pmic_plat_data && i2c->dev.of_node) {
  411. pmic_plat_data = tps65910_parse_dt(i2c, &chip_id);
  412. of_pmic_plat_data = pmic_plat_data;
  413. }
  414. if (!pmic_plat_data)
  415. return -EINVAL;
  416. init_data = devm_kzalloc(&i2c->dev, sizeof(*init_data), GFP_KERNEL);
  417. if (init_data == NULL)
  418. return -ENOMEM;
  419. tps65910 = devm_kzalloc(&i2c->dev, sizeof(*tps65910), GFP_KERNEL);
  420. if (tps65910 == NULL)
  421. return -ENOMEM;
  422. tps65910->of_plat_data = of_pmic_plat_data;
  423. i2c_set_clientdata(i2c, tps65910);
  424. tps65910->dev = &i2c->dev;
  425. tps65910->i2c_client = i2c;
  426. tps65910->id = chip_id;
  427. /* Work around silicon erratum SWCZ010: the tps65910 may miss the
  428. * first I2C transfer. So issue a dummy transfer before the first
  429. * real transfer.
  430. */
  431. i2c_master_send(i2c, "", 1);
  432. tps65910->regmap = devm_regmap_init_i2c(i2c, &tps65910_regmap_config);
  433. if (IS_ERR(tps65910->regmap)) {
  434. ret = PTR_ERR(tps65910->regmap);
  435. dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret);
  436. return ret;
  437. }
  438. init_data->irq = pmic_plat_data->irq;
  439. init_data->irq_base = pmic_plat_data->irq_base;
  440. tps65910_irq_init(tps65910, init_data->irq, init_data);
  441. tps65910_ck32k_init(tps65910, pmic_plat_data);
  442. tps65910_sleepinit(tps65910, pmic_plat_data);
  443. if (pmic_plat_data->pm_off && !pm_power_off) {
  444. tps65910_i2c_client = i2c;
  445. pm_power_off = tps65910_power_off;
  446. }
  447. ret = devm_mfd_add_devices(tps65910->dev, -1,
  448. tps65910s, ARRAY_SIZE(tps65910s),
  449. NULL, 0,
  450. regmap_irq_get_domain(tps65910->irq_data));
  451. if (ret < 0) {
  452. dev_err(&i2c->dev, "mfd_add_devices failed: %d\n", ret);
  453. return ret;
  454. }
  455. return ret;
  456. }
  457. static const struct i2c_device_id tps65910_i2c_id[] = {
  458. { "tps65910", TPS65910 },
  459. { "tps65911", TPS65911 },
  460. { }
  461. };
  462. MODULE_DEVICE_TABLE(i2c, tps65910_i2c_id);
  463. static struct i2c_driver tps65910_i2c_driver = {
  464. .driver = {
  465. .name = "tps65910",
  466. .of_match_table = of_match_ptr(tps65910_of_match),
  467. },
  468. .probe = tps65910_i2c_probe,
  469. .id_table = tps65910_i2c_id,
  470. };
  471. static int __init tps65910_i2c_init(void)
  472. {
  473. return i2c_add_driver(&tps65910_i2c_driver);
  474. }
  475. /* init early so consumer devices can complete system boot */
  476. subsys_initcall(tps65910_i2c_init);
  477. static void __exit tps65910_i2c_exit(void)
  478. {
  479. i2c_del_driver(&tps65910_i2c_driver);
  480. }
  481. module_exit(tps65910_i2c_exit);
  482. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  483. MODULE_AUTHOR("Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>");
  484. MODULE_DESCRIPTION("TPS6591x chip family multi-function driver");
  485. MODULE_LICENSE("GPL");