da9063-irq.c 4.6 KB

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  1. /* da9063-irq.c: Interrupts support for Dialog DA9063
  2. *
  3. * Copyright 2012 Dialog Semiconductor Ltd.
  4. * Copyright 2013 Philipp Zabel, Pengutronix
  5. *
  6. * Author: Michal Hajduk, Dialog Semiconductor
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/irq.h>
  17. #include <linux/mfd/core.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/regmap.h>
  20. #include <linux/mfd/da9063/core.h>
  21. #include <linux/mfd/da9063/pdata.h>
  22. #define DA9063_REG_EVENT_A_OFFSET 0
  23. #define DA9063_REG_EVENT_B_OFFSET 1
  24. #define DA9063_REG_EVENT_C_OFFSET 2
  25. #define DA9063_REG_EVENT_D_OFFSET 3
  26. static const struct regmap_irq da9063_irqs[] = {
  27. /* DA9063 event A register */
  28. [DA9063_IRQ_ONKEY] = {
  29. .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  30. .mask = DA9063_M_ONKEY,
  31. },
  32. [DA9063_IRQ_ALARM] = {
  33. .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  34. .mask = DA9063_M_ALARM,
  35. },
  36. [DA9063_IRQ_TICK] = {
  37. .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  38. .mask = DA9063_M_TICK,
  39. },
  40. [DA9063_IRQ_ADC_RDY] = {
  41. .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  42. .mask = DA9063_M_ADC_RDY,
  43. },
  44. [DA9063_IRQ_SEQ_RDY] = {
  45. .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  46. .mask = DA9063_M_SEQ_RDY,
  47. },
  48. /* DA9063 event B register */
  49. [DA9063_IRQ_WAKE] = {
  50. .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  51. .mask = DA9063_M_WAKE,
  52. },
  53. [DA9063_IRQ_TEMP] = {
  54. .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  55. .mask = DA9063_M_TEMP,
  56. },
  57. [DA9063_IRQ_COMP_1V2] = {
  58. .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  59. .mask = DA9063_M_COMP_1V2,
  60. },
  61. [DA9063_IRQ_LDO_LIM] = {
  62. .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  63. .mask = DA9063_M_LDO_LIM,
  64. },
  65. [DA9063_IRQ_REG_UVOV] = {
  66. .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  67. .mask = DA9063_M_UVOV,
  68. },
  69. [DA9063_IRQ_DVC_RDY] = {
  70. .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  71. .mask = DA9063_M_DVC_RDY,
  72. },
  73. [DA9063_IRQ_VDD_MON] = {
  74. .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  75. .mask = DA9063_M_VDD_MON,
  76. },
  77. [DA9063_IRQ_WARN] = {
  78. .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  79. .mask = DA9063_M_VDD_WARN,
  80. },
  81. /* DA9063 event C register */
  82. [DA9063_IRQ_GPI0] = {
  83. .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  84. .mask = DA9063_M_GPI0,
  85. },
  86. [DA9063_IRQ_GPI1] = {
  87. .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  88. .mask = DA9063_M_GPI1,
  89. },
  90. [DA9063_IRQ_GPI2] = {
  91. .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  92. .mask = DA9063_M_GPI2,
  93. },
  94. [DA9063_IRQ_GPI3] = {
  95. .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  96. .mask = DA9063_M_GPI3,
  97. },
  98. [DA9063_IRQ_GPI4] = {
  99. .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  100. .mask = DA9063_M_GPI4,
  101. },
  102. [DA9063_IRQ_GPI5] = {
  103. .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  104. .mask = DA9063_M_GPI5,
  105. },
  106. [DA9063_IRQ_GPI6] = {
  107. .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  108. .mask = DA9063_M_GPI6,
  109. },
  110. [DA9063_IRQ_GPI7] = {
  111. .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  112. .mask = DA9063_M_GPI7,
  113. },
  114. /* DA9063 event D register */
  115. [DA9063_IRQ_GPI8] = {
  116. .reg_offset = DA9063_REG_EVENT_D_OFFSET,
  117. .mask = DA9063_M_GPI8,
  118. },
  119. [DA9063_IRQ_GPI9] = {
  120. .reg_offset = DA9063_REG_EVENT_D_OFFSET,
  121. .mask = DA9063_M_GPI9,
  122. },
  123. [DA9063_IRQ_GPI10] = {
  124. .reg_offset = DA9063_REG_EVENT_D_OFFSET,
  125. .mask = DA9063_M_GPI10,
  126. },
  127. [DA9063_IRQ_GPI11] = {
  128. .reg_offset = DA9063_REG_EVENT_D_OFFSET,
  129. .mask = DA9063_M_GPI11,
  130. },
  131. [DA9063_IRQ_GPI12] = {
  132. .reg_offset = DA9063_REG_EVENT_D_OFFSET,
  133. .mask = DA9063_M_GPI12,
  134. },
  135. [DA9063_IRQ_GPI13] = {
  136. .reg_offset = DA9063_REG_EVENT_D_OFFSET,
  137. .mask = DA9063_M_GPI13,
  138. },
  139. [DA9063_IRQ_GPI14] = {
  140. .reg_offset = DA9063_REG_EVENT_D_OFFSET,
  141. .mask = DA9063_M_GPI14,
  142. },
  143. [DA9063_IRQ_GPI15] = {
  144. .reg_offset = DA9063_REG_EVENT_D_OFFSET,
  145. .mask = DA9063_M_GPI15,
  146. },
  147. };
  148. static const struct regmap_irq_chip da9063_irq_chip = {
  149. .name = "da9063-irq",
  150. .irqs = da9063_irqs,
  151. .num_irqs = DA9063_NUM_IRQ,
  152. .num_regs = 4,
  153. .status_base = DA9063_REG_EVENT_A,
  154. .mask_base = DA9063_REG_IRQ_MASK_A,
  155. .ack_base = DA9063_REG_EVENT_A,
  156. .init_ack_masked = true,
  157. };
  158. int da9063_irq_init(struct da9063 *da9063)
  159. {
  160. int ret;
  161. if (!da9063->chip_irq) {
  162. dev_err(da9063->dev, "No IRQ configured\n");
  163. return -EINVAL;
  164. }
  165. ret = regmap_add_irq_chip(da9063->regmap, da9063->chip_irq,
  166. IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,
  167. da9063->irq_base, &da9063_irq_chip,
  168. &da9063->regmap_irq);
  169. if (ret) {
  170. dev_err(da9063->dev, "Failed to reguest IRQ %d: %d\n",
  171. da9063->chip_irq, ret);
  172. return ret;
  173. }
  174. return 0;
  175. }
  176. void da9063_irq_exit(struct da9063 *da9063)
  177. {
  178. regmap_del_irq_chip(da9063->chip_irq, da9063->regmap_irq);
  179. }