ab3100-core.c 22 KB

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  1. /*
  2. * Copyright (C) 2007-2010 ST-Ericsson
  3. * License terms: GNU General Public License (GPL) version 2
  4. * Low-level core for exclusive access to the AB3100 IC on the I2C bus
  5. * and some basic chip-configuration.
  6. * Author: Linus Walleij <linus.walleij@stericsson.com>
  7. */
  8. #include <linux/i2c.h>
  9. #include <linux/mutex.h>
  10. #include <linux/list.h>
  11. #include <linux/notifier.h>
  12. #include <linux/slab.h>
  13. #include <linux/err.h>
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/random.h>
  19. #include <linux/debugfs.h>
  20. #include <linux/seq_file.h>
  21. #include <linux/uaccess.h>
  22. #include <linux/mfd/core.h>
  23. #include <linux/mfd/ab3100.h>
  24. #include <linux/mfd/abx500.h>
  25. /* These are the only registers inside AB3100 used in this main file */
  26. /* Interrupt event registers */
  27. #define AB3100_EVENTA1 0x21
  28. #define AB3100_EVENTA2 0x22
  29. #define AB3100_EVENTA3 0x23
  30. /* AB3100 DAC converter registers */
  31. #define AB3100_DIS 0x00
  32. #define AB3100_D0C 0x01
  33. #define AB3100_D1C 0x02
  34. #define AB3100_D2C 0x03
  35. #define AB3100_D3C 0x04
  36. /* Chip ID register */
  37. #define AB3100_CID 0x20
  38. /* AB3100 interrupt registers */
  39. #define AB3100_IMRA1 0x24
  40. #define AB3100_IMRA2 0x25
  41. #define AB3100_IMRA3 0x26
  42. #define AB3100_IMRB1 0x2B
  43. #define AB3100_IMRB2 0x2C
  44. #define AB3100_IMRB3 0x2D
  45. /* System Power Monitoring and control registers */
  46. #define AB3100_MCA 0x2E
  47. #define AB3100_MCB 0x2F
  48. /* SIM power up */
  49. #define AB3100_SUP 0x50
  50. /*
  51. * I2C communication
  52. *
  53. * The AB3100 is usually assigned address 0x48 (7-bit)
  54. * The chip is defined in the platform i2c_board_data section.
  55. */
  56. static int ab3100_get_chip_id(struct device *dev)
  57. {
  58. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  59. return (int)ab3100->chip_id;
  60. }
  61. static int ab3100_set_register_interruptible(struct ab3100 *ab3100,
  62. u8 reg, u8 regval)
  63. {
  64. u8 regandval[2] = {reg, regval};
  65. int err;
  66. err = mutex_lock_interruptible(&ab3100->access_mutex);
  67. if (err)
  68. return err;
  69. /*
  70. * A two-byte write message with the first byte containing the register
  71. * number and the second byte containing the value to be written
  72. * effectively sets a register in the AB3100.
  73. */
  74. err = i2c_master_send(ab3100->i2c_client, regandval, 2);
  75. if (err < 0) {
  76. dev_err(ab3100->dev,
  77. "write error (write register): %d\n",
  78. err);
  79. } else if (err != 2) {
  80. dev_err(ab3100->dev,
  81. "write error (write register)\n"
  82. " %d bytes transferred (expected 2)\n",
  83. err);
  84. err = -EIO;
  85. } else {
  86. /* All is well */
  87. err = 0;
  88. }
  89. mutex_unlock(&ab3100->access_mutex);
  90. return err;
  91. }
  92. static int set_register_interruptible(struct device *dev,
  93. u8 bank, u8 reg, u8 value)
  94. {
  95. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  96. return ab3100_set_register_interruptible(ab3100, reg, value);
  97. }
  98. /*
  99. * The test registers exist at an I2C bus address up one
  100. * from the ordinary base. They are not supposed to be used
  101. * in production code, but sometimes you have to do that
  102. * anyway. It's currently only used from this file so declare
  103. * it static and do not export.
  104. */
  105. static int ab3100_set_test_register_interruptible(struct ab3100 *ab3100,
  106. u8 reg, u8 regval)
  107. {
  108. u8 regandval[2] = {reg, regval};
  109. int err;
  110. err = mutex_lock_interruptible(&ab3100->access_mutex);
  111. if (err)
  112. return err;
  113. err = i2c_master_send(ab3100->testreg_client, regandval, 2);
  114. if (err < 0) {
  115. dev_err(ab3100->dev,
  116. "write error (write test register): %d\n",
  117. err);
  118. } else if (err != 2) {
  119. dev_err(ab3100->dev,
  120. "write error (write test register)\n"
  121. " %d bytes transferred (expected 2)\n",
  122. err);
  123. err = -EIO;
  124. } else {
  125. /* All is well */
  126. err = 0;
  127. }
  128. mutex_unlock(&ab3100->access_mutex);
  129. return err;
  130. }
  131. static int ab3100_get_register_interruptible(struct ab3100 *ab3100,
  132. u8 reg, u8 *regval)
  133. {
  134. int err;
  135. err = mutex_lock_interruptible(&ab3100->access_mutex);
  136. if (err)
  137. return err;
  138. /*
  139. * AB3100 require an I2C "stop" command between each message, else
  140. * it will not work. The only way of achieveing this with the
  141. * message transport layer is to send the read and write messages
  142. * separately.
  143. */
  144. err = i2c_master_send(ab3100->i2c_client, &reg, 1);
  145. if (err < 0) {
  146. dev_err(ab3100->dev,
  147. "write error (send register address): %d\n",
  148. err);
  149. goto get_reg_out_unlock;
  150. } else if (err != 1) {
  151. dev_err(ab3100->dev,
  152. "write error (send register address)\n"
  153. " %d bytes transferred (expected 1)\n",
  154. err);
  155. err = -EIO;
  156. goto get_reg_out_unlock;
  157. } else {
  158. /* All is well */
  159. err = 0;
  160. }
  161. err = i2c_master_recv(ab3100->i2c_client, regval, 1);
  162. if (err < 0) {
  163. dev_err(ab3100->dev,
  164. "write error (read register): %d\n",
  165. err);
  166. goto get_reg_out_unlock;
  167. } else if (err != 1) {
  168. dev_err(ab3100->dev,
  169. "write error (read register)\n"
  170. " %d bytes transferred (expected 1)\n",
  171. err);
  172. err = -EIO;
  173. goto get_reg_out_unlock;
  174. } else {
  175. /* All is well */
  176. err = 0;
  177. }
  178. get_reg_out_unlock:
  179. mutex_unlock(&ab3100->access_mutex);
  180. return err;
  181. }
  182. static int get_register_interruptible(struct device *dev, u8 bank, u8 reg,
  183. u8 *value)
  184. {
  185. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  186. return ab3100_get_register_interruptible(ab3100, reg, value);
  187. }
  188. static int ab3100_get_register_page_interruptible(struct ab3100 *ab3100,
  189. u8 first_reg, u8 *regvals, u8 numregs)
  190. {
  191. int err;
  192. if (ab3100->chip_id == 0xa0 ||
  193. ab3100->chip_id == 0xa1)
  194. /* These don't support paged reads */
  195. return -EIO;
  196. err = mutex_lock_interruptible(&ab3100->access_mutex);
  197. if (err)
  198. return err;
  199. /*
  200. * Paged read also require an I2C "stop" command.
  201. */
  202. err = i2c_master_send(ab3100->i2c_client, &first_reg, 1);
  203. if (err < 0) {
  204. dev_err(ab3100->dev,
  205. "write error (send first register address): %d\n",
  206. err);
  207. goto get_reg_page_out_unlock;
  208. } else if (err != 1) {
  209. dev_err(ab3100->dev,
  210. "write error (send first register address)\n"
  211. " %d bytes transferred (expected 1)\n",
  212. err);
  213. err = -EIO;
  214. goto get_reg_page_out_unlock;
  215. }
  216. err = i2c_master_recv(ab3100->i2c_client, regvals, numregs);
  217. if (err < 0) {
  218. dev_err(ab3100->dev,
  219. "write error (read register page): %d\n",
  220. err);
  221. goto get_reg_page_out_unlock;
  222. } else if (err != numregs) {
  223. dev_err(ab3100->dev,
  224. "write error (read register page)\n"
  225. " %d bytes transferred (expected %d)\n",
  226. err, numregs);
  227. err = -EIO;
  228. goto get_reg_page_out_unlock;
  229. }
  230. /* All is well */
  231. err = 0;
  232. get_reg_page_out_unlock:
  233. mutex_unlock(&ab3100->access_mutex);
  234. return err;
  235. }
  236. static int get_register_page_interruptible(struct device *dev, u8 bank,
  237. u8 first_reg, u8 *regvals, u8 numregs)
  238. {
  239. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  240. return ab3100_get_register_page_interruptible(ab3100,
  241. first_reg, regvals, numregs);
  242. }
  243. static int ab3100_mask_and_set_register_interruptible(struct ab3100 *ab3100,
  244. u8 reg, u8 andmask, u8 ormask)
  245. {
  246. u8 regandval[2] = {reg, 0};
  247. int err;
  248. err = mutex_lock_interruptible(&ab3100->access_mutex);
  249. if (err)
  250. return err;
  251. /* First read out the target register */
  252. err = i2c_master_send(ab3100->i2c_client, &reg, 1);
  253. if (err < 0) {
  254. dev_err(ab3100->dev,
  255. "write error (maskset send address): %d\n",
  256. err);
  257. goto get_maskset_unlock;
  258. } else if (err != 1) {
  259. dev_err(ab3100->dev,
  260. "write error (maskset send address)\n"
  261. " %d bytes transferred (expected 1)\n",
  262. err);
  263. err = -EIO;
  264. goto get_maskset_unlock;
  265. }
  266. err = i2c_master_recv(ab3100->i2c_client, &regandval[1], 1);
  267. if (err < 0) {
  268. dev_err(ab3100->dev,
  269. "write error (maskset read register): %d\n",
  270. err);
  271. goto get_maskset_unlock;
  272. } else if (err != 1) {
  273. dev_err(ab3100->dev,
  274. "write error (maskset read register)\n"
  275. " %d bytes transferred (expected 1)\n",
  276. err);
  277. err = -EIO;
  278. goto get_maskset_unlock;
  279. }
  280. /* Modify the register */
  281. regandval[1] &= andmask;
  282. regandval[1] |= ormask;
  283. /* Write the register */
  284. err = i2c_master_send(ab3100->i2c_client, regandval, 2);
  285. if (err < 0) {
  286. dev_err(ab3100->dev,
  287. "write error (write register): %d\n",
  288. err);
  289. goto get_maskset_unlock;
  290. } else if (err != 2) {
  291. dev_err(ab3100->dev,
  292. "write error (write register)\n"
  293. " %d bytes transferred (expected 2)\n",
  294. err);
  295. err = -EIO;
  296. goto get_maskset_unlock;
  297. }
  298. /* All is well */
  299. err = 0;
  300. get_maskset_unlock:
  301. mutex_unlock(&ab3100->access_mutex);
  302. return err;
  303. }
  304. static int mask_and_set_register_interruptible(struct device *dev, u8 bank,
  305. u8 reg, u8 bitmask, u8 bitvalues)
  306. {
  307. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  308. return ab3100_mask_and_set_register_interruptible(ab3100,
  309. reg, bitmask, (bitmask & bitvalues));
  310. }
  311. /*
  312. * Register a simple callback for handling any AB3100 events.
  313. */
  314. int ab3100_event_register(struct ab3100 *ab3100,
  315. struct notifier_block *nb)
  316. {
  317. return blocking_notifier_chain_register(&ab3100->event_subscribers,
  318. nb);
  319. }
  320. EXPORT_SYMBOL(ab3100_event_register);
  321. /*
  322. * Remove a previously registered callback.
  323. */
  324. int ab3100_event_unregister(struct ab3100 *ab3100,
  325. struct notifier_block *nb)
  326. {
  327. return blocking_notifier_chain_unregister(&ab3100->event_subscribers,
  328. nb);
  329. }
  330. EXPORT_SYMBOL(ab3100_event_unregister);
  331. static int ab3100_event_registers_startup_state_get(struct device *dev,
  332. u8 *event)
  333. {
  334. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  335. if (!ab3100->startup_events_read)
  336. return -EAGAIN; /* Try again later */
  337. memcpy(event, ab3100->startup_events, 3);
  338. return 0;
  339. }
  340. static struct abx500_ops ab3100_ops = {
  341. .get_chip_id = ab3100_get_chip_id,
  342. .set_register = set_register_interruptible,
  343. .get_register = get_register_interruptible,
  344. .get_register_page = get_register_page_interruptible,
  345. .set_register_page = NULL,
  346. .mask_and_set_register = mask_and_set_register_interruptible,
  347. .event_registers_startup_state_get =
  348. ab3100_event_registers_startup_state_get,
  349. .startup_irq_enabled = NULL,
  350. };
  351. /*
  352. * This is a threaded interrupt handler so we can make some
  353. * I2C calls etc.
  354. */
  355. static irqreturn_t ab3100_irq_handler(int irq, void *data)
  356. {
  357. struct ab3100 *ab3100 = data;
  358. u8 event_regs[3];
  359. u32 fatevent;
  360. int err;
  361. err = ab3100_get_register_page_interruptible(ab3100, AB3100_EVENTA1,
  362. event_regs, 3);
  363. if (err)
  364. goto err_event;
  365. fatevent = (event_regs[0] << 16) |
  366. (event_regs[1] << 8) |
  367. event_regs[2];
  368. if (!ab3100->startup_events_read) {
  369. ab3100->startup_events[0] = event_regs[0];
  370. ab3100->startup_events[1] = event_regs[1];
  371. ab3100->startup_events[2] = event_regs[2];
  372. ab3100->startup_events_read = true;
  373. }
  374. /*
  375. * The notified parties will have to mask out the events
  376. * they're interested in and react to them. They will be
  377. * notified on all events, then they use the fatevent value
  378. * to determine if they're interested.
  379. */
  380. blocking_notifier_call_chain(&ab3100->event_subscribers,
  381. fatevent, NULL);
  382. dev_dbg(ab3100->dev,
  383. "IRQ Event: 0x%08x\n", fatevent);
  384. return IRQ_HANDLED;
  385. err_event:
  386. dev_dbg(ab3100->dev,
  387. "error reading event status\n");
  388. return IRQ_HANDLED;
  389. }
  390. #ifdef CONFIG_DEBUG_FS
  391. /*
  392. * Some debugfs entries only exposed if we're using debug
  393. */
  394. static int ab3100_registers_print(struct seq_file *s, void *p)
  395. {
  396. struct ab3100 *ab3100 = s->private;
  397. u8 value;
  398. u8 reg;
  399. seq_puts(s, "AB3100 registers:\n");
  400. for (reg = 0; reg < 0xff; reg++) {
  401. ab3100_get_register_interruptible(ab3100, reg, &value);
  402. seq_printf(s, "[0x%x]: 0x%x\n", reg, value);
  403. }
  404. return 0;
  405. }
  406. static int ab3100_registers_open(struct inode *inode, struct file *file)
  407. {
  408. return single_open(file, ab3100_registers_print, inode->i_private);
  409. }
  410. static const struct file_operations ab3100_registers_fops = {
  411. .open = ab3100_registers_open,
  412. .read = seq_read,
  413. .llseek = seq_lseek,
  414. .release = single_release,
  415. .owner = THIS_MODULE,
  416. };
  417. struct ab3100_get_set_reg_priv {
  418. struct ab3100 *ab3100;
  419. bool mode;
  420. };
  421. static ssize_t ab3100_get_set_reg(struct file *file,
  422. const char __user *user_buf,
  423. size_t count, loff_t *ppos)
  424. {
  425. struct ab3100_get_set_reg_priv *priv = file->private_data;
  426. struct ab3100 *ab3100 = priv->ab3100;
  427. char buf[32];
  428. ssize_t buf_size;
  429. int regp;
  430. u8 user_reg;
  431. int err;
  432. int i = 0;
  433. /* Get userspace string and assure termination */
  434. buf_size = min(count, (sizeof(buf)-1));
  435. if (copy_from_user(buf, user_buf, buf_size))
  436. return -EFAULT;
  437. buf[buf_size] = 0;
  438. /*
  439. * The idea is here to parse a string which is either
  440. * "0xnn" for reading a register, or "0xaa 0xbb" for
  441. * writing 0xbb to the register 0xaa. First move past
  442. * whitespace and then begin to parse the register.
  443. */
  444. while ((i < buf_size) && (buf[i] == ' '))
  445. i++;
  446. regp = i;
  447. /*
  448. * Advance pointer to end of string then terminate
  449. * the register string. This is needed to satisfy
  450. * the kstrtou8() function.
  451. */
  452. while ((i < buf_size) && (buf[i] != ' '))
  453. i++;
  454. buf[i] = '\0';
  455. err = kstrtou8(&buf[regp], 16, &user_reg);
  456. if (err)
  457. return err;
  458. /* Either we read or we write a register here */
  459. if (!priv->mode) {
  460. /* Reading */
  461. u8 regvalue;
  462. ab3100_get_register_interruptible(ab3100, user_reg, &regvalue);
  463. dev_info(ab3100->dev,
  464. "debug read AB3100 reg[0x%02x]: 0x%02x\n",
  465. user_reg, regvalue);
  466. } else {
  467. int valp;
  468. u8 user_value;
  469. u8 regvalue;
  470. /*
  471. * Writing, we need some value to write to
  472. * the register so keep parsing the string
  473. * from userspace.
  474. */
  475. i++;
  476. while ((i < buf_size) && (buf[i] == ' '))
  477. i++;
  478. valp = i;
  479. while ((i < buf_size) && (buf[i] != ' '))
  480. i++;
  481. buf[i] = '\0';
  482. err = kstrtou8(&buf[valp], 16, &user_value);
  483. if (err)
  484. return err;
  485. ab3100_set_register_interruptible(ab3100, user_reg, user_value);
  486. ab3100_get_register_interruptible(ab3100, user_reg, &regvalue);
  487. dev_info(ab3100->dev,
  488. "debug write reg[0x%02x]\n"
  489. " with 0x%02x, after readback: 0x%02x\n",
  490. user_reg, user_value, regvalue);
  491. }
  492. return buf_size;
  493. }
  494. static const struct file_operations ab3100_get_set_reg_fops = {
  495. .open = simple_open,
  496. .write = ab3100_get_set_reg,
  497. .llseek = noop_llseek,
  498. };
  499. static struct dentry *ab3100_dir;
  500. static struct dentry *ab3100_reg_file;
  501. static struct ab3100_get_set_reg_priv ab3100_get_priv;
  502. static struct dentry *ab3100_get_reg_file;
  503. static struct ab3100_get_set_reg_priv ab3100_set_priv;
  504. static struct dentry *ab3100_set_reg_file;
  505. static void ab3100_setup_debugfs(struct ab3100 *ab3100)
  506. {
  507. int err;
  508. ab3100_dir = debugfs_create_dir("ab3100", NULL);
  509. if (!ab3100_dir)
  510. goto exit_no_debugfs;
  511. ab3100_reg_file = debugfs_create_file("registers",
  512. S_IRUGO, ab3100_dir, ab3100,
  513. &ab3100_registers_fops);
  514. if (!ab3100_reg_file) {
  515. err = -ENOMEM;
  516. goto exit_destroy_dir;
  517. }
  518. ab3100_get_priv.ab3100 = ab3100;
  519. ab3100_get_priv.mode = false;
  520. ab3100_get_reg_file = debugfs_create_file("get_reg",
  521. S_IWUSR, ab3100_dir, &ab3100_get_priv,
  522. &ab3100_get_set_reg_fops);
  523. if (!ab3100_get_reg_file) {
  524. err = -ENOMEM;
  525. goto exit_destroy_reg;
  526. }
  527. ab3100_set_priv.ab3100 = ab3100;
  528. ab3100_set_priv.mode = true;
  529. ab3100_set_reg_file = debugfs_create_file("set_reg",
  530. S_IWUSR, ab3100_dir, &ab3100_set_priv,
  531. &ab3100_get_set_reg_fops);
  532. if (!ab3100_set_reg_file) {
  533. err = -ENOMEM;
  534. goto exit_destroy_get_reg;
  535. }
  536. return;
  537. exit_destroy_get_reg:
  538. debugfs_remove(ab3100_get_reg_file);
  539. exit_destroy_reg:
  540. debugfs_remove(ab3100_reg_file);
  541. exit_destroy_dir:
  542. debugfs_remove(ab3100_dir);
  543. exit_no_debugfs:
  544. return;
  545. }
  546. static inline void ab3100_remove_debugfs(void)
  547. {
  548. debugfs_remove(ab3100_set_reg_file);
  549. debugfs_remove(ab3100_get_reg_file);
  550. debugfs_remove(ab3100_reg_file);
  551. debugfs_remove(ab3100_dir);
  552. }
  553. #else
  554. static inline void ab3100_setup_debugfs(struct ab3100 *ab3100)
  555. {
  556. }
  557. static inline void ab3100_remove_debugfs(void)
  558. {
  559. }
  560. #endif
  561. /*
  562. * Basic set-up, datastructure creation/destruction and I2C interface.
  563. * This sets up a default config in the AB3100 chip so that it
  564. * will work as expected.
  565. */
  566. struct ab3100_init_setting {
  567. u8 abreg;
  568. u8 setting;
  569. };
  570. static const struct ab3100_init_setting ab3100_init_settings[] = {
  571. {
  572. .abreg = AB3100_MCA,
  573. .setting = 0x01
  574. }, {
  575. .abreg = AB3100_MCB,
  576. .setting = 0x30
  577. }, {
  578. .abreg = AB3100_IMRA1,
  579. .setting = 0x00
  580. }, {
  581. .abreg = AB3100_IMRA2,
  582. .setting = 0xFF
  583. }, {
  584. .abreg = AB3100_IMRA3,
  585. .setting = 0x01
  586. }, {
  587. .abreg = AB3100_IMRB1,
  588. .setting = 0xBF
  589. }, {
  590. .abreg = AB3100_IMRB2,
  591. .setting = 0xFF
  592. }, {
  593. .abreg = AB3100_IMRB3,
  594. .setting = 0xFF
  595. }, {
  596. .abreg = AB3100_SUP,
  597. .setting = 0x00
  598. }, {
  599. .abreg = AB3100_DIS,
  600. .setting = 0xF0
  601. }, {
  602. .abreg = AB3100_D0C,
  603. .setting = 0x00
  604. }, {
  605. .abreg = AB3100_D1C,
  606. .setting = 0x00
  607. }, {
  608. .abreg = AB3100_D2C,
  609. .setting = 0x00
  610. }, {
  611. .abreg = AB3100_D3C,
  612. .setting = 0x00
  613. },
  614. };
  615. static int ab3100_setup(struct ab3100 *ab3100)
  616. {
  617. int err = 0;
  618. int i;
  619. for (i = 0; i < ARRAY_SIZE(ab3100_init_settings); i++) {
  620. err = ab3100_set_register_interruptible(ab3100,
  621. ab3100_init_settings[i].abreg,
  622. ab3100_init_settings[i].setting);
  623. if (err)
  624. goto exit_no_setup;
  625. }
  626. /*
  627. * Special trick to make the AB3100 use the 32kHz clock (RTC)
  628. * bit 3 in test register 0x02 is a special, undocumented test
  629. * register bit that only exist in AB3100 P1E
  630. */
  631. if (ab3100->chip_id == 0xc4) {
  632. dev_warn(ab3100->dev,
  633. "AB3100 P1E variant detected forcing chip to 32KHz\n");
  634. err = ab3100_set_test_register_interruptible(ab3100,
  635. 0x02, 0x08);
  636. }
  637. exit_no_setup:
  638. return err;
  639. }
  640. /* The subdevices of the AB3100 */
  641. static struct mfd_cell ab3100_devs[] = {
  642. {
  643. .name = "ab3100-dac",
  644. .id = -1,
  645. },
  646. {
  647. .name = "ab3100-leds",
  648. .id = -1,
  649. },
  650. {
  651. .name = "ab3100-power",
  652. .id = -1,
  653. },
  654. {
  655. .name = "ab3100-regulators",
  656. .of_compatible = "stericsson,ab3100-regulators",
  657. .id = -1,
  658. },
  659. {
  660. .name = "ab3100-sim",
  661. .id = -1,
  662. },
  663. {
  664. .name = "ab3100-uart",
  665. .id = -1,
  666. },
  667. {
  668. .name = "ab3100-rtc",
  669. .id = -1,
  670. },
  671. {
  672. .name = "ab3100-charger",
  673. .id = -1,
  674. },
  675. {
  676. .name = "ab3100-boost",
  677. .id = -1,
  678. },
  679. {
  680. .name = "ab3100-adc",
  681. .id = -1,
  682. },
  683. {
  684. .name = "ab3100-fuelgauge",
  685. .id = -1,
  686. },
  687. {
  688. .name = "ab3100-vibrator",
  689. .id = -1,
  690. },
  691. {
  692. .name = "ab3100-otp",
  693. .id = -1,
  694. },
  695. {
  696. .name = "ab3100-codec",
  697. .id = -1,
  698. },
  699. };
  700. struct ab_family_id {
  701. u8 id;
  702. char *name;
  703. };
  704. static const struct ab_family_id ids[] = {
  705. /* AB3100 */
  706. {
  707. .id = 0xc0,
  708. .name = "P1A"
  709. }, {
  710. .id = 0xc1,
  711. .name = "P1B"
  712. }, {
  713. .id = 0xc2,
  714. .name = "P1C"
  715. }, {
  716. .id = 0xc3,
  717. .name = "P1D"
  718. }, {
  719. .id = 0xc4,
  720. .name = "P1E"
  721. }, {
  722. .id = 0xc5,
  723. .name = "P1F/R1A"
  724. }, {
  725. .id = 0xc6,
  726. .name = "P1G/R1A"
  727. }, {
  728. .id = 0xc7,
  729. .name = "P2A/R2A"
  730. }, {
  731. .id = 0xc8,
  732. .name = "P2B/R2B"
  733. },
  734. /* AB3000 variants, not supported */
  735. {
  736. .id = 0xa0
  737. }, {
  738. .id = 0xa1
  739. }, {
  740. .id = 0xa2
  741. }, {
  742. .id = 0xa3
  743. }, {
  744. .id = 0xa4
  745. }, {
  746. .id = 0xa5
  747. }, {
  748. .id = 0xa6
  749. }, {
  750. .id = 0xa7
  751. },
  752. /* Terminator */
  753. {
  754. .id = 0x00,
  755. },
  756. };
  757. static int ab3100_probe(struct i2c_client *client,
  758. const struct i2c_device_id *id)
  759. {
  760. struct ab3100 *ab3100;
  761. struct ab3100_platform_data *ab3100_plf_data =
  762. dev_get_platdata(&client->dev);
  763. int err;
  764. int i;
  765. ab3100 = devm_kzalloc(&client->dev, sizeof(struct ab3100), GFP_KERNEL);
  766. if (!ab3100)
  767. return -ENOMEM;
  768. /* Initialize data structure */
  769. mutex_init(&ab3100->access_mutex);
  770. BLOCKING_INIT_NOTIFIER_HEAD(&ab3100->event_subscribers);
  771. ab3100->i2c_client = client;
  772. ab3100->dev = &ab3100->i2c_client->dev;
  773. i2c_set_clientdata(client, ab3100);
  774. /* Read chip ID register */
  775. err = ab3100_get_register_interruptible(ab3100, AB3100_CID,
  776. &ab3100->chip_id);
  777. if (err) {
  778. dev_err(&client->dev,
  779. "failed to communicate with AB3100 chip\n");
  780. goto exit_no_detect;
  781. }
  782. for (i = 0; ids[i].id != 0x0; i++) {
  783. if (ids[i].id == ab3100->chip_id) {
  784. if (ids[i].name)
  785. break;
  786. dev_err(&client->dev, "AB3000 is not supported\n");
  787. goto exit_no_detect;
  788. }
  789. }
  790. snprintf(&ab3100->chip_name[0],
  791. sizeof(ab3100->chip_name) - 1, "AB3100 %s", ids[i].name);
  792. if (ids[i].id == 0x0) {
  793. dev_err(&client->dev, "unknown analog baseband chip id: 0x%x\n",
  794. ab3100->chip_id);
  795. dev_err(&client->dev,
  796. "accepting it anyway. Please update the driver.\n");
  797. goto exit_no_detect;
  798. }
  799. dev_info(&client->dev, "Detected chip: %s\n",
  800. &ab3100->chip_name[0]);
  801. /* Attach a second dummy i2c_client to the test register address */
  802. ab3100->testreg_client = i2c_new_dummy(client->adapter,
  803. client->addr + 1);
  804. if (!ab3100->testreg_client) {
  805. err = -ENOMEM;
  806. goto exit_no_testreg_client;
  807. }
  808. err = ab3100_setup(ab3100);
  809. if (err)
  810. goto exit_no_setup;
  811. err = devm_request_threaded_irq(&client->dev,
  812. client->irq, NULL, ab3100_irq_handler,
  813. IRQF_ONESHOT, "ab3100-core", ab3100);
  814. if (err)
  815. goto exit_no_irq;
  816. err = abx500_register_ops(&client->dev, &ab3100_ops);
  817. if (err)
  818. goto exit_no_ops;
  819. /* Set up and register the platform devices. */
  820. for (i = 0; i < ARRAY_SIZE(ab3100_devs); i++) {
  821. ab3100_devs[i].platform_data = ab3100_plf_data;
  822. ab3100_devs[i].pdata_size = sizeof(struct ab3100_platform_data);
  823. }
  824. err = mfd_add_devices(&client->dev, 0, ab3100_devs,
  825. ARRAY_SIZE(ab3100_devs), NULL, 0, NULL);
  826. ab3100_setup_debugfs(ab3100);
  827. return 0;
  828. exit_no_ops:
  829. exit_no_irq:
  830. exit_no_setup:
  831. i2c_unregister_device(ab3100->testreg_client);
  832. exit_no_testreg_client:
  833. exit_no_detect:
  834. return err;
  835. }
  836. static int ab3100_remove(struct i2c_client *client)
  837. {
  838. struct ab3100 *ab3100 = i2c_get_clientdata(client);
  839. /* Unregister subdevices */
  840. mfd_remove_devices(&client->dev);
  841. ab3100_remove_debugfs();
  842. i2c_unregister_device(ab3100->testreg_client);
  843. return 0;
  844. }
  845. static const struct i2c_device_id ab3100_id[] = {
  846. { "ab3100", 0 },
  847. { }
  848. };
  849. MODULE_DEVICE_TABLE(i2c, ab3100_id);
  850. static struct i2c_driver ab3100_driver = {
  851. .driver = {
  852. .name = "ab3100",
  853. },
  854. .id_table = ab3100_id,
  855. .probe = ab3100_probe,
  856. .remove = ab3100_remove,
  857. };
  858. static int __init ab3100_i2c_init(void)
  859. {
  860. return i2c_add_driver(&ab3100_driver);
  861. }
  862. static void __exit ab3100_i2c_exit(void)
  863. {
  864. i2c_del_driver(&ab3100_driver);
  865. }
  866. subsys_initcall(ab3100_i2c_init);
  867. module_exit(ab3100_i2c_exit);
  868. MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
  869. MODULE_DESCRIPTION("AB3100 core driver");
  870. MODULE_LICENSE("GPL");