upd64031a.c 6.8 KB

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  1. /*
  2. * upd64031A - NEC Electronics Ghost Reduction for NTSC in Japan
  3. *
  4. * 2003 by T.Adachi <tadachi@tadachi-net.com>
  5. * 2003 by Takeru KOMORIYA <komoriya@paken.org>
  6. * 2006 by Hans Verkuil <hverkuil@xs4all.nl>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/module.h>
  23. #include <linux/kernel.h>
  24. #include <linux/i2c.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/slab.h>
  27. #include <media/v4l2-device.h>
  28. #include <media/i2c/upd64031a.h>
  29. /* --------------------- read registers functions define -------------------- */
  30. /* bit masks */
  31. #define GR_MODE_MASK 0xc0
  32. #define DIRECT_3DYCS_CONNECT_MASK 0xc0
  33. #define SYNC_CIRCUIT_MASK 0xa0
  34. /* -------------------------------------------------------------------------- */
  35. MODULE_DESCRIPTION("uPD64031A driver");
  36. MODULE_AUTHOR("T. Adachi, Takeru KOMORIYA, Hans Verkuil");
  37. MODULE_LICENSE("GPL");
  38. static int debug;
  39. module_param(debug, int, 0644);
  40. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  41. enum {
  42. R00 = 0, R01, R02, R03, R04,
  43. R05, R06, R07, R08, R09,
  44. R0A, R0B, R0C, R0D, R0E, R0F,
  45. /* unused registers
  46. R10, R11, R12, R13, R14,
  47. R15, R16, R17,
  48. */
  49. TOT_REGS
  50. };
  51. struct upd64031a_state {
  52. struct v4l2_subdev sd;
  53. u8 regs[TOT_REGS];
  54. u8 gr_mode;
  55. u8 direct_3dycs_connect;
  56. u8 ext_comp_sync;
  57. u8 ext_vert_sync;
  58. };
  59. static inline struct upd64031a_state *to_state(struct v4l2_subdev *sd)
  60. {
  61. return container_of(sd, struct upd64031a_state, sd);
  62. }
  63. static u8 upd64031a_init[] = {
  64. 0x00, 0xb8, 0x48, 0xd2, 0xe6,
  65. 0x03, 0x10, 0x0b, 0xaf, 0x7f,
  66. 0x00, 0x00, 0x1d, 0x5e, 0x00,
  67. 0xd0
  68. };
  69. /* ------------------------------------------------------------------------ */
  70. static u8 upd64031a_read(struct v4l2_subdev *sd, u8 reg)
  71. {
  72. struct i2c_client *client = v4l2_get_subdevdata(sd);
  73. u8 buf[2];
  74. if (reg >= sizeof(buf))
  75. return 0xff;
  76. i2c_master_recv(client, buf, 2);
  77. return buf[reg];
  78. }
  79. /* ------------------------------------------------------------------------ */
  80. static void upd64031a_write(struct v4l2_subdev *sd, u8 reg, u8 val)
  81. {
  82. struct i2c_client *client = v4l2_get_subdevdata(sd);
  83. u8 buf[2];
  84. buf[0] = reg;
  85. buf[1] = val;
  86. v4l2_dbg(1, debug, sd, "write reg: %02X val: %02X\n", reg, val);
  87. if (i2c_master_send(client, buf, 2) != 2)
  88. v4l2_err(sd, "I/O error write 0x%02x/0x%02x\n", reg, val);
  89. }
  90. /* ------------------------------------------------------------------------ */
  91. /* The input changed due to new input or channel changed */
  92. static int upd64031a_s_frequency(struct v4l2_subdev *sd, const struct v4l2_frequency *freq)
  93. {
  94. struct upd64031a_state *state = to_state(sd);
  95. u8 reg = state->regs[R00];
  96. v4l2_dbg(1, debug, sd, "changed input or channel\n");
  97. upd64031a_write(sd, R00, reg | 0x10);
  98. upd64031a_write(sd, R00, reg & ~0x10);
  99. return 0;
  100. }
  101. /* ------------------------------------------------------------------------ */
  102. static int upd64031a_s_routing(struct v4l2_subdev *sd,
  103. u32 input, u32 output, u32 config)
  104. {
  105. struct upd64031a_state *state = to_state(sd);
  106. u8 r00, r05, r08;
  107. state->gr_mode = (input & 3) << 6;
  108. state->direct_3dycs_connect = (input & 0xc) << 4;
  109. state->ext_comp_sync =
  110. (input & UPD64031A_COMPOSITE_EXTERNAL) << 1;
  111. state->ext_vert_sync =
  112. (input & UPD64031A_VERTICAL_EXTERNAL) << 2;
  113. r00 = (state->regs[R00] & ~GR_MODE_MASK) | state->gr_mode;
  114. r05 = (state->regs[R00] & ~SYNC_CIRCUIT_MASK) |
  115. state->ext_comp_sync | state->ext_vert_sync;
  116. r08 = (state->regs[R08] & ~DIRECT_3DYCS_CONNECT_MASK) |
  117. state->direct_3dycs_connect;
  118. upd64031a_write(sd, R00, r00);
  119. upd64031a_write(sd, R05, r05);
  120. upd64031a_write(sd, R08, r08);
  121. return upd64031a_s_frequency(sd, NULL);
  122. }
  123. static int upd64031a_log_status(struct v4l2_subdev *sd)
  124. {
  125. v4l2_info(sd, "Status: SA00=0x%02x SA01=0x%02x\n",
  126. upd64031a_read(sd, 0), upd64031a_read(sd, 1));
  127. return 0;
  128. }
  129. #ifdef CONFIG_VIDEO_ADV_DEBUG
  130. static int upd64031a_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
  131. {
  132. reg->val = upd64031a_read(sd, reg->reg & 0xff);
  133. reg->size = 1;
  134. return 0;
  135. }
  136. static int upd64031a_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
  137. {
  138. upd64031a_write(sd, reg->reg & 0xff, reg->val & 0xff);
  139. return 0;
  140. }
  141. #endif
  142. /* ----------------------------------------------------------------------- */
  143. static const struct v4l2_subdev_core_ops upd64031a_core_ops = {
  144. .log_status = upd64031a_log_status,
  145. #ifdef CONFIG_VIDEO_ADV_DEBUG
  146. .g_register = upd64031a_g_register,
  147. .s_register = upd64031a_s_register,
  148. #endif
  149. };
  150. static const struct v4l2_subdev_tuner_ops upd64031a_tuner_ops = {
  151. .s_frequency = upd64031a_s_frequency,
  152. };
  153. static const struct v4l2_subdev_video_ops upd64031a_video_ops = {
  154. .s_routing = upd64031a_s_routing,
  155. };
  156. static const struct v4l2_subdev_ops upd64031a_ops = {
  157. .core = &upd64031a_core_ops,
  158. .tuner = &upd64031a_tuner_ops,
  159. .video = &upd64031a_video_ops,
  160. };
  161. /* ------------------------------------------------------------------------ */
  162. /* i2c implementation */
  163. static int upd64031a_probe(struct i2c_client *client,
  164. const struct i2c_device_id *id)
  165. {
  166. struct upd64031a_state *state;
  167. struct v4l2_subdev *sd;
  168. int i;
  169. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  170. return -EIO;
  171. v4l_info(client, "chip found @ 0x%x (%s)\n",
  172. client->addr << 1, client->adapter->name);
  173. state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
  174. if (state == NULL)
  175. return -ENOMEM;
  176. sd = &state->sd;
  177. v4l2_i2c_subdev_init(sd, client, &upd64031a_ops);
  178. memcpy(state->regs, upd64031a_init, sizeof(state->regs));
  179. state->gr_mode = UPD64031A_GR_ON << 6;
  180. state->direct_3dycs_connect = UPD64031A_3DYCS_COMPOSITE << 4;
  181. state->ext_comp_sync = state->ext_vert_sync = 0;
  182. for (i = 0; i < TOT_REGS; i++)
  183. upd64031a_write(sd, i, state->regs[i]);
  184. return 0;
  185. }
  186. static int upd64031a_remove(struct i2c_client *client)
  187. {
  188. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  189. v4l2_device_unregister_subdev(sd);
  190. return 0;
  191. }
  192. /* ----------------------------------------------------------------------- */
  193. static const struct i2c_device_id upd64031a_id[] = {
  194. { "upd64031a", 0 },
  195. { }
  196. };
  197. MODULE_DEVICE_TABLE(i2c, upd64031a_id);
  198. static struct i2c_driver upd64031a_driver = {
  199. .driver = {
  200. .name = "upd64031a",
  201. },
  202. .probe = upd64031a_probe,
  203. .remove = upd64031a_remove,
  204. .id_table = upd64031a_id,
  205. };
  206. module_i2c_driver(upd64031a_driver);