hil_mlc.c 25 KB

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  1. /*
  2. * HIL MLC state machine and serio interface driver
  3. *
  4. * Copyright (c) 2001 Brian S. Julin
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. The name of the author may not be used to endorse or promote products
  14. * derived from this software without specific prior written permission.
  15. *
  16. * Alternatively, this software may be distributed under the terms of the
  17. * GNU General Public License ("GPL").
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28. *
  29. * References:
  30. * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
  31. *
  32. *
  33. * Driver theory of operation:
  34. *
  35. * Some access methods and an ISR is defined by the sub-driver
  36. * (e.g. hp_sdc_mlc.c). These methods are expected to provide a
  37. * few bits of logic in addition to raw access to the HIL MLC,
  38. * specifically, the ISR, which is entirely registered by the
  39. * sub-driver and invoked directly, must check for record
  40. * termination or packet match, at which point a semaphore must
  41. * be cleared and then the hil_mlcs_tasklet must be scheduled.
  42. *
  43. * The hil_mlcs_tasklet processes the state machine for all MLCs
  44. * each time it runs, checking each MLC's progress at the current
  45. * node in the state machine, and moving the MLC to subsequent nodes
  46. * in the state machine when appropriate. It will reschedule
  47. * itself if output is pending. (This rescheduling should be replaced
  48. * at some point with a sub-driver-specific mechanism.)
  49. *
  50. * A timer task prods the tasklet once per second to prevent
  51. * hangups when attached devices do not return expected data
  52. * and to initiate probes of the loop for new devices.
  53. */
  54. #include <linux/hil_mlc.h>
  55. #include <linux/errno.h>
  56. #include <linux/kernel.h>
  57. #include <linux/module.h>
  58. #include <linux/init.h>
  59. #include <linux/interrupt.h>
  60. #include <linux/slab.h>
  61. #include <linux/timer.h>
  62. #include <linux/list.h>
  63. MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
  64. MODULE_DESCRIPTION("HIL MLC serio");
  65. MODULE_LICENSE("Dual BSD/GPL");
  66. EXPORT_SYMBOL(hil_mlc_register);
  67. EXPORT_SYMBOL(hil_mlc_unregister);
  68. #define PREFIX "HIL MLC: "
  69. static LIST_HEAD(hil_mlcs);
  70. static DEFINE_RWLOCK(hil_mlcs_lock);
  71. static struct timer_list hil_mlcs_kicker;
  72. static int hil_mlcs_probe;
  73. static void hil_mlcs_process(unsigned long unused);
  74. static DECLARE_TASKLET_DISABLED(hil_mlcs_tasklet, hil_mlcs_process, 0);
  75. /* #define HIL_MLC_DEBUG */
  76. /********************** Device info/instance management **********************/
  77. static void hil_mlc_clear_di_map(hil_mlc *mlc, int val)
  78. {
  79. int j;
  80. for (j = val; j < 7 ; j++)
  81. mlc->di_map[j] = -1;
  82. }
  83. static void hil_mlc_clear_di_scratch(hil_mlc *mlc)
  84. {
  85. memset(&mlc->di_scratch, 0, sizeof(mlc->di_scratch));
  86. }
  87. static void hil_mlc_copy_di_scratch(hil_mlc *mlc, int idx)
  88. {
  89. memcpy(&mlc->di[idx], &mlc->di_scratch, sizeof(mlc->di_scratch));
  90. }
  91. static int hil_mlc_match_di_scratch(hil_mlc *mlc)
  92. {
  93. int idx;
  94. for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
  95. int j, found = 0;
  96. /* In-use slots are not eligible. */
  97. for (j = 0; j < 7 ; j++)
  98. if (mlc->di_map[j] == idx)
  99. found++;
  100. if (found)
  101. continue;
  102. if (!memcmp(mlc->di + idx, &mlc->di_scratch,
  103. sizeof(mlc->di_scratch)))
  104. break;
  105. }
  106. return idx >= HIL_MLC_DEVMEM ? -1 : idx;
  107. }
  108. static int hil_mlc_find_free_di(hil_mlc *mlc)
  109. {
  110. int idx;
  111. /* TODO: Pick all-zero slots first, failing that,
  112. * randomize the slot picked among those eligible.
  113. */
  114. for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
  115. int j, found = 0;
  116. for (j = 0; j < 7 ; j++)
  117. if (mlc->di_map[j] == idx)
  118. found++;
  119. if (!found)
  120. break;
  121. }
  122. return idx; /* Note: It is guaranteed at least one above will match */
  123. }
  124. static inline void hil_mlc_clean_serio_map(hil_mlc *mlc)
  125. {
  126. int idx;
  127. for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
  128. int j, found = 0;
  129. for (j = 0; j < 7 ; j++)
  130. if (mlc->di_map[j] == idx)
  131. found++;
  132. if (!found)
  133. mlc->serio_map[idx].di_revmap = -1;
  134. }
  135. }
  136. static void hil_mlc_send_polls(hil_mlc *mlc)
  137. {
  138. int did, i, cnt;
  139. struct serio *serio;
  140. struct serio_driver *drv;
  141. i = cnt = 0;
  142. did = (mlc->ipacket[0] & HIL_PKT_ADDR_MASK) >> 8;
  143. serio = did ? mlc->serio[mlc->di_map[did - 1]] : NULL;
  144. drv = (serio != NULL) ? serio->drv : NULL;
  145. while (mlc->icount < 15 - i) {
  146. hil_packet p;
  147. p = mlc->ipacket[i];
  148. if (did != (p & HIL_PKT_ADDR_MASK) >> 8) {
  149. if (drv && drv->interrupt) {
  150. drv->interrupt(serio, 0, 0);
  151. drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
  152. drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
  153. drv->interrupt(serio, HIL_CMD_POL + cnt, 0);
  154. }
  155. did = (p & HIL_PKT_ADDR_MASK) >> 8;
  156. serio = did ? mlc->serio[mlc->di_map[did-1]] : NULL;
  157. drv = (serio != NULL) ? serio->drv : NULL;
  158. cnt = 0;
  159. }
  160. cnt++;
  161. i++;
  162. if (drv && drv->interrupt) {
  163. drv->interrupt(serio, (p >> 24), 0);
  164. drv->interrupt(serio, (p >> 16) & 0xff, 0);
  165. drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0);
  166. drv->interrupt(serio, p & 0xff, 0);
  167. }
  168. }
  169. }
  170. /*************************** State engine *********************************/
  171. #define HILSEN_SCHED 0x000100 /* Schedule the tasklet */
  172. #define HILSEN_BREAK 0x000200 /* Wait until next pass */
  173. #define HILSEN_UP 0x000400 /* relative node#, decrement */
  174. #define HILSEN_DOWN 0x000800 /* relative node#, increment */
  175. #define HILSEN_FOLLOW 0x001000 /* use retval as next node# */
  176. #define HILSEN_MASK 0x0000ff
  177. #define HILSEN_START 0
  178. #define HILSEN_RESTART 1
  179. #define HILSEN_DHR 9
  180. #define HILSEN_DHR2 10
  181. #define HILSEN_IFC 14
  182. #define HILSEN_HEAL0 16
  183. #define HILSEN_HEAL 18
  184. #define HILSEN_ACF 21
  185. #define HILSEN_ACF2 22
  186. #define HILSEN_DISC0 25
  187. #define HILSEN_DISC 27
  188. #define HILSEN_MATCH 40
  189. #define HILSEN_OPERATE 41
  190. #define HILSEN_PROBE 44
  191. #define HILSEN_DSR 52
  192. #define HILSEN_REPOLL 55
  193. #define HILSEN_IFCACF 58
  194. #define HILSEN_END 60
  195. #define HILSEN_NEXT (HILSEN_DOWN | 1)
  196. #define HILSEN_SAME (HILSEN_DOWN | 0)
  197. #define HILSEN_LAST (HILSEN_UP | 1)
  198. #define HILSEN_DOZE (HILSEN_SAME | HILSEN_SCHED | HILSEN_BREAK)
  199. #define HILSEN_SLEEP (HILSEN_SAME | HILSEN_BREAK)
  200. static int hilse_match(hil_mlc *mlc, int unused)
  201. {
  202. int rc;
  203. rc = hil_mlc_match_di_scratch(mlc);
  204. if (rc == -1) {
  205. rc = hil_mlc_find_free_di(mlc);
  206. if (rc == -1)
  207. goto err;
  208. #ifdef HIL_MLC_DEBUG
  209. printk(KERN_DEBUG PREFIX "new in slot %i\n", rc);
  210. #endif
  211. hil_mlc_copy_di_scratch(mlc, rc);
  212. mlc->di_map[mlc->ddi] = rc;
  213. mlc->serio_map[rc].di_revmap = mlc->ddi;
  214. hil_mlc_clean_serio_map(mlc);
  215. serio_rescan(mlc->serio[rc]);
  216. return -1;
  217. }
  218. mlc->di_map[mlc->ddi] = rc;
  219. #ifdef HIL_MLC_DEBUG
  220. printk(KERN_DEBUG PREFIX "same in slot %i\n", rc);
  221. #endif
  222. mlc->serio_map[rc].di_revmap = mlc->ddi;
  223. hil_mlc_clean_serio_map(mlc);
  224. return 0;
  225. err:
  226. printk(KERN_ERR PREFIX "Residual device slots exhausted, close some serios!\n");
  227. return 1;
  228. }
  229. /* An LCV used to prevent runaway loops, forces 5 second sleep when reset. */
  230. static int hilse_init_lcv(hil_mlc *mlc, int unused)
  231. {
  232. struct timeval tv;
  233. do_gettimeofday(&tv);
  234. if (mlc->lcv && (tv.tv_sec - mlc->lcv_tv.tv_sec) < 5)
  235. return -1;
  236. mlc->lcv_tv = tv;
  237. mlc->lcv = 0;
  238. return 0;
  239. }
  240. static int hilse_inc_lcv(hil_mlc *mlc, int lim)
  241. {
  242. return mlc->lcv++ >= lim ? -1 : 0;
  243. }
  244. #if 0
  245. static int hilse_set_lcv(hil_mlc *mlc, int val)
  246. {
  247. mlc->lcv = val;
  248. return 0;
  249. }
  250. #endif
  251. /* Management of the discovered device index (zero based, -1 means no devs) */
  252. static int hilse_set_ddi(hil_mlc *mlc, int val)
  253. {
  254. mlc->ddi = val;
  255. hil_mlc_clear_di_map(mlc, val + 1);
  256. return 0;
  257. }
  258. static int hilse_dec_ddi(hil_mlc *mlc, int unused)
  259. {
  260. mlc->ddi--;
  261. if (mlc->ddi <= -1) {
  262. mlc->ddi = -1;
  263. hil_mlc_clear_di_map(mlc, 0);
  264. return -1;
  265. }
  266. hil_mlc_clear_di_map(mlc, mlc->ddi + 1);
  267. return 0;
  268. }
  269. static int hilse_inc_ddi(hil_mlc *mlc, int unused)
  270. {
  271. BUG_ON(mlc->ddi >= 6);
  272. mlc->ddi++;
  273. return 0;
  274. }
  275. static int hilse_take_idd(hil_mlc *mlc, int unused)
  276. {
  277. int i;
  278. /* Help the state engine:
  279. * Is this a real IDD response or just an echo?
  280. *
  281. * Real IDD response does not start with a command.
  282. */
  283. if (mlc->ipacket[0] & HIL_PKT_CMD)
  284. goto bail;
  285. /* Should have the command echoed further down. */
  286. for (i = 1; i < 16; i++) {
  287. if (((mlc->ipacket[i] & HIL_PKT_ADDR_MASK) ==
  288. (mlc->ipacket[0] & HIL_PKT_ADDR_MASK)) &&
  289. (mlc->ipacket[i] & HIL_PKT_CMD) &&
  290. ((mlc->ipacket[i] & HIL_PKT_DATA_MASK) == HIL_CMD_IDD))
  291. break;
  292. }
  293. if (i > 15)
  294. goto bail;
  295. /* And the rest of the packets should still be clear. */
  296. while (++i < 16)
  297. if (mlc->ipacket[i])
  298. break;
  299. if (i < 16)
  300. goto bail;
  301. for (i = 0; i < 16; i++)
  302. mlc->di_scratch.idd[i] =
  303. mlc->ipacket[i] & HIL_PKT_DATA_MASK;
  304. /* Next step is to see if RSC supported */
  305. if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_RSC)
  306. return HILSEN_NEXT;
  307. if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
  308. return HILSEN_DOWN | 4;
  309. return 0;
  310. bail:
  311. mlc->ddi--;
  312. return -1; /* This should send us off to ACF */
  313. }
  314. static int hilse_take_rsc(hil_mlc *mlc, int unused)
  315. {
  316. int i;
  317. for (i = 0; i < 16; i++)
  318. mlc->di_scratch.rsc[i] =
  319. mlc->ipacket[i] & HIL_PKT_DATA_MASK;
  320. /* Next step is to see if EXD supported (IDD has already been read) */
  321. if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
  322. return HILSEN_NEXT;
  323. return 0;
  324. }
  325. static int hilse_take_exd(hil_mlc *mlc, int unused)
  326. {
  327. int i;
  328. for (i = 0; i < 16; i++)
  329. mlc->di_scratch.exd[i] =
  330. mlc->ipacket[i] & HIL_PKT_DATA_MASK;
  331. /* Next step is to see if RNM supported. */
  332. if (mlc->di_scratch.exd[0] & HIL_EXD_HEADER_RNM)
  333. return HILSEN_NEXT;
  334. return 0;
  335. }
  336. static int hilse_take_rnm(hil_mlc *mlc, int unused)
  337. {
  338. int i;
  339. for (i = 0; i < 16; i++)
  340. mlc->di_scratch.rnm[i] =
  341. mlc->ipacket[i] & HIL_PKT_DATA_MASK;
  342. printk(KERN_INFO PREFIX "Device name gotten: %16s\n",
  343. mlc->di_scratch.rnm);
  344. return 0;
  345. }
  346. static int hilse_operate(hil_mlc *mlc, int repoll)
  347. {
  348. if (mlc->opercnt == 0)
  349. hil_mlcs_probe = 0;
  350. mlc->opercnt = 1;
  351. hil_mlc_send_polls(mlc);
  352. if (!hil_mlcs_probe)
  353. return 0;
  354. hil_mlcs_probe = 0;
  355. mlc->opercnt = 0;
  356. return 1;
  357. }
  358. #define FUNC(funct, funct_arg, zero_rc, neg_rc, pos_rc) \
  359. { HILSE_FUNC, { .func = funct }, funct_arg, zero_rc, neg_rc, pos_rc },
  360. #define OUT(pack) \
  361. { HILSE_OUT, { .packet = pack }, 0, HILSEN_NEXT, HILSEN_DOZE, 0 },
  362. #define CTS \
  363. { HILSE_CTS, { .packet = 0 }, 0, HILSEN_NEXT | HILSEN_SCHED | HILSEN_BREAK, HILSEN_DOZE, 0 },
  364. #define EXPECT(comp, to, got, got_wrong, timed_out) \
  365. { HILSE_EXPECT, { .packet = comp }, to, got, got_wrong, timed_out },
  366. #define EXPECT_LAST(comp, to, got, got_wrong, timed_out) \
  367. { HILSE_EXPECT_LAST, { .packet = comp }, to, got, got_wrong, timed_out },
  368. #define EXPECT_DISC(comp, to, got, got_wrong, timed_out) \
  369. { HILSE_EXPECT_DISC, { .packet = comp }, to, got, got_wrong, timed_out },
  370. #define IN(to, got, got_error, timed_out) \
  371. { HILSE_IN, { .packet = 0 }, to, got, got_error, timed_out },
  372. #define OUT_DISC(pack) \
  373. { HILSE_OUT_DISC, { .packet = pack }, 0, 0, 0, 0 },
  374. #define OUT_LAST(pack) \
  375. { HILSE_OUT_LAST, { .packet = pack }, 0, 0, 0, 0 },
  376. static const struct hilse_node hil_mlc_se[HILSEN_END] = {
  377. /* 0 HILSEN_START */
  378. FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0)
  379. /* 1 HILSEN_RESTART */
  380. FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
  381. OUT(HIL_CTRL_ONLY) /* Disable APE */
  382. CTS
  383. #define TEST_PACKET(x) \
  384. (HIL_PKT_CMD | (x << HIL_PKT_ADDR_SHIFT) | x << 4 | x)
  385. OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0x5))
  386. EXPECT(HIL_ERR_INT | TEST_PACKET(0x5),
  387. 2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART)
  388. OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0xa))
  389. EXPECT(HIL_ERR_INT | TEST_PACKET(0xa),
  390. 2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART)
  391. OUT(HIL_CTRL_ONLY | 0) /* Disable test mode */
  392. /* 9 HILSEN_DHR */
  393. FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0)
  394. /* 10 HILSEN_DHR2 */
  395. FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
  396. FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0)
  397. OUT(HIL_PKT_CMD | HIL_CMD_DHR)
  398. IN(300000, HILSEN_DHR2, HILSEN_DHR2, HILSEN_NEXT)
  399. /* 14 HILSEN_IFC */
  400. OUT(HIL_PKT_CMD | HIL_CMD_IFC)
  401. EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
  402. 20000, HILSEN_DISC, HILSEN_DHR2, HILSEN_NEXT )
  403. /* If devices are there, they weren't in PUP or other loopback mode.
  404. * We're more concerned at this point with restoring operation
  405. * to devices than discovering new ones, so we try to salvage
  406. * the loop configuration by closing off the loop.
  407. */
  408. /* 16 HILSEN_HEAL0 */
  409. FUNC(hilse_dec_ddi, 0, HILSEN_NEXT, HILSEN_ACF, 0)
  410. FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, 0, 0)
  411. /* 18 HILSEN_HEAL */
  412. OUT_LAST(HIL_CMD_ELB)
  413. EXPECT_LAST(HIL_CMD_ELB | HIL_ERR_INT,
  414. 20000, HILSEN_REPOLL, HILSEN_DSR, HILSEN_NEXT)
  415. FUNC(hilse_dec_ddi, 0, HILSEN_HEAL, HILSEN_NEXT, 0)
  416. /* 21 HILSEN_ACF */
  417. FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_DOZE, 0)
  418. /* 22 HILSEN_ACF2 */
  419. FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
  420. OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
  421. IN(20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
  422. /* 25 HILSEN_DISC0 */
  423. OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
  424. EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_ELB | HIL_ERR_INT,
  425. 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
  426. /* Only enter here if response just received */
  427. /* 27 HILSEN_DISC */
  428. OUT_DISC(HIL_PKT_CMD | HIL_CMD_IDD)
  429. EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_IDD | HIL_ERR_INT,
  430. 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_START)
  431. FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, HILSEN_START, 0)
  432. FUNC(hilse_take_idd, 0, HILSEN_MATCH, HILSEN_IFCACF, HILSEN_FOLLOW)
  433. OUT_LAST(HIL_PKT_CMD | HIL_CMD_RSC)
  434. EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RSC | HIL_ERR_INT,
  435. 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
  436. FUNC(hilse_take_rsc, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW)
  437. OUT_LAST(HIL_PKT_CMD | HIL_CMD_EXD)
  438. EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_EXD | HIL_ERR_INT,
  439. 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
  440. FUNC(hilse_take_exd, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW)
  441. OUT_LAST(HIL_PKT_CMD | HIL_CMD_RNM)
  442. EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RNM | HIL_ERR_INT,
  443. 30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
  444. FUNC(hilse_take_rnm, 0, HILSEN_MATCH, 0, 0)
  445. /* 40 HILSEN_MATCH */
  446. FUNC(hilse_match, 0, HILSEN_NEXT, HILSEN_NEXT, /* TODO */ 0)
  447. /* 41 HILSEN_OPERATE */
  448. OUT(HIL_PKT_CMD | HIL_CMD_POL)
  449. EXPECT(HIL_PKT_CMD | HIL_CMD_POL | HIL_ERR_INT,
  450. 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
  451. FUNC(hilse_operate, 0, HILSEN_OPERATE, HILSEN_IFC, HILSEN_NEXT)
  452. /* 44 HILSEN_PROBE */
  453. OUT_LAST(HIL_PKT_CMD | HIL_CMD_EPT)
  454. IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT)
  455. OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
  456. IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT)
  457. OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
  458. IN(10000, HILSEN_DISC0, HILSEN_DSR, HILSEN_NEXT)
  459. OUT_LAST(HIL_PKT_CMD | HIL_CMD_ELB)
  460. IN(10000, HILSEN_OPERATE, HILSEN_DSR, HILSEN_DSR)
  461. /* 52 HILSEN_DSR */
  462. FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0)
  463. OUT(HIL_PKT_CMD | HIL_CMD_DSR)
  464. IN(20000, HILSEN_DHR, HILSEN_DHR, HILSEN_IFC)
  465. /* 55 HILSEN_REPOLL */
  466. OUT(HIL_PKT_CMD | HIL_CMD_RPL)
  467. EXPECT(HIL_PKT_CMD | HIL_CMD_RPL | HIL_ERR_INT,
  468. 20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
  469. FUNC(hilse_operate, 1, HILSEN_OPERATE, HILSEN_IFC, HILSEN_PROBE)
  470. /* 58 HILSEN_IFCACF */
  471. OUT(HIL_PKT_CMD | HIL_CMD_IFC)
  472. EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
  473. 20000, HILSEN_ACF2, HILSEN_DHR2, HILSEN_HEAL)
  474. /* 60 HILSEN_END */
  475. };
  476. static inline void hilse_setup_input(hil_mlc *mlc, const struct hilse_node *node)
  477. {
  478. switch (node->act) {
  479. case HILSE_EXPECT_DISC:
  480. mlc->imatch = node->object.packet;
  481. mlc->imatch |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
  482. break;
  483. case HILSE_EXPECT_LAST:
  484. mlc->imatch = node->object.packet;
  485. mlc->imatch |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
  486. break;
  487. case HILSE_EXPECT:
  488. mlc->imatch = node->object.packet;
  489. break;
  490. case HILSE_IN:
  491. mlc->imatch = 0;
  492. break;
  493. default:
  494. BUG();
  495. }
  496. mlc->istarted = 1;
  497. mlc->intimeout = node->arg;
  498. do_gettimeofday(&(mlc->instart));
  499. mlc->icount = 15;
  500. memset(mlc->ipacket, 0, 16 * sizeof(hil_packet));
  501. BUG_ON(down_trylock(&mlc->isem));
  502. }
  503. #ifdef HIL_MLC_DEBUG
  504. static int doze;
  505. static int seidx; /* For debug */
  506. #endif
  507. static int hilse_donode(hil_mlc *mlc)
  508. {
  509. const struct hilse_node *node;
  510. int nextidx = 0;
  511. int sched_long = 0;
  512. unsigned long flags;
  513. #ifdef HIL_MLC_DEBUG
  514. if (mlc->seidx && mlc->seidx != seidx &&
  515. mlc->seidx != 41 && mlc->seidx != 42 && mlc->seidx != 43) {
  516. printk(KERN_DEBUG PREFIX "z%i \n {%i}", doze, mlc->seidx);
  517. doze = 0;
  518. }
  519. seidx = mlc->seidx;
  520. #endif
  521. node = hil_mlc_se + mlc->seidx;
  522. switch (node->act) {
  523. int rc;
  524. hil_packet pack;
  525. case HILSE_FUNC:
  526. BUG_ON(node->object.func == NULL);
  527. rc = node->object.func(mlc, node->arg);
  528. nextidx = (rc > 0) ? node->ugly :
  529. ((rc < 0) ? node->bad : node->good);
  530. if (nextidx == HILSEN_FOLLOW)
  531. nextidx = rc;
  532. break;
  533. case HILSE_EXPECT_LAST:
  534. case HILSE_EXPECT_DISC:
  535. case HILSE_EXPECT:
  536. case HILSE_IN:
  537. /* Already set up from previous HILSE_OUT_* */
  538. write_lock_irqsave(&mlc->lock, flags);
  539. rc = mlc->in(mlc, node->arg);
  540. if (rc == 2) {
  541. nextidx = HILSEN_DOZE;
  542. sched_long = 1;
  543. write_unlock_irqrestore(&mlc->lock, flags);
  544. break;
  545. }
  546. if (rc == 1)
  547. nextidx = node->ugly;
  548. else if (rc == 0)
  549. nextidx = node->good;
  550. else
  551. nextidx = node->bad;
  552. mlc->istarted = 0;
  553. write_unlock_irqrestore(&mlc->lock, flags);
  554. break;
  555. case HILSE_OUT_LAST:
  556. write_lock_irqsave(&mlc->lock, flags);
  557. pack = node->object.packet;
  558. pack |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
  559. goto out;
  560. case HILSE_OUT_DISC:
  561. write_lock_irqsave(&mlc->lock, flags);
  562. pack = node->object.packet;
  563. pack |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
  564. goto out;
  565. case HILSE_OUT:
  566. write_lock_irqsave(&mlc->lock, flags);
  567. pack = node->object.packet;
  568. out:
  569. if (!mlc->istarted) {
  570. /* Prepare to receive input */
  571. if ((node + 1)->act & HILSE_IN)
  572. hilse_setup_input(mlc, node + 1);
  573. }
  574. write_unlock_irqrestore(&mlc->lock, flags);
  575. if (down_trylock(&mlc->osem)) {
  576. nextidx = HILSEN_DOZE;
  577. break;
  578. }
  579. up(&mlc->osem);
  580. write_lock_irqsave(&mlc->lock, flags);
  581. if (!mlc->ostarted) {
  582. mlc->ostarted = 1;
  583. mlc->opacket = pack;
  584. mlc->out(mlc);
  585. nextidx = HILSEN_DOZE;
  586. write_unlock_irqrestore(&mlc->lock, flags);
  587. break;
  588. }
  589. mlc->ostarted = 0;
  590. do_gettimeofday(&(mlc->instart));
  591. write_unlock_irqrestore(&mlc->lock, flags);
  592. nextidx = HILSEN_NEXT;
  593. break;
  594. case HILSE_CTS:
  595. write_lock_irqsave(&mlc->lock, flags);
  596. nextidx = mlc->cts(mlc) ? node->bad : node->good;
  597. write_unlock_irqrestore(&mlc->lock, flags);
  598. break;
  599. default:
  600. BUG();
  601. }
  602. #ifdef HIL_MLC_DEBUG
  603. if (nextidx == HILSEN_DOZE)
  604. doze++;
  605. #endif
  606. while (nextidx & HILSEN_SCHED) {
  607. struct timeval tv;
  608. if (!sched_long)
  609. goto sched;
  610. do_gettimeofday(&tv);
  611. tv.tv_usec += USEC_PER_SEC * (tv.tv_sec - mlc->instart.tv_sec);
  612. tv.tv_usec -= mlc->instart.tv_usec;
  613. if (tv.tv_usec >= mlc->intimeout) goto sched;
  614. tv.tv_usec = (mlc->intimeout - tv.tv_usec) * HZ / USEC_PER_SEC;
  615. if (!tv.tv_usec) goto sched;
  616. mod_timer(&hil_mlcs_kicker, jiffies + tv.tv_usec);
  617. break;
  618. sched:
  619. tasklet_schedule(&hil_mlcs_tasklet);
  620. break;
  621. }
  622. if (nextidx & HILSEN_DOWN)
  623. mlc->seidx += nextidx & HILSEN_MASK;
  624. else if (nextidx & HILSEN_UP)
  625. mlc->seidx -= nextidx & HILSEN_MASK;
  626. else
  627. mlc->seidx = nextidx & HILSEN_MASK;
  628. if (nextidx & HILSEN_BREAK)
  629. return 1;
  630. return 0;
  631. }
  632. /******************** tasklet context functions **************************/
  633. static void hil_mlcs_process(unsigned long unused)
  634. {
  635. struct list_head *tmp;
  636. read_lock(&hil_mlcs_lock);
  637. list_for_each(tmp, &hil_mlcs) {
  638. struct hil_mlc *mlc = list_entry(tmp, hil_mlc, list);
  639. while (hilse_donode(mlc) == 0) {
  640. #ifdef HIL_MLC_DEBUG
  641. if (mlc->seidx != 41 &&
  642. mlc->seidx != 42 &&
  643. mlc->seidx != 43)
  644. printk(KERN_DEBUG PREFIX " + ");
  645. #endif
  646. }
  647. }
  648. read_unlock(&hil_mlcs_lock);
  649. }
  650. /************************* Keepalive timer task *********************/
  651. static void hil_mlcs_timer(unsigned long data)
  652. {
  653. hil_mlcs_probe = 1;
  654. tasklet_schedule(&hil_mlcs_tasklet);
  655. /* Re-insert the periodic task. */
  656. if (!timer_pending(&hil_mlcs_kicker))
  657. mod_timer(&hil_mlcs_kicker, jiffies + HZ);
  658. }
  659. /******************** user/kernel context functions **********************/
  660. static int hil_mlc_serio_write(struct serio *serio, unsigned char c)
  661. {
  662. struct hil_mlc_serio_map *map;
  663. struct hil_mlc *mlc;
  664. struct serio_driver *drv;
  665. uint8_t *idx, *last;
  666. map = serio->port_data;
  667. BUG_ON(map == NULL);
  668. mlc = map->mlc;
  669. BUG_ON(mlc == NULL);
  670. mlc->serio_opacket[map->didx] |=
  671. ((hil_packet)c) << (8 * (3 - mlc->serio_oidx[map->didx]));
  672. if (mlc->serio_oidx[map->didx] >= 3) {
  673. /* for now only commands */
  674. if (!(mlc->serio_opacket[map->didx] & HIL_PKT_CMD))
  675. return -EIO;
  676. switch (mlc->serio_opacket[map->didx] & HIL_PKT_DATA_MASK) {
  677. case HIL_CMD_IDD:
  678. idx = mlc->di[map->didx].idd;
  679. goto emu;
  680. case HIL_CMD_RSC:
  681. idx = mlc->di[map->didx].rsc;
  682. goto emu;
  683. case HIL_CMD_EXD:
  684. idx = mlc->di[map->didx].exd;
  685. goto emu;
  686. case HIL_CMD_RNM:
  687. idx = mlc->di[map->didx].rnm;
  688. goto emu;
  689. default:
  690. break;
  691. }
  692. mlc->serio_oidx[map->didx] = 0;
  693. mlc->serio_opacket[map->didx] = 0;
  694. }
  695. mlc->serio_oidx[map->didx]++;
  696. return -EIO;
  697. emu:
  698. drv = serio->drv;
  699. BUG_ON(drv == NULL);
  700. last = idx + 15;
  701. while ((last != idx) && (*last == 0))
  702. last--;
  703. while (idx != last) {
  704. drv->interrupt(serio, 0, 0);
  705. drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
  706. drv->interrupt(serio, 0, 0);
  707. drv->interrupt(serio, *idx, 0);
  708. idx++;
  709. }
  710. drv->interrupt(serio, 0, 0);
  711. drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
  712. drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
  713. drv->interrupt(serio, *idx, 0);
  714. mlc->serio_oidx[map->didx] = 0;
  715. mlc->serio_opacket[map->didx] = 0;
  716. return 0;
  717. }
  718. static int hil_mlc_serio_open(struct serio *serio)
  719. {
  720. struct hil_mlc_serio_map *map;
  721. struct hil_mlc *mlc;
  722. if (serio_get_drvdata(serio) != NULL)
  723. return -EBUSY;
  724. map = serio->port_data;
  725. BUG_ON(map == NULL);
  726. mlc = map->mlc;
  727. BUG_ON(mlc == NULL);
  728. return 0;
  729. }
  730. static void hil_mlc_serio_close(struct serio *serio)
  731. {
  732. struct hil_mlc_serio_map *map;
  733. struct hil_mlc *mlc;
  734. map = serio->port_data;
  735. BUG_ON(map == NULL);
  736. mlc = map->mlc;
  737. BUG_ON(mlc == NULL);
  738. serio_set_drvdata(serio, NULL);
  739. serio->drv = NULL;
  740. /* TODO wake up interruptable */
  741. }
  742. static const struct serio_device_id hil_mlc_serio_id = {
  743. .type = SERIO_HIL_MLC,
  744. .proto = SERIO_HIL,
  745. .extra = SERIO_ANY,
  746. .id = SERIO_ANY,
  747. };
  748. int hil_mlc_register(hil_mlc *mlc)
  749. {
  750. int i;
  751. unsigned long flags;
  752. BUG_ON(mlc == NULL);
  753. mlc->istarted = 0;
  754. mlc->ostarted = 0;
  755. rwlock_init(&mlc->lock);
  756. sema_init(&mlc->osem, 1);
  757. sema_init(&mlc->isem, 1);
  758. mlc->icount = -1;
  759. mlc->imatch = 0;
  760. mlc->opercnt = 0;
  761. sema_init(&(mlc->csem), 0);
  762. hil_mlc_clear_di_scratch(mlc);
  763. hil_mlc_clear_di_map(mlc, 0);
  764. for (i = 0; i < HIL_MLC_DEVMEM; i++) {
  765. struct serio *mlc_serio;
  766. hil_mlc_copy_di_scratch(mlc, i);
  767. mlc_serio = kzalloc(sizeof(*mlc_serio), GFP_KERNEL);
  768. mlc->serio[i] = mlc_serio;
  769. if (!mlc->serio[i]) {
  770. for (; i >= 0; i--)
  771. kfree(mlc->serio[i]);
  772. return -ENOMEM;
  773. }
  774. snprintf(mlc_serio->name, sizeof(mlc_serio->name)-1, "HIL_SERIO%d", i);
  775. snprintf(mlc_serio->phys, sizeof(mlc_serio->phys)-1, "HIL%d", i);
  776. mlc_serio->id = hil_mlc_serio_id;
  777. mlc_serio->id.id = i; /* HIL port no. */
  778. mlc_serio->write = hil_mlc_serio_write;
  779. mlc_serio->open = hil_mlc_serio_open;
  780. mlc_serio->close = hil_mlc_serio_close;
  781. mlc_serio->port_data = &(mlc->serio_map[i]);
  782. mlc->serio_map[i].mlc = mlc;
  783. mlc->serio_map[i].didx = i;
  784. mlc->serio_map[i].di_revmap = -1;
  785. mlc->serio_opacket[i] = 0;
  786. mlc->serio_oidx[i] = 0;
  787. serio_register_port(mlc_serio);
  788. }
  789. mlc->tasklet = &hil_mlcs_tasklet;
  790. write_lock_irqsave(&hil_mlcs_lock, flags);
  791. list_add_tail(&mlc->list, &hil_mlcs);
  792. mlc->seidx = HILSEN_START;
  793. write_unlock_irqrestore(&hil_mlcs_lock, flags);
  794. tasklet_schedule(&hil_mlcs_tasklet);
  795. return 0;
  796. }
  797. int hil_mlc_unregister(hil_mlc *mlc)
  798. {
  799. struct list_head *tmp;
  800. unsigned long flags;
  801. int i;
  802. BUG_ON(mlc == NULL);
  803. write_lock_irqsave(&hil_mlcs_lock, flags);
  804. list_for_each(tmp, &hil_mlcs)
  805. if (list_entry(tmp, hil_mlc, list) == mlc)
  806. goto found;
  807. /* not found in list */
  808. write_unlock_irqrestore(&hil_mlcs_lock, flags);
  809. tasklet_schedule(&hil_mlcs_tasklet);
  810. return -ENODEV;
  811. found:
  812. list_del(tmp);
  813. write_unlock_irqrestore(&hil_mlcs_lock, flags);
  814. for (i = 0; i < HIL_MLC_DEVMEM; i++) {
  815. serio_unregister_port(mlc->serio[i]);
  816. mlc->serio[i] = NULL;
  817. }
  818. tasklet_schedule(&hil_mlcs_tasklet);
  819. return 0;
  820. }
  821. /**************************** Module interface *************************/
  822. static int __init hil_mlc_init(void)
  823. {
  824. setup_timer(&hil_mlcs_kicker, &hil_mlcs_timer, 0);
  825. mod_timer(&hil_mlcs_kicker, jiffies + HZ);
  826. tasklet_enable(&hil_mlcs_tasklet);
  827. return 0;
  828. }
  829. static void __exit hil_mlc_exit(void)
  830. {
  831. del_timer_sync(&hil_mlcs_kicker);
  832. tasklet_kill(&hil_mlcs_tasklet);
  833. }
  834. module_init(hil_mlc_init);
  835. module_exit(hil_mlc_exit);