nct7904.c 14 KB

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  1. /*
  2. * nct7904.c - driver for Nuvoton NCT7904D.
  3. *
  4. * Copyright (c) 2015 Kontron
  5. * Author: Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/device.h>
  19. #include <linux/init.h>
  20. #include <linux/i2c.h>
  21. #include <linux/mutex.h>
  22. #include <linux/hwmon.h>
  23. #define VENDOR_ID_REG 0x7A /* Any bank */
  24. #define NUVOTON_ID 0x50
  25. #define CHIP_ID_REG 0x7B /* Any bank */
  26. #define NCT7904_ID 0xC5
  27. #define DEVICE_ID_REG 0x7C /* Any bank */
  28. #define BANK_SEL_REG 0xFF
  29. #define BANK_0 0x00
  30. #define BANK_1 0x01
  31. #define BANK_2 0x02
  32. #define BANK_3 0x03
  33. #define BANK_4 0x04
  34. #define BANK_MAX 0x04
  35. #define FANIN_MAX 12 /* Counted from 1 */
  36. #define VSEN_MAX 21 /* VSEN1..14, 3VDD, VBAT, V3VSB,
  37. LTD (not a voltage), VSEN17..19 */
  38. #define FANCTL_MAX 4 /* Counted from 1 */
  39. #define TCPU_MAX 8 /* Counted from 1 */
  40. #define TEMP_MAX 4 /* Counted from 1 */
  41. #define VT_ADC_CTRL0_REG 0x20 /* Bank 0 */
  42. #define VT_ADC_CTRL1_REG 0x21 /* Bank 0 */
  43. #define VT_ADC_CTRL2_REG 0x22 /* Bank 0 */
  44. #define FANIN_CTRL0_REG 0x24
  45. #define FANIN_CTRL1_REG 0x25
  46. #define DTS_T_CTRL0_REG 0x26
  47. #define DTS_T_CTRL1_REG 0x27
  48. #define VT_ADC_MD_REG 0x2E
  49. #define VSEN1_HV_REG 0x40 /* Bank 0; 2 regs (HV/LV) per sensor */
  50. #define TEMP_CH1_HV_REG 0x42 /* Bank 0; same as VSEN2_HV */
  51. #define LTD_HV_REG 0x62 /* Bank 0; 2 regs in VSEN range */
  52. #define FANIN1_HV_REG 0x80 /* Bank 0; 2 regs (HV/LV) per sensor */
  53. #define T_CPU1_HV_REG 0xA0 /* Bank 0; 2 regs (HV/LV) per sensor */
  54. #define PRTS_REG 0x03 /* Bank 2 */
  55. #define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
  56. #define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
  57. static const unsigned short normal_i2c[] = {
  58. 0x2d, 0x2e, I2C_CLIENT_END
  59. };
  60. struct nct7904_data {
  61. struct i2c_client *client;
  62. struct mutex bank_lock;
  63. int bank_sel;
  64. u32 fanin_mask;
  65. u32 vsen_mask;
  66. u32 tcpu_mask;
  67. u8 fan_mode[FANCTL_MAX];
  68. };
  69. /* Access functions */
  70. static int nct7904_bank_lock(struct nct7904_data *data, unsigned bank)
  71. {
  72. int ret;
  73. mutex_lock(&data->bank_lock);
  74. if (data->bank_sel == bank)
  75. return 0;
  76. ret = i2c_smbus_write_byte_data(data->client, BANK_SEL_REG, bank);
  77. if (ret == 0)
  78. data->bank_sel = bank;
  79. else
  80. data->bank_sel = -1;
  81. return ret;
  82. }
  83. static inline void nct7904_bank_release(struct nct7904_data *data)
  84. {
  85. mutex_unlock(&data->bank_lock);
  86. }
  87. /* Read 1-byte register. Returns unsigned reg or -ERRNO on error. */
  88. static int nct7904_read_reg(struct nct7904_data *data,
  89. unsigned bank, unsigned reg)
  90. {
  91. struct i2c_client *client = data->client;
  92. int ret;
  93. ret = nct7904_bank_lock(data, bank);
  94. if (ret == 0)
  95. ret = i2c_smbus_read_byte_data(client, reg);
  96. nct7904_bank_release(data);
  97. return ret;
  98. }
  99. /*
  100. * Read 2-byte register. Returns register in big-endian format or
  101. * -ERRNO on error.
  102. */
  103. static int nct7904_read_reg16(struct nct7904_data *data,
  104. unsigned bank, unsigned reg)
  105. {
  106. struct i2c_client *client = data->client;
  107. int ret, hi;
  108. ret = nct7904_bank_lock(data, bank);
  109. if (ret == 0) {
  110. ret = i2c_smbus_read_byte_data(client, reg);
  111. if (ret >= 0) {
  112. hi = ret;
  113. ret = i2c_smbus_read_byte_data(client, reg + 1);
  114. if (ret >= 0)
  115. ret |= hi << 8;
  116. }
  117. }
  118. nct7904_bank_release(data);
  119. return ret;
  120. }
  121. /* Write 1-byte register. Returns 0 or -ERRNO on error. */
  122. static int nct7904_write_reg(struct nct7904_data *data,
  123. unsigned bank, unsigned reg, u8 val)
  124. {
  125. struct i2c_client *client = data->client;
  126. int ret;
  127. ret = nct7904_bank_lock(data, bank);
  128. if (ret == 0)
  129. ret = i2c_smbus_write_byte_data(client, reg, val);
  130. nct7904_bank_release(data);
  131. return ret;
  132. }
  133. static int nct7904_read_fan(struct device *dev, u32 attr, int channel,
  134. long *val)
  135. {
  136. struct nct7904_data *data = dev_get_drvdata(dev);
  137. unsigned int cnt, rpm;
  138. int ret;
  139. switch(attr) {
  140. case hwmon_fan_input:
  141. ret = nct7904_read_reg16(data, BANK_0,
  142. FANIN1_HV_REG + channel * 2);
  143. if (ret < 0)
  144. return ret;
  145. cnt = ((ret & 0xff00) >> 3) | (ret & 0x1f);
  146. if (cnt == 0x1fff)
  147. rpm = 0;
  148. else
  149. rpm = 1350000 / cnt;
  150. *val = rpm;
  151. return 0;
  152. default:
  153. return -EOPNOTSUPP;
  154. }
  155. }
  156. static umode_t nct7904_fan_is_visible(const void *_data, u32 attr, int channel)
  157. {
  158. const struct nct7904_data *data = _data;
  159. if (attr == hwmon_fan_input && data->fanin_mask & (1 << channel))
  160. return S_IRUGO;
  161. return 0;
  162. }
  163. static u8 nct7904_chan_to_index[] = {
  164. 0, /* Not used */
  165. 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
  166. 18, 19, 20, 16
  167. };
  168. static int nct7904_read_in(struct device *dev, u32 attr, int channel,
  169. long *val)
  170. {
  171. struct nct7904_data *data = dev_get_drvdata(dev);
  172. int ret, volt, index;
  173. index = nct7904_chan_to_index[channel];
  174. switch(attr) {
  175. case hwmon_in_input:
  176. ret = nct7904_read_reg16(data, BANK_0,
  177. VSEN1_HV_REG + index * 2);
  178. if (ret < 0)
  179. return ret;
  180. volt = ((ret & 0xff00) >> 5) | (ret & 0x7);
  181. if (index < 14)
  182. volt *= 2; /* 0.002V scale */
  183. else
  184. volt *= 6; /* 0.006V scale */
  185. *val = volt;
  186. return 0;
  187. default:
  188. return -EOPNOTSUPP;
  189. }
  190. }
  191. static umode_t nct7904_in_is_visible(const void *_data, u32 attr, int channel)
  192. {
  193. const struct nct7904_data *data = _data;
  194. int index = nct7904_chan_to_index[channel];
  195. if (channel > 0 && attr == hwmon_in_input &&
  196. (data->vsen_mask & BIT(index)))
  197. return S_IRUGO;
  198. return 0;
  199. }
  200. static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
  201. long *val)
  202. {
  203. struct nct7904_data *data = dev_get_drvdata(dev);
  204. int ret, temp;
  205. switch(attr) {
  206. case hwmon_temp_input:
  207. if (channel == 0)
  208. ret = nct7904_read_reg16(data, BANK_0, LTD_HV_REG);
  209. else
  210. ret = nct7904_read_reg16(data, BANK_0,
  211. T_CPU1_HV_REG + (channel - 1) * 2);
  212. if (ret < 0)
  213. return ret;
  214. temp = ((ret & 0xff00) >> 5) | (ret & 0x7);
  215. *val = sign_extend32(temp, 10) * 125;
  216. return 0;
  217. default:
  218. return -EOPNOTSUPP;
  219. }
  220. }
  221. static umode_t nct7904_temp_is_visible(const void *_data, u32 attr, int channel)
  222. {
  223. const struct nct7904_data *data = _data;
  224. if (attr == hwmon_temp_input) {
  225. if (channel == 0) {
  226. if (data->vsen_mask & BIT(17))
  227. return S_IRUGO;
  228. } else {
  229. if (data->tcpu_mask & BIT(channel - 1))
  230. return S_IRUGO;
  231. }
  232. }
  233. return 0;
  234. }
  235. static int nct7904_read_pwm(struct device *dev, u32 attr, int channel,
  236. long *val)
  237. {
  238. struct nct7904_data *data = dev_get_drvdata(dev);
  239. int ret;
  240. switch(attr) {
  241. case hwmon_pwm_input:
  242. ret = nct7904_read_reg(data, BANK_3, FANCTL1_OUT_REG + channel);
  243. if (ret < 0)
  244. return ret;
  245. *val = ret;
  246. return 0;
  247. case hwmon_pwm_enable:
  248. ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + channel);
  249. if (ret < 0)
  250. return ret;
  251. *val = ret ? 2 : 1;
  252. return 0;
  253. default:
  254. return -EOPNOTSUPP;
  255. }
  256. }
  257. static int nct7904_write_pwm(struct device *dev, u32 attr, int channel,
  258. long val)
  259. {
  260. struct nct7904_data *data = dev_get_drvdata(dev);
  261. int ret;
  262. switch(attr) {
  263. case hwmon_pwm_input:
  264. if (val < 0 || val > 255)
  265. return -EINVAL;
  266. ret = nct7904_write_reg(data, BANK_3, FANCTL1_OUT_REG + channel,
  267. val);
  268. return ret;
  269. case hwmon_pwm_enable:
  270. if (val < 1 || val > 2 ||
  271. (val == 2 && !data->fan_mode[channel]))
  272. return -EINVAL;
  273. ret = nct7904_write_reg(data, BANK_3, FANCTL1_FMR_REG + channel,
  274. val == 2 ? data->fan_mode[channel] : 0);
  275. return ret;
  276. default:
  277. return -EOPNOTSUPP;
  278. }
  279. }
  280. static umode_t nct7904_pwm_is_visible(const void *_data, u32 attr, int channel)
  281. {
  282. switch(attr) {
  283. case hwmon_pwm_input:
  284. case hwmon_pwm_enable:
  285. return S_IRUGO | S_IWUSR;
  286. default:
  287. return 0;
  288. }
  289. }
  290. static int nct7904_read(struct device *dev, enum hwmon_sensor_types type,
  291. u32 attr, int channel, long *val)
  292. {
  293. switch (type) {
  294. case hwmon_in:
  295. return nct7904_read_in(dev, attr, channel, val);
  296. case hwmon_fan:
  297. return nct7904_read_fan(dev, attr, channel, val);
  298. case hwmon_pwm:
  299. return nct7904_read_pwm(dev, attr, channel, val);
  300. case hwmon_temp:
  301. return nct7904_read_temp(dev, attr, channel, val);
  302. default:
  303. return -EOPNOTSUPP;
  304. }
  305. }
  306. static int nct7904_write(struct device *dev, enum hwmon_sensor_types type,
  307. u32 attr, int channel, long val)
  308. {
  309. switch (type) {
  310. case hwmon_pwm:
  311. return nct7904_write_pwm(dev, attr, channel, val);
  312. default:
  313. return -EOPNOTSUPP;
  314. }
  315. }
  316. static umode_t nct7904_is_visible(const void *data,
  317. enum hwmon_sensor_types type,
  318. u32 attr, int channel)
  319. {
  320. switch (type) {
  321. case hwmon_in:
  322. return nct7904_in_is_visible(data, attr, channel);
  323. case hwmon_fan:
  324. return nct7904_fan_is_visible(data, attr, channel);
  325. case hwmon_pwm:
  326. return nct7904_pwm_is_visible(data, attr, channel);
  327. case hwmon_temp:
  328. return nct7904_temp_is_visible(data, attr, channel);
  329. default:
  330. return 0;
  331. }
  332. }
  333. /* Return 0 if detection is successful, -ENODEV otherwise */
  334. static int nct7904_detect(struct i2c_client *client,
  335. struct i2c_board_info *info)
  336. {
  337. struct i2c_adapter *adapter = client->adapter;
  338. if (!i2c_check_functionality(adapter,
  339. I2C_FUNC_SMBUS_READ_BYTE |
  340. I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  341. return -ENODEV;
  342. /* Determine the chip type. */
  343. if (i2c_smbus_read_byte_data(client, VENDOR_ID_REG) != NUVOTON_ID ||
  344. i2c_smbus_read_byte_data(client, CHIP_ID_REG) != NCT7904_ID ||
  345. (i2c_smbus_read_byte_data(client, DEVICE_ID_REG) & 0xf0) != 0x50 ||
  346. (i2c_smbus_read_byte_data(client, BANK_SEL_REG) & 0xf8) != 0x00)
  347. return -ENODEV;
  348. strlcpy(info->type, "nct7904", I2C_NAME_SIZE);
  349. return 0;
  350. }
  351. static const u32 nct7904_in_config[] = {
  352. HWMON_I_INPUT, /* dummy, skipped in is_visible */
  353. HWMON_I_INPUT,
  354. HWMON_I_INPUT,
  355. HWMON_I_INPUT,
  356. HWMON_I_INPUT,
  357. HWMON_I_INPUT,
  358. HWMON_I_INPUT,
  359. HWMON_I_INPUT,
  360. HWMON_I_INPUT,
  361. HWMON_I_INPUT,
  362. HWMON_I_INPUT,
  363. HWMON_I_INPUT,
  364. HWMON_I_INPUT,
  365. HWMON_I_INPUT,
  366. HWMON_I_INPUT,
  367. HWMON_I_INPUT,
  368. HWMON_I_INPUT,
  369. HWMON_I_INPUT,
  370. HWMON_I_INPUT,
  371. HWMON_I_INPUT,
  372. HWMON_I_INPUT,
  373. 0
  374. };
  375. static const struct hwmon_channel_info nct7904_in = {
  376. .type = hwmon_in,
  377. .config = nct7904_in_config,
  378. };
  379. static const u32 nct7904_fan_config[] = {
  380. HWMON_F_INPUT,
  381. HWMON_F_INPUT,
  382. HWMON_F_INPUT,
  383. HWMON_F_INPUT,
  384. HWMON_F_INPUT,
  385. HWMON_F_INPUT,
  386. HWMON_F_INPUT,
  387. HWMON_F_INPUT,
  388. 0
  389. };
  390. static const struct hwmon_channel_info nct7904_fan = {
  391. .type = hwmon_fan,
  392. .config = nct7904_fan_config,
  393. };
  394. static const u32 nct7904_pwm_config[] = {
  395. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  396. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  397. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  398. HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
  399. 0
  400. };
  401. static const struct hwmon_channel_info nct7904_pwm = {
  402. .type = hwmon_pwm,
  403. .config = nct7904_pwm_config,
  404. };
  405. static const u32 nct7904_temp_config[] = {
  406. HWMON_T_INPUT,
  407. HWMON_T_INPUT,
  408. HWMON_T_INPUT,
  409. HWMON_T_INPUT,
  410. HWMON_T_INPUT,
  411. HWMON_T_INPUT,
  412. HWMON_T_INPUT,
  413. HWMON_T_INPUT,
  414. HWMON_T_INPUT,
  415. 0
  416. };
  417. static const struct hwmon_channel_info nct7904_temp = {
  418. .type = hwmon_temp,
  419. .config = nct7904_temp_config,
  420. };
  421. static const struct hwmon_channel_info *nct7904_info[] = {
  422. &nct7904_in,
  423. &nct7904_fan,
  424. &nct7904_pwm,
  425. &nct7904_temp,
  426. NULL
  427. };
  428. static const struct hwmon_ops nct7904_hwmon_ops = {
  429. .is_visible = nct7904_is_visible,
  430. .read = nct7904_read,
  431. .write = nct7904_write,
  432. };
  433. static const struct hwmon_chip_info nct7904_chip_info = {
  434. .ops = &nct7904_hwmon_ops,
  435. .info = nct7904_info,
  436. };
  437. static int nct7904_probe(struct i2c_client *client,
  438. const struct i2c_device_id *id)
  439. {
  440. struct nct7904_data *data;
  441. struct device *hwmon_dev;
  442. struct device *dev = &client->dev;
  443. int ret, i;
  444. u32 mask;
  445. data = devm_kzalloc(dev, sizeof(struct nct7904_data), GFP_KERNEL);
  446. if (!data)
  447. return -ENOMEM;
  448. data->client = client;
  449. mutex_init(&data->bank_lock);
  450. data->bank_sel = -1;
  451. /* Setup sensor groups. */
  452. /* FANIN attributes */
  453. ret = nct7904_read_reg16(data, BANK_0, FANIN_CTRL0_REG);
  454. if (ret < 0)
  455. return ret;
  456. data->fanin_mask = (ret >> 8) | ((ret & 0xff) << 8);
  457. /*
  458. * VSEN attributes
  459. *
  460. * Note: voltage sensors overlap with external temperature
  461. * sensors. So, if we ever decide to support the latter
  462. * we will have to adjust 'vsen_mask' accordingly.
  463. */
  464. mask = 0;
  465. ret = nct7904_read_reg16(data, BANK_0, VT_ADC_CTRL0_REG);
  466. if (ret >= 0)
  467. mask = (ret >> 8) | ((ret & 0xff) << 8);
  468. ret = nct7904_read_reg(data, BANK_0, VT_ADC_CTRL2_REG);
  469. if (ret >= 0)
  470. mask |= (ret << 16);
  471. data->vsen_mask = mask;
  472. /* CPU_TEMP attributes */
  473. ret = nct7904_read_reg16(data, BANK_0, DTS_T_CTRL0_REG);
  474. if (ret < 0)
  475. return ret;
  476. data->tcpu_mask = ((ret >> 8) & 0xf) | ((ret & 0xf) << 4);
  477. for (i = 0; i < FANCTL_MAX; i++) {
  478. ret = nct7904_read_reg(data, BANK_3, FANCTL1_FMR_REG + i);
  479. if (ret < 0)
  480. return ret;
  481. data->fan_mode[i] = ret;
  482. }
  483. hwmon_dev =
  484. devm_hwmon_device_register_with_info(dev, client->name, data,
  485. &nct7904_chip_info, NULL);
  486. return PTR_ERR_OR_ZERO(hwmon_dev);
  487. }
  488. static const struct i2c_device_id nct7904_id[] = {
  489. {"nct7904", 0},
  490. {}
  491. };
  492. MODULE_DEVICE_TABLE(i2c, nct7904_id);
  493. static struct i2c_driver nct7904_driver = {
  494. .class = I2C_CLASS_HWMON,
  495. .driver = {
  496. .name = "nct7904",
  497. },
  498. .probe = nct7904_probe,
  499. .id_table = nct7904_id,
  500. .detect = nct7904_detect,
  501. .address_list = normal_i2c,
  502. };
  503. module_i2c_driver(nct7904_driver);
  504. MODULE_AUTHOR("Vadim V. Vlasov <vvlasov@dev.rtsoft.ru>");
  505. MODULE_DESCRIPTION("Hwmon driver for NUVOTON NCT7904");
  506. MODULE_LICENSE("GPL");