tlbflush.h 5.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209
  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2001 - 2013 Tensilica Inc.
  7. */
  8. #ifndef _XTENSA_TLBFLUSH_H
  9. #define _XTENSA_TLBFLUSH_H
  10. #include <linux/stringify.h>
  11. #include <asm/processor.h>
  12. #define DTLB_WAY_PGD 7
  13. #define ITLB_ARF_WAYS 4
  14. #define DTLB_ARF_WAYS 4
  15. #define ITLB_HIT_BIT 3
  16. #define DTLB_HIT_BIT 4
  17. #ifndef __ASSEMBLY__
  18. /* TLB flushing:
  19. *
  20. * - flush_tlb_all() flushes all processes TLB entries
  21. * - flush_tlb_mm(mm) flushes the specified mm context TLB entries
  22. * - flush_tlb_page(mm, vmaddr) flushes a single page
  23. * - flush_tlb_range(mm, start, end) flushes a range of pages
  24. */
  25. void local_flush_tlb_all(void);
  26. void local_flush_tlb_mm(struct mm_struct *mm);
  27. void local_flush_tlb_page(struct vm_area_struct *vma,
  28. unsigned long page);
  29. void local_flush_tlb_range(struct vm_area_struct *vma,
  30. unsigned long start, unsigned long end);
  31. void local_flush_tlb_kernel_range(unsigned long start, unsigned long end);
  32. #ifdef CONFIG_SMP
  33. void flush_tlb_all(void);
  34. void flush_tlb_mm(struct mm_struct *);
  35. void flush_tlb_page(struct vm_area_struct *, unsigned long);
  36. void flush_tlb_range(struct vm_area_struct *, unsigned long,
  37. unsigned long);
  38. void flush_tlb_kernel_range(unsigned long start, unsigned long end);
  39. #else /* !CONFIG_SMP */
  40. #define flush_tlb_all() local_flush_tlb_all()
  41. #define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
  42. #define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
  43. #define flush_tlb_range(vma, vmaddr, end) local_flush_tlb_range(vma, vmaddr, \
  44. end)
  45. #define flush_tlb_kernel_range(start, end) local_flush_tlb_kernel_range(start, \
  46. end)
  47. #endif /* CONFIG_SMP */
  48. /* TLB operations. */
  49. static inline unsigned long itlb_probe(unsigned long addr)
  50. {
  51. unsigned long tmp;
  52. __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
  53. return tmp;
  54. }
  55. static inline unsigned long dtlb_probe(unsigned long addr)
  56. {
  57. unsigned long tmp;
  58. __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
  59. return tmp;
  60. }
  61. static inline void invalidate_itlb_entry (unsigned long probe)
  62. {
  63. __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe));
  64. }
  65. static inline void invalidate_dtlb_entry (unsigned long probe)
  66. {
  67. __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe));
  68. }
  69. /* Use the .._no_isync functions with caution. Generally, these are
  70. * handy for bulk invalidates followed by a single 'isync'. The
  71. * caller must follow up with an 'isync', which can be relatively
  72. * expensive on some Xtensa implementations.
  73. */
  74. static inline void invalidate_itlb_entry_no_isync (unsigned entry)
  75. {
  76. /* Caller must follow up with 'isync'. */
  77. __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) );
  78. }
  79. static inline void invalidate_dtlb_entry_no_isync (unsigned entry)
  80. {
  81. /* Caller must follow up with 'isync'. */
  82. __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) );
  83. }
  84. static inline void set_itlbcfg_register (unsigned long val)
  85. {
  86. __asm__ __volatile__("wsr %0, itlbcfg\n\t" "isync\n\t"
  87. : : "a" (val));
  88. }
  89. static inline void set_dtlbcfg_register (unsigned long val)
  90. {
  91. __asm__ __volatile__("wsr %0, dtlbcfg; dsync\n\t"
  92. : : "a" (val));
  93. }
  94. static inline void set_ptevaddr_register (unsigned long val)
  95. {
  96. __asm__ __volatile__(" wsr %0, ptevaddr; isync\n"
  97. : : "a" (val));
  98. }
  99. static inline unsigned long read_ptevaddr_register (void)
  100. {
  101. unsigned long tmp;
  102. __asm__ __volatile__("rsr %0, ptevaddr\n\t" : "=a" (tmp));
  103. return tmp;
  104. }
  105. static inline void write_dtlb_entry (pte_t entry, int way)
  106. {
  107. __asm__ __volatile__("wdtlb %1, %0; dsync\n\t"
  108. : : "r" (way), "r" (entry) );
  109. }
  110. static inline void write_itlb_entry (pte_t entry, int way)
  111. {
  112. __asm__ __volatile__("witlb %1, %0; isync\n\t"
  113. : : "r" (way), "r" (entry) );
  114. }
  115. static inline void invalidate_page_directory (void)
  116. {
  117. invalidate_dtlb_entry (DTLB_WAY_PGD);
  118. invalidate_dtlb_entry (DTLB_WAY_PGD+1);
  119. invalidate_dtlb_entry (DTLB_WAY_PGD+2);
  120. }
  121. static inline void invalidate_itlb_mapping (unsigned address)
  122. {
  123. unsigned long tlb_entry;
  124. if (((tlb_entry = itlb_probe(address)) & (1 << ITLB_HIT_BIT)) != 0)
  125. invalidate_itlb_entry(tlb_entry);
  126. }
  127. static inline void invalidate_dtlb_mapping (unsigned address)
  128. {
  129. unsigned long tlb_entry;
  130. if (((tlb_entry = dtlb_probe(address)) & (1 << DTLB_HIT_BIT)) != 0)
  131. invalidate_dtlb_entry(tlb_entry);
  132. }
  133. #define check_pgt_cache() do { } while (0)
  134. /*
  135. * DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa
  136. * ISA and exist only for test purposes..
  137. * You may find it helpful for MMU debugging, however.
  138. *
  139. * 'at' is the unmodified input register
  140. * 'as' is the output register, as follows (specific to the Linux config):
  141. *
  142. * as[31..12] contain the virtual address
  143. * as[11..08] are meaningless
  144. * as[07..00] contain the asid
  145. */
  146. static inline unsigned long read_dtlb_virtual (int way)
  147. {
  148. unsigned long tmp;
  149. __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
  150. return tmp;
  151. }
  152. static inline unsigned long read_dtlb_translation (int way)
  153. {
  154. unsigned long tmp;
  155. __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
  156. return tmp;
  157. }
  158. static inline unsigned long read_itlb_virtual (int way)
  159. {
  160. unsigned long tmp;
  161. __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
  162. return tmp;
  163. }
  164. static inline unsigned long read_itlb_translation (int way)
  165. {
  166. unsigned long tmp;
  167. __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
  168. return tmp;
  169. }
  170. #endif /* __ASSEMBLY__ */
  171. #endif /* _XTENSA_TLBFLUSH_H */