kmem_layout.h 2.1 KB

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  1. /*
  2. * Kernel virtual memory layout definitions.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General
  5. * Public License. See the file "COPYING" in the main directory of
  6. * this archive for more details.
  7. *
  8. * Copyright (C) 2016 Cadence Design Systems Inc.
  9. */
  10. #ifndef _XTENSA_KMEM_LAYOUT_H
  11. #define _XTENSA_KMEM_LAYOUT_H
  12. #include <asm/types.h>
  13. #ifdef CONFIG_MMU
  14. /*
  15. * Fixed TLB translations in the processor.
  16. */
  17. #define XCHAL_PAGE_TABLE_VADDR __XTENSA_UL_CONST(0x80000000)
  18. #define XCHAL_PAGE_TABLE_SIZE __XTENSA_UL_CONST(0x00400000)
  19. #if defined(CONFIG_XTENSA_KSEG_MMU_V2)
  20. #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
  21. #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
  22. #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
  23. #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x08000000)
  24. #define XCHAL_KSEG_TLB_WAY 5
  25. #define XCHAL_KIO_TLB_WAY 6
  26. #elif defined(CONFIG_XTENSA_KSEG_256M)
  27. #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xb0000000)
  28. #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xc0000000)
  29. #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x10000000)
  30. #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x10000000)
  31. #define XCHAL_KSEG_TLB_WAY 6
  32. #define XCHAL_KIO_TLB_WAY 6
  33. #elif defined(CONFIG_XTENSA_KSEG_512M)
  34. #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xa0000000)
  35. #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xc0000000)
  36. #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x20000000)
  37. #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x10000000)
  38. #define XCHAL_KSEG_TLB_WAY 6
  39. #define XCHAL_KIO_TLB_WAY 6
  40. #else
  41. #error Unsupported KSEG configuration
  42. #endif
  43. #ifdef CONFIG_KSEG_PADDR
  44. #define XCHAL_KSEG_PADDR __XTENSA_UL_CONST(CONFIG_KSEG_PADDR)
  45. #else
  46. #define XCHAL_KSEG_PADDR __XTENSA_UL_CONST(0x00000000)
  47. #endif
  48. #if XCHAL_KSEG_PADDR & (XCHAL_KSEG_ALIGNMENT - 1)
  49. #error XCHAL_KSEG_PADDR is not properly aligned to XCHAL_KSEG_ALIGNMENT
  50. #endif
  51. #else
  52. #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
  53. #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
  54. #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
  55. #endif
  56. #endif