time.c 8.4 KB

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  1. /*
  2. * Copyright 2010 Tilera Corporation. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11. * NON INFRINGEMENT. See the GNU General Public License for
  12. * more details.
  13. *
  14. * Support the cycle counter clocksource and tile timer clock event device.
  15. */
  16. #include <linux/time.h>
  17. #include <linux/timex.h>
  18. #include <linux/clocksource.h>
  19. #include <linux/clockchips.h>
  20. #include <linux/hardirq.h>
  21. #include <linux/sched.h>
  22. #include <linux/smp.h>
  23. #include <linux/delay.h>
  24. #include <linux/module.h>
  25. #include <linux/timekeeper_internal.h>
  26. #include <asm/irq_regs.h>
  27. #include <asm/traps.h>
  28. #include <asm/vdso.h>
  29. #include <hv/hypervisor.h>
  30. #include <arch/interrupts.h>
  31. #include <arch/spr_def.h>
  32. /*
  33. * Define the cycle counter clock source.
  34. */
  35. /* How many cycles per second we are running at. */
  36. static cycles_t cycles_per_sec __write_once;
  37. cycles_t get_clock_rate(void)
  38. {
  39. return cycles_per_sec;
  40. }
  41. #if CHIP_HAS_SPLIT_CYCLE()
  42. cycles_t get_cycles(void)
  43. {
  44. unsigned int high = __insn_mfspr(SPR_CYCLE_HIGH);
  45. unsigned int low = __insn_mfspr(SPR_CYCLE_LOW);
  46. unsigned int high2 = __insn_mfspr(SPR_CYCLE_HIGH);
  47. while (unlikely(high != high2)) {
  48. low = __insn_mfspr(SPR_CYCLE_LOW);
  49. high = high2;
  50. high2 = __insn_mfspr(SPR_CYCLE_HIGH);
  51. }
  52. return (((cycles_t)high) << 32) | low;
  53. }
  54. EXPORT_SYMBOL(get_cycles);
  55. #endif
  56. /*
  57. * We use a relatively small shift value so that sched_clock()
  58. * won't wrap around very often.
  59. */
  60. #define SCHED_CLOCK_SHIFT 10
  61. static unsigned long sched_clock_mult __write_once;
  62. static cycles_t clocksource_get_cycles(struct clocksource *cs)
  63. {
  64. return get_cycles();
  65. }
  66. static struct clocksource cycle_counter_cs = {
  67. .name = "cycle counter",
  68. .rating = 300,
  69. .read = clocksource_get_cycles,
  70. .mask = CLOCKSOURCE_MASK(64),
  71. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  72. };
  73. /*
  74. * Called very early from setup_arch() to set cycles_per_sec.
  75. * We initialize it early so we can use it to set up loops_per_jiffy.
  76. */
  77. void __init setup_clock(void)
  78. {
  79. cycles_per_sec = hv_sysconf(HV_SYSCONF_CPU_SPEED);
  80. sched_clock_mult =
  81. clocksource_hz2mult(cycles_per_sec, SCHED_CLOCK_SHIFT);
  82. }
  83. void __init calibrate_delay(void)
  84. {
  85. loops_per_jiffy = get_clock_rate() / HZ;
  86. pr_info("Clock rate yields %lu.%02lu BogoMIPS (lpj=%lu)\n",
  87. loops_per_jiffy / (500000 / HZ),
  88. (loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
  89. }
  90. /* Called fairly late in init/main.c, but before we go smp. */
  91. void __init time_init(void)
  92. {
  93. /* Initialize and register the clock source. */
  94. clocksource_register_hz(&cycle_counter_cs, cycles_per_sec);
  95. /* Start up the tile-timer interrupt source on the boot cpu. */
  96. setup_tile_timer();
  97. }
  98. /*
  99. * Define the tile timer clock event device. The timer is driven by
  100. * the TILE_TIMER_CONTROL register, which consists of a 31-bit down
  101. * counter, plus bit 31, which signifies that the counter has wrapped
  102. * from zero to (2**31) - 1. The INT_TILE_TIMER interrupt will be
  103. * raised as long as bit 31 is set.
  104. *
  105. * The TILE_MINSEC value represents the largest range of real-time
  106. * we can possibly cover with the timer, based on MAX_TICK combined
  107. * with the slowest reasonable clock rate we might run at.
  108. */
  109. #define MAX_TICK 0x7fffffff /* we have 31 bits of countdown timer */
  110. #define TILE_MINSEC 5 /* timer covers no more than 5 seconds */
  111. static int tile_timer_set_next_event(unsigned long ticks,
  112. struct clock_event_device *evt)
  113. {
  114. BUG_ON(ticks > MAX_TICK);
  115. __insn_mtspr(SPR_TILE_TIMER_CONTROL, ticks);
  116. arch_local_irq_unmask_now(INT_TILE_TIMER);
  117. return 0;
  118. }
  119. /*
  120. * Whenever anyone tries to change modes, we just mask interrupts
  121. * and wait for the next event to get set.
  122. */
  123. static int tile_timer_shutdown(struct clock_event_device *evt)
  124. {
  125. arch_local_irq_mask_now(INT_TILE_TIMER);
  126. return 0;
  127. }
  128. /*
  129. * Set min_delta_ns to 1 microsecond, since it takes about
  130. * that long to fire the interrupt.
  131. */
  132. static DEFINE_PER_CPU(struct clock_event_device, tile_timer) = {
  133. .name = "tile timer",
  134. .features = CLOCK_EVT_FEAT_ONESHOT,
  135. .min_delta_ns = 1000,
  136. .rating = 100,
  137. .irq = -1,
  138. .set_next_event = tile_timer_set_next_event,
  139. .set_state_shutdown = tile_timer_shutdown,
  140. .set_state_oneshot = tile_timer_shutdown,
  141. .tick_resume = tile_timer_shutdown,
  142. };
  143. void setup_tile_timer(void)
  144. {
  145. struct clock_event_device *evt = this_cpu_ptr(&tile_timer);
  146. /* Fill in fields that are speed-specific. */
  147. clockevents_calc_mult_shift(evt, cycles_per_sec, TILE_MINSEC);
  148. evt->max_delta_ns = clockevent_delta2ns(MAX_TICK, evt);
  149. /* Mark as being for this cpu only. */
  150. evt->cpumask = cpumask_of(smp_processor_id());
  151. /* Start out with timer not firing. */
  152. arch_local_irq_mask_now(INT_TILE_TIMER);
  153. /* Register tile timer. */
  154. clockevents_register_device(evt);
  155. }
  156. /* Called from the interrupt vector. */
  157. void do_timer_interrupt(struct pt_regs *regs, int fault_num)
  158. {
  159. struct pt_regs *old_regs = set_irq_regs(regs);
  160. struct clock_event_device *evt = this_cpu_ptr(&tile_timer);
  161. /*
  162. * Mask the timer interrupt here, since we are a oneshot timer
  163. * and there are now by definition no events pending.
  164. */
  165. arch_local_irq_mask(INT_TILE_TIMER);
  166. /* Track time spent here in an interrupt context */
  167. irq_enter();
  168. /* Track interrupt count. */
  169. __this_cpu_inc(irq_stat.irq_timer_count);
  170. /* Call the generic timer handler */
  171. evt->event_handler(evt);
  172. /*
  173. * Track time spent against the current process again and
  174. * process any softirqs if they are waiting.
  175. */
  176. irq_exit();
  177. set_irq_regs(old_regs);
  178. }
  179. /*
  180. * Scheduler clock - returns current time in nanosec units.
  181. * Note that with LOCKDEP, this is called during lockdep_init(), and
  182. * we will claim that sched_clock() is zero for a little while, until
  183. * we run setup_clock(), above.
  184. */
  185. unsigned long long sched_clock(void)
  186. {
  187. return mult_frac(get_cycles(),
  188. sched_clock_mult, 1ULL << SCHED_CLOCK_SHIFT);
  189. }
  190. int setup_profiling_timer(unsigned int multiplier)
  191. {
  192. return -EINVAL;
  193. }
  194. /*
  195. * Use the tile timer to convert nsecs to core clock cycles, relying
  196. * on it having the same frequency as SPR_CYCLE.
  197. */
  198. cycles_t ns2cycles(unsigned long nsecs)
  199. {
  200. /*
  201. * We do not have to disable preemption here as each core has the same
  202. * clock frequency.
  203. */
  204. struct clock_event_device *dev = raw_cpu_ptr(&tile_timer);
  205. /*
  206. * as in clocksource.h and x86's timer.h, we split the calculation
  207. * into 2 parts to avoid unecessary overflow of the intermediate
  208. * value. This will not lead to any loss of precision.
  209. */
  210. u64 quot = (u64)nsecs >> dev->shift;
  211. u64 rem = (u64)nsecs & ((1ULL << dev->shift) - 1);
  212. return quot * dev->mult + ((rem * dev->mult) >> dev->shift);
  213. }
  214. void update_vsyscall_tz(void)
  215. {
  216. write_seqcount_begin(&vdso_data->tz_seq);
  217. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  218. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  219. write_seqcount_end(&vdso_data->tz_seq);
  220. }
  221. void update_vsyscall(struct timekeeper *tk)
  222. {
  223. if (tk->tkr_mono.clock != &cycle_counter_cs)
  224. return;
  225. write_seqcount_begin(&vdso_data->tb_seq);
  226. vdso_data->cycle_last = tk->tkr_mono.cycle_last;
  227. vdso_data->mask = tk->tkr_mono.mask;
  228. vdso_data->mult = tk->tkr_mono.mult;
  229. vdso_data->shift = tk->tkr_mono.shift;
  230. vdso_data->wall_time_sec = tk->xtime_sec;
  231. vdso_data->wall_time_snsec = tk->tkr_mono.xtime_nsec;
  232. vdso_data->monotonic_time_sec = tk->xtime_sec
  233. + tk->wall_to_monotonic.tv_sec;
  234. vdso_data->monotonic_time_snsec = tk->tkr_mono.xtime_nsec
  235. + ((u64)tk->wall_to_monotonic.tv_nsec
  236. << tk->tkr_mono.shift);
  237. while (vdso_data->monotonic_time_snsec >=
  238. (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {
  239. vdso_data->monotonic_time_snsec -=
  240. ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;
  241. vdso_data->monotonic_time_sec++;
  242. }
  243. vdso_data->wall_time_coarse_sec = tk->xtime_sec;
  244. vdso_data->wall_time_coarse_nsec = (long)(tk->tkr_mono.xtime_nsec >>
  245. tk->tkr_mono.shift);
  246. vdso_data->monotonic_time_coarse_sec =
  247. vdso_data->wall_time_coarse_sec + tk->wall_to_monotonic.tv_sec;
  248. vdso_data->monotonic_time_coarse_nsec =
  249. vdso_data->wall_time_coarse_nsec + tk->wall_to_monotonic.tv_nsec;
  250. while (vdso_data->monotonic_time_coarse_nsec >= NSEC_PER_SEC) {
  251. vdso_data->monotonic_time_coarse_nsec -= NSEC_PER_SEC;
  252. vdso_data->monotonic_time_coarse_sec++;
  253. }
  254. write_seqcount_end(&vdso_data->tb_seq);
  255. }