ptrace_32.h 1.5 KB

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  1. #ifndef _UAPI__ASM_SH_PTRACE_32_H
  2. #define _UAPI__ASM_SH_PTRACE_32_H
  3. /*
  4. * GCC defines register number like this:
  5. * -----------------------------
  6. * 0 - 15 are integer registers
  7. * 17 - 22 are control/special registers
  8. * 24 - 39 fp registers
  9. * 40 - 47 xd registers
  10. * 48 - fpscr register
  11. * -----------------------------
  12. *
  13. * We follows above, except:
  14. * 16 --- program counter (PC)
  15. * 22 --- syscall #
  16. * 23 --- floating point communication register
  17. */
  18. #define REG_REG0 0
  19. #define REG_REG15 15
  20. #define REG_PC 16
  21. #define REG_PR 17
  22. #define REG_SR 18
  23. #define REG_GBR 19
  24. #define REG_MACH 20
  25. #define REG_MACL 21
  26. #define REG_SYSCALL 22
  27. #define REG_FPREG0 23
  28. #define REG_FPREG15 38
  29. #define REG_XFREG0 39
  30. #define REG_XFREG15 54
  31. #define REG_FPSCR 55
  32. #define REG_FPUL 56
  33. /*
  34. * This struct defines the way the registers are stored on the
  35. * kernel stack during a system call or other kernel entry.
  36. */
  37. struct pt_regs {
  38. unsigned long regs[16];
  39. unsigned long pc;
  40. unsigned long pr;
  41. unsigned long sr;
  42. unsigned long gbr;
  43. unsigned long mach;
  44. unsigned long macl;
  45. long tra;
  46. };
  47. /*
  48. * This struct defines the way the DSP registers are stored on the
  49. * kernel stack during a system call or other kernel entry.
  50. */
  51. struct pt_dspregs {
  52. unsigned long a1;
  53. unsigned long a0g;
  54. unsigned long a1g;
  55. unsigned long m0;
  56. unsigned long m1;
  57. unsigned long a0;
  58. unsigned long x0;
  59. unsigned long x1;
  60. unsigned long y0;
  61. unsigned long y1;
  62. unsigned long dsr;
  63. unsigned long rs;
  64. unsigned long re;
  65. unsigned long mod;
  66. };
  67. #endif /* _UAPI__ASM_SH_PTRACE_32_H */