setup.c 4.4 KB

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  1. /*
  2. * linux/arch/sh/boards/se/770x/setup.c
  3. *
  4. * Copyright (C) 2000 Kazumoto Kojima
  5. *
  6. * Hitachi SolutionEngine Support.
  7. *
  8. */
  9. #include <linux/init.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/sh_eth.h>
  12. #include <mach-se/mach/se.h>
  13. #include <mach-se/mach/mrshpc.h>
  14. #include <asm/machvec.h>
  15. #include <asm/io.h>
  16. #include <asm/smc37c93x.h>
  17. #include <asm/heartbeat.h>
  18. /*
  19. * Configure the Super I/O chip
  20. */
  21. static void __init smsc_config(int index, int data)
  22. {
  23. outb_p(index, INDEX_PORT);
  24. outb_p(data, DATA_PORT);
  25. }
  26. /* XXX: Another candidate for a more generic cchip machine vector */
  27. static void __init smsc_setup(char **cmdline_p)
  28. {
  29. outb_p(CONFIG_ENTER, CONFIG_PORT);
  30. outb_p(CONFIG_ENTER, CONFIG_PORT);
  31. /* FDC */
  32. smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
  33. smsc_config(ACTIVATE_INDEX, 0x01);
  34. smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
  35. /* AUXIO (GPIO): to use IDE1 */
  36. smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
  37. smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
  38. smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
  39. /* COM1 */
  40. smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
  41. smsc_config(ACTIVATE_INDEX, 0x01);
  42. smsc_config(IO_BASE_HI_INDEX, 0x03);
  43. smsc_config(IO_BASE_LO_INDEX, 0xf8);
  44. smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
  45. /* COM2 */
  46. smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
  47. smsc_config(ACTIVATE_INDEX, 0x01);
  48. smsc_config(IO_BASE_HI_INDEX, 0x02);
  49. smsc_config(IO_BASE_LO_INDEX, 0xf8);
  50. smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
  51. /* RTC */
  52. smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
  53. smsc_config(ACTIVATE_INDEX, 0x01);
  54. smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
  55. /* XXX: PARPORT, KBD, and MOUSE will come here... */
  56. outb_p(CONFIG_EXIT, CONFIG_PORT);
  57. }
  58. static struct resource cf_ide_resources[] = {
  59. [0] = {
  60. .start = PA_MRSHPC_IO + 0x1f0,
  61. .end = PA_MRSHPC_IO + 0x1f0 + 8,
  62. .flags = IORESOURCE_MEM,
  63. },
  64. [1] = {
  65. .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
  66. .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
  67. .flags = IORESOURCE_MEM,
  68. },
  69. [2] = {
  70. .start = IRQ_CFCARD,
  71. .flags = IORESOURCE_IRQ,
  72. },
  73. };
  74. static struct platform_device cf_ide_device = {
  75. .name = "pata_platform",
  76. .id = -1,
  77. .num_resources = ARRAY_SIZE(cf_ide_resources),
  78. .resource = cf_ide_resources,
  79. };
  80. static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
  81. static struct heartbeat_data heartbeat_data = {
  82. .bit_pos = heartbeat_bit_pos,
  83. .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
  84. };
  85. static struct resource heartbeat_resource = {
  86. .start = PA_LED,
  87. .end = PA_LED,
  88. .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  89. };
  90. static struct platform_device heartbeat_device = {
  91. .name = "heartbeat",
  92. .id = -1,
  93. .dev = {
  94. .platform_data = &heartbeat_data,
  95. },
  96. .num_resources = 1,
  97. .resource = &heartbeat_resource,
  98. };
  99. #if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
  100. defined(CONFIG_CPU_SUBTYPE_SH7712)
  101. /* SH771X Ethernet driver */
  102. static struct sh_eth_plat_data sh_eth_plat = {
  103. .phy = PHY_ID,
  104. .phy_interface = PHY_INTERFACE_MODE_MII,
  105. };
  106. static struct resource sh_eth0_resources[] = {
  107. [0] = {
  108. .start = SH_ETH0_BASE,
  109. .end = SH_ETH0_BASE + 0x1B8,
  110. .flags = IORESOURCE_MEM,
  111. },
  112. [1] = {
  113. .start = SH_ETH0_IRQ,
  114. .end = SH_ETH0_IRQ,
  115. .flags = IORESOURCE_IRQ,
  116. },
  117. };
  118. static struct platform_device sh_eth0_device = {
  119. .name = "sh771x-ether",
  120. .id = 0,
  121. .dev = {
  122. .platform_data = &sh_eth_plat,
  123. },
  124. .num_resources = ARRAY_SIZE(sh_eth0_resources),
  125. .resource = sh_eth0_resources,
  126. };
  127. static struct resource sh_eth1_resources[] = {
  128. [0] = {
  129. .start = SH_ETH1_BASE,
  130. .end = SH_ETH1_BASE + 0x1B8,
  131. .flags = IORESOURCE_MEM,
  132. },
  133. [1] = {
  134. .start = SH_ETH1_IRQ,
  135. .end = SH_ETH1_IRQ,
  136. .flags = IORESOURCE_IRQ,
  137. },
  138. };
  139. static struct platform_device sh_eth1_device = {
  140. .name = "sh771x-ether",
  141. .id = 1,
  142. .dev = {
  143. .platform_data = &sh_eth_plat,
  144. },
  145. .num_resources = ARRAY_SIZE(sh_eth1_resources),
  146. .resource = sh_eth1_resources,
  147. };
  148. #endif
  149. static struct platform_device *se_devices[] __initdata = {
  150. &heartbeat_device,
  151. &cf_ide_device,
  152. #if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
  153. defined(CONFIG_CPU_SUBTYPE_SH7712)
  154. &sh_eth0_device,
  155. &sh_eth1_device,
  156. #endif
  157. };
  158. static int __init se_devices_setup(void)
  159. {
  160. mrshpc_setup_windows();
  161. return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
  162. }
  163. device_initcall(se_devices_setup);
  164. /*
  165. * The Machine Vector
  166. */
  167. static struct sh_machine_vector mv_se __initmv = {
  168. .mv_name = "SolutionEngine",
  169. .mv_setup = smsc_setup,
  170. .mv_init_irq = init_se_IRQ,
  171. };