warp.dts 7.0 KB

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  1. /*
  2. * Device Tree Source for PIKA Warp
  3. *
  4. * Copyright (c) 2008-2009 PIKA Technologies
  5. * Sean MacLennan <smaclennan@pikatech.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without
  9. * any warranty of any kind, whether express or implied.
  10. */
  11. /dts-v1/;
  12. / {
  13. #address-cells = <2>;
  14. #size-cells = <1>;
  15. model = "pika,warp";
  16. compatible = "pika,warp";
  17. dcr-parent = <&{/cpus/cpu@0}>;
  18. aliases {
  19. ethernet0 = &EMAC0;
  20. serial0 = &UART0;
  21. };
  22. cpus {
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. cpu@0 {
  26. device_type = "cpu";
  27. model = "PowerPC,440EP";
  28. reg = <0x00000000>;
  29. clock-frequency = <0>; /* Filled in by zImage */
  30. timebase-frequency = <0>; /* Filled in by zImage */
  31. i-cache-line-size = <32>;
  32. d-cache-line-size = <32>;
  33. i-cache-size = <32768>;
  34. d-cache-size = <32768>;
  35. dcr-controller;
  36. dcr-access-method = "native";
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
  42. };
  43. UIC0: interrupt-controller0 {
  44. compatible = "ibm,uic-440ep","ibm,uic";
  45. interrupt-controller;
  46. cell-index = <0>;
  47. dcr-reg = <0x0c0 0x009>;
  48. #address-cells = <0>;
  49. #size-cells = <0>;
  50. #interrupt-cells = <2>;
  51. };
  52. UIC1: interrupt-controller1 {
  53. compatible = "ibm,uic-440ep","ibm,uic";
  54. interrupt-controller;
  55. cell-index = <1>;
  56. dcr-reg = <0x0d0 0x009>;
  57. #address-cells = <0>;
  58. #size-cells = <0>;
  59. #interrupt-cells = <2>;
  60. interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  61. interrupt-parent = <&UIC0>;
  62. };
  63. SDR0: sdr {
  64. compatible = "ibm,sdr-440ep";
  65. dcr-reg = <0x00e 0x002>;
  66. };
  67. CPR0: cpr {
  68. compatible = "ibm,cpr-440ep";
  69. dcr-reg = <0x00c 0x002>;
  70. };
  71. plb {
  72. compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
  73. #address-cells = <2>;
  74. #size-cells = <1>;
  75. ranges;
  76. clock-frequency = <0>; /* Filled in by zImage */
  77. SDRAM0: sdram {
  78. compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
  79. dcr-reg = <0x010 0x002>;
  80. };
  81. DMA0: dma {
  82. compatible = "ibm,dma-440ep", "ibm,dma-440gp";
  83. dcr-reg = <0x100 0x027>;
  84. };
  85. MAL0: mcmal {
  86. compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
  87. dcr-reg = <0x180 0x062>;
  88. num-tx-chans = <4>;
  89. num-rx-chans = <2>;
  90. interrupt-parent = <&MAL0>;
  91. interrupts = <0x0 0x1 0x2 0x3 0x4>;
  92. #interrupt-cells = <1>;
  93. #address-cells = <0>;
  94. #size-cells = <0>;
  95. interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
  96. /*RXEOB*/ 0x1 &UIC0 0xb 0x4
  97. /*SERR*/ 0x2 &UIC1 0x0 0x4
  98. /*TXDE*/ 0x3 &UIC1 0x1 0x4
  99. /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
  100. };
  101. POB0: opb {
  102. compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
  103. #address-cells = <1>;
  104. #size-cells = <1>;
  105. ranges = <0x00000000 0x00000000 0x00000000 0x80000000
  106. 0x80000000 0x00000000 0x80000000 0x80000000>;
  107. interrupt-parent = <&UIC1>;
  108. interrupts = <0x7 0x4>;
  109. clock-frequency = <0>; /* Filled in by zImage */
  110. EBC0: ebc {
  111. compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
  112. dcr-reg = <0x012 0x002>;
  113. #address-cells = <2>;
  114. #size-cells = <1>;
  115. clock-frequency = <0>; /* Filled in by zImage */
  116. interrupts = <0x5 0x1>;
  117. interrupt-parent = <&UIC1>;
  118. fpga@2,0 {
  119. compatible = "pika,fpga";
  120. reg = <0x00000002 0x00000000 0x00001000>;
  121. interrupts = <0x18 0x8>;
  122. interrupt-parent = <&UIC0>;
  123. };
  124. fpga@2,2000 {
  125. compatible = "pika,fpga-sgl";
  126. reg = <0x00000002 0x00002000 0x00000200>;
  127. };
  128. fpga@2,4000 {
  129. compatible = "pika,fpga-sd";
  130. reg = <0x00000002 0x00004000 0x00004000>;
  131. };
  132. nor@0,0 {
  133. compatible = "amd,s29gl032a", "cfi-flash";
  134. bank-width = <2>;
  135. reg = <0x00000000 0x00000000 0x00400000>;
  136. #address-cells = <1>;
  137. #size-cells = <1>;
  138. partition@0 {
  139. label = "splash";
  140. reg = <0x00000000 0x00010000>;
  141. };
  142. partition@300000 {
  143. label = "fpga";
  144. reg = <0x0300000 0x00040000>;
  145. };
  146. partition@340000 {
  147. label = "env";
  148. reg = <0x0340000 0x00040000>;
  149. };
  150. partition@380000 {
  151. label = "u-boot";
  152. reg = <0x0380000 0x00080000>;
  153. };
  154. };
  155. ndfc@1,0 {
  156. compatible = "ibm,ndfc";
  157. reg = <0x00000001 0x00000000 0x00002000>;
  158. ccr = <0x00001000>;
  159. bank-settings = <0x80002222>;
  160. #address-cells = <1>;
  161. #size-cells = <1>;
  162. nand {
  163. #address-cells = <1>;
  164. #size-cells = <1>;
  165. partition@0 {
  166. label = "kernel";
  167. reg = <0x00000000 0x00200000>;
  168. };
  169. partition@200000 {
  170. label = "root";
  171. reg = <0x00200000 0x03E00000>;
  172. };
  173. partition@40000000 {
  174. label = "persistent";
  175. reg = <0x04000000 0x04000000>;
  176. };
  177. partition@80000000 {
  178. label = "persistent1";
  179. reg = <0x08000000 0x04000000>;
  180. };
  181. partition@C0000000 {
  182. label = "persistent2";
  183. reg = <0x0C000000 0x04000000>;
  184. };
  185. };
  186. };
  187. };
  188. UART0: serial@ef600300 {
  189. device_type = "serial";
  190. compatible = "ns16550";
  191. reg = <0xef600300 0x00000008>;
  192. virtual-reg = <0xef600300>;
  193. clock-frequency = <0>; /* Filled in by zImage */
  194. current-speed = <115200>;
  195. interrupt-parent = <&UIC0>;
  196. interrupts = <0x0 0x4>;
  197. };
  198. IIC0: i2c@ef600700 {
  199. compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
  200. reg = <0xef600700 0x00000014>;
  201. interrupt-parent = <&UIC0>;
  202. interrupts = <0x2 0x4>;
  203. #address-cells = <1>;
  204. #size-cells = <0>;
  205. ad7414@4a {
  206. compatible = "adi,ad7414";
  207. reg = <0x4a>;
  208. interrupts = <0x19 0x8>;
  209. interrupt-parent = <&UIC0>;
  210. };
  211. /* This will create 52 and 53 */
  212. at24@52 {
  213. compatible = "at,24c04";
  214. reg = <0x52>;
  215. };
  216. };
  217. GPIO0: gpio@ef600b00 {
  218. compatible = "ibm,ppc4xx-gpio";
  219. reg = <0xef600b00 0x00000048>;
  220. #gpio-cells = <2>;
  221. gpio-controller;
  222. };
  223. GPIO1: gpio@ef600c00 {
  224. compatible = "ibm,ppc4xx-gpio";
  225. reg = <0xef600c00 0x00000048>;
  226. #gpio-cells = <2>;
  227. gpio-controller;
  228. };
  229. power-leds {
  230. compatible = "gpio-leds";
  231. green {
  232. gpios = <&GPIO1 0 0>;
  233. default-state = "keep";
  234. };
  235. red {
  236. gpios = <&GPIO1 1 0>;
  237. default-state = "keep";
  238. };
  239. };
  240. ZMII0: emac-zmii@ef600d00 {
  241. compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
  242. reg = <0xef600d00 0x0000000c>;
  243. };
  244. EMAC0: ethernet@ef600e00 {
  245. device_type = "network";
  246. compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
  247. interrupt-parent = <&UIC1>;
  248. interrupts = <0x1c 0x4 0x1d 0x4>;
  249. reg = <0xef600e00 0x00000070>;
  250. local-mac-address = [000000000000];
  251. mal-device = <&MAL0>;
  252. mal-tx-channel = <0 1>;
  253. mal-rx-channel = <0>;
  254. cell-index = <0>;
  255. max-frame-size = <1500>;
  256. rx-fifo-size = <4096>;
  257. tx-fifo-size = <2048>;
  258. phy-mode = "rmii";
  259. phy-map = <0x00000000>;
  260. zmii-device = <&ZMII0>;
  261. zmii-channel = <0>;
  262. };
  263. usb@ef601000 {
  264. compatible = "ohci-be";
  265. reg = <0xef601000 0x00000080>;
  266. interrupts = <0x8 0x1 0x9 0x1>;
  267. interrupt-parent = < &UIC1 >;
  268. };
  269. };
  270. };
  271. chosen {
  272. linux,stdout-path = "/plb/opb/serial@ef600300";
  273. };
  274. };