mpc8272ads.dts 6.4 KB

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  1. /*
  2. * MPC8272 ADS Device Tree Source
  3. *
  4. * Copyright 2005,2008 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "MPC8272ADS";
  14. compatible = "fsl,mpc8272ads";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. aliases {
  18. ethernet0 = &eth0;
  19. ethernet1 = &eth1;
  20. serial0 = &scc1;
  21. serial1 = &scc4;
  22. };
  23. cpus {
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. PowerPC,8272@0 {
  27. device_type = "cpu";
  28. reg = <0x0>;
  29. d-cache-line-size = <32>;
  30. i-cache-line-size = <32>;
  31. d-cache-size = <16384>;
  32. i-cache-size = <16384>;
  33. timebase-frequency = <0>;
  34. bus-frequency = <0>;
  35. clock-frequency = <0>;
  36. };
  37. };
  38. memory {
  39. device_type = "memory";
  40. reg = <0x0 0x0>;
  41. };
  42. localbus@f0010100 {
  43. compatible = "fsl,mpc8272-localbus",
  44. "fsl,pq2-localbus";
  45. #address-cells = <2>;
  46. #size-cells = <1>;
  47. reg = <0xf0010100 0x40>;
  48. ranges = <0x0 0x0 0xff800000 0x00800000
  49. 0x1 0x0 0xf4500000 0x8000
  50. 0x3 0x0 0xf8200000 0x8000>;
  51. flash@0,0 {
  52. compatible = "jedec-flash";
  53. reg = <0x0 0x0 0x00800000>;
  54. bank-width = <4>;
  55. device-width = <1>;
  56. };
  57. board-control@1,0 {
  58. reg = <0x1 0x0 0x20>;
  59. compatible = "fsl,mpc8272ads-bcsr";
  60. };
  61. PCI_PIC: interrupt-controller@3,0 {
  62. compatible = "fsl,mpc8272ads-pci-pic",
  63. "fsl,pq2ads-pci-pic";
  64. #interrupt-cells = <1>;
  65. interrupt-controller;
  66. reg = <0x3 0x0 0x8>;
  67. interrupt-parent = <&PIC>;
  68. interrupts = <20 8>;
  69. };
  70. };
  71. pci@f0010800 {
  72. device_type = "pci";
  73. reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
  74. compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
  75. #interrupt-cells = <1>;
  76. #size-cells = <2>;
  77. #address-cells = <3>;
  78. clock-frequency = <66666666>;
  79. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  80. interrupt-map = <
  81. /* IDSEL 0x16 */
  82. 0xb000 0x0 0x0 0x1 &PCI_PIC 0
  83. 0xb000 0x0 0x0 0x2 &PCI_PIC 1
  84. 0xb000 0x0 0x0 0x3 &PCI_PIC 2
  85. 0xb000 0x0 0x0 0x4 &PCI_PIC 3
  86. /* IDSEL 0x17 */
  87. 0xb800 0x0 0x0 0x1 &PCI_PIC 4
  88. 0xb800 0x0 0x0 0x2 &PCI_PIC 5
  89. 0xb800 0x0 0x0 0x3 &PCI_PIC 6
  90. 0xb800 0x0 0x0 0x4 &PCI_PIC 7
  91. /* IDSEL 0x18 */
  92. 0xc000 0x0 0x0 0x1 &PCI_PIC 8
  93. 0xc000 0x0 0x0 0x2 &PCI_PIC 9
  94. 0xc000 0x0 0x0 0x3 &PCI_PIC 10
  95. 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
  96. interrupt-parent = <&PIC>;
  97. interrupts = <18 8>;
  98. ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
  99. 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
  100. 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
  101. };
  102. soc@f0000000 {
  103. #address-cells = <1>;
  104. #size-cells = <1>;
  105. device_type = "soc";
  106. compatible = "fsl,mpc8272", "fsl,pq2-soc";
  107. ranges = <0x0 0xf0000000 0x53000>;
  108. // Temporary -- will go away once kernel uses ranges for get_immrbase().
  109. reg = <0xf0000000 0x53000>;
  110. cpm@119c0 {
  111. #address-cells = <1>;
  112. #size-cells = <1>;
  113. compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
  114. reg = <0x119c0 0x30>;
  115. ranges;
  116. muram@0 {
  117. #address-cells = <1>;
  118. #size-cells = <1>;
  119. ranges = <0x0 0x0 0x10000>;
  120. data@0 {
  121. compatible = "fsl,cpm-muram-data";
  122. reg = <0x0 0x2000 0x9800 0x800>;
  123. };
  124. };
  125. brg@119f0 {
  126. compatible = "fsl,mpc8272-brg",
  127. "fsl,cpm2-brg",
  128. "fsl,cpm-brg";
  129. reg = <0x119f0 0x10 0x115f0 0x10>;
  130. };
  131. scc1: serial@11a00 {
  132. device_type = "serial";
  133. compatible = "fsl,mpc8272-scc-uart",
  134. "fsl,cpm2-scc-uart";
  135. reg = <0x11a00 0x20 0x8000 0x100>;
  136. interrupts = <40 8>;
  137. interrupt-parent = <&PIC>;
  138. fsl,cpm-brg = <1>;
  139. fsl,cpm-command = <0x800000>;
  140. };
  141. scc4: serial@11a60 {
  142. device_type = "serial";
  143. compatible = "fsl,mpc8272-scc-uart",
  144. "fsl,cpm2-scc-uart";
  145. reg = <0x11a60 0x20 0x8300 0x100>;
  146. interrupts = <43 8>;
  147. interrupt-parent = <&PIC>;
  148. fsl,cpm-brg = <4>;
  149. fsl,cpm-command = <0xce00000>;
  150. };
  151. usb@11b60 {
  152. compatible = "fsl,mpc8272-cpm-usb";
  153. reg = <0x11b60 0x40 0x8b00 0x100>;
  154. interrupts = <11 8>;
  155. interrupt-parent = <&PIC>;
  156. mode = "peripheral";
  157. };
  158. mdio@10d40 {
  159. compatible = "fsl,mpc8272ads-mdio-bitbang",
  160. "fsl,mpc8272-mdio-bitbang",
  161. "fsl,cpm2-mdio-bitbang";
  162. reg = <0x10d40 0x14>;
  163. #address-cells = <1>;
  164. #size-cells = <0>;
  165. fsl,mdio-pin = <18>;
  166. fsl,mdc-pin = <19>;
  167. PHY0: ethernet-phy@0 {
  168. interrupt-parent = <&PIC>;
  169. interrupts = <23 8>;
  170. reg = <0x0>;
  171. };
  172. PHY1: ethernet-phy@1 {
  173. interrupt-parent = <&PIC>;
  174. interrupts = <23 8>;
  175. reg = <0x3>;
  176. };
  177. };
  178. eth0: ethernet@11300 {
  179. device_type = "network";
  180. compatible = "fsl,mpc8272-fcc-enet",
  181. "fsl,cpm2-fcc-enet";
  182. reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
  183. local-mac-address = [ 00 00 00 00 00 00 ];
  184. interrupts = <32 8>;
  185. interrupt-parent = <&PIC>;
  186. phy-handle = <&PHY0>;
  187. linux,network-index = <0>;
  188. fsl,cpm-command = <0x12000300>;
  189. };
  190. eth1: ethernet@11320 {
  191. device_type = "network";
  192. compatible = "fsl,mpc8272-fcc-enet",
  193. "fsl,cpm2-fcc-enet";
  194. reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
  195. local-mac-address = [ 00 00 00 00 00 00 ];
  196. interrupts = <33 8>;
  197. interrupt-parent = <&PIC>;
  198. phy-handle = <&PHY1>;
  199. linux,network-index = <1>;
  200. fsl,cpm-command = <0x16200300>;
  201. };
  202. i2c@11860 {
  203. compatible = "fsl,mpc8272-i2c",
  204. "fsl,cpm2-i2c";
  205. reg = <0x11860 0x20 0x8afc 0x2>;
  206. interrupts = <1 8>;
  207. interrupt-parent = <&PIC>;
  208. fsl,cpm-command = <0x29600000>;
  209. #address-cells = <1>;
  210. #size-cells = <0>;
  211. };
  212. };
  213. PIC: interrupt-controller@10c00 {
  214. #interrupt-cells = <2>;
  215. interrupt-controller;
  216. reg = <0x10c00 0x80>;
  217. compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
  218. };
  219. crypto@30000 {
  220. compatible = "fsl,sec1.0";
  221. reg = <0x40000 0x13000>;
  222. interrupts = <47 0x8>;
  223. interrupt-parent = <&PIC>;
  224. fsl,num-channels = <4>;
  225. fsl,channel-fifo-len = <24>;
  226. fsl,exec-units-mask = <0x7e>;
  227. fsl,descriptor-types-mask = <0x1010415>;
  228. };
  229. };
  230. chosen {
  231. linux,stdout-path = "/soc/cpm/serial@11a00";
  232. };
  233. };