t1023rdb.dts 5.1 KB

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  1. /*
  2. * T1023 RDB Device Tree Source
  3. *
  4. * Copyright 2014 Freescale Semiconductor Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
  24. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. /include/ "t102xsi-pre.dtsi"
  35. / {
  36. model = "fsl,T1023RDB";
  37. compatible = "fsl,T1023RDB";
  38. #address-cells = <2>;
  39. #size-cells = <2>;
  40. interrupt-parent = <&mpic>;
  41. ifc: localbus@ffe124000 {
  42. reg = <0xf 0xfe124000 0 0x2000>;
  43. ranges = <0 0 0xf 0xe8000000 0x08000000
  44. 1 0 0xf 0xff800000 0x00010000>;
  45. nor@0,0 {
  46. #address-cells = <1>;
  47. #size-cells = <1>;
  48. status = "disabled";
  49. compatible = "cfi-flash";
  50. reg = <0x0 0x0 0x8000000>;
  51. bank-width = <2>;
  52. device-width = <1>;
  53. };
  54. nand@1,0 {
  55. #address-cells = <1>;
  56. #size-cells = <1>;
  57. compatible = "fsl,ifc-nand";
  58. reg = <0x1 0x0 0x10000>;
  59. };
  60. };
  61. memory {
  62. device_type = "memory";
  63. };
  64. dcsr: dcsr@f00000000 {
  65. ranges = <0x00000000 0xf 0x00000000 0x01072000>;
  66. };
  67. soc: soc@ffe000000 {
  68. ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
  69. reg = <0xf 0xfe000000 0 0x00001000>;
  70. spi@110000 {
  71. flash@0 {
  72. #address-cells = <1>;
  73. #size-cells = <1>;
  74. compatible = "spansion,s25fl512s", "jedec,spi-nor";
  75. reg = <0>;
  76. spi-max-frequency = <10000000>; /* input clk */
  77. };
  78. };
  79. i2c@118000 {
  80. eeprom@50 {
  81. compatible = "st,m24256";
  82. reg = <0x50>;
  83. };
  84. rtc@68 {
  85. compatible = "dallas,ds1339";
  86. reg = <0x68>;
  87. interrupts = <0x5 0x1 0 0>;
  88. };
  89. };
  90. i2c@118100 {
  91. current-sensor@40 {
  92. compatible = "ti,ina220";
  93. reg = <0x40>;
  94. shunt-resistor = <1000>;
  95. };
  96. current-sensor@41 {
  97. compatible = "ti,ina220";
  98. reg = <0x41>;
  99. shunt-resistor = <1000>;
  100. };
  101. };
  102. fman@400000 {
  103. fm1mac1: ethernet@e0000 {
  104. phy-handle = <&sgmii_rtk_phy2>;
  105. phy-connection-type = "sgmii";
  106. sleep = <&rcpm 0x80000000>;
  107. };
  108. fm1mac2: ethernet@e2000 {
  109. sleep = <&rcpm 0x40000000>;
  110. };
  111. fm1mac3: ethernet@e4000 {
  112. phy-handle = <&sgmii_aqr_phy3>;
  113. phy-connection-type = "sgmii-2500";
  114. sleep = <&rcpm 0x20000000>;
  115. };
  116. fm1mac4: ethernet@e6000 {
  117. phy-handle = <&rgmii_rtk_phy1>;
  118. phy-connection-type = "rgmii";
  119. sleep = <&rcpm 0x10000000>;
  120. };
  121. mdio0: mdio@fc000 {
  122. rgmii_rtk_phy1: ethernet-phy@1 {
  123. reg = <0x1>;
  124. };
  125. sgmii_rtk_phy2: ethernet-phy@3 {
  126. reg = <0x3>;
  127. };
  128. };
  129. xmdio0: mdio@fd000 {
  130. sgmii_aqr_phy3: ethernet-phy@2 {
  131. compatible = "ethernet-phy-ieee802.3-c45";
  132. reg = <0x2>;
  133. };
  134. };
  135. };
  136. };
  137. pci0: pcie@ffe240000 {
  138. reg = <0xf 0xfe240000 0 0x10000>;
  139. ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000
  140. 0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>;
  141. pcie@0 {
  142. ranges = <0x02000000 0 0xe0000000
  143. 0x02000000 0 0xe0000000
  144. 0 0x10000000
  145. 0x01000000 0 0x00000000
  146. 0x01000000 0 0x00000000
  147. 0 0x00010000>;
  148. };
  149. };
  150. pci1: pcie@ffe250000 {
  151. reg = <0xf 0xfe250000 0 0x10000>;
  152. ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
  153. 0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>;
  154. pcie@0 {
  155. ranges = <0x02000000 0 0xe0000000
  156. 0x02000000 0 0xe0000000
  157. 0 0x10000000
  158. 0x01000000 0 0x00000000
  159. 0x01000000 0 0x00000000
  160. 0 0x00010000>;
  161. };
  162. };
  163. pci2: pcie@ffe260000 {
  164. reg = <0xf 0xfe260000 0 0x10000>;
  165. ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
  166. 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
  167. pcie@0 {
  168. ranges = <0x02000000 0 0xe0000000
  169. 0x02000000 0 0xe0000000
  170. 0 0x10000000
  171. 0x01000000 0 0x00000000
  172. 0x01000000 0 0x00000000
  173. 0 0x00010000>;
  174. };
  175. };
  176. };
  177. #include "t1023si-post.dtsi"