pq3-mpic.dtsi 2.6 KB

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  1. /*
  2. * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ]
  3. *
  4. * Copyright 2011 Freescale Semiconductor Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. mpic: pic@40000 {
  35. interrupt-controller;
  36. #address-cells = <0>;
  37. #interrupt-cells = <4>;
  38. reg = <0x40000 0x40000>;
  39. compatible = "fsl,mpic";
  40. device_type = "open-pic";
  41. big-endian;
  42. single-cpu-affinity;
  43. last-interrupt-source = <255>;
  44. };
  45. timer@41100 {
  46. compatible = "fsl,mpic-global-timer";
  47. reg = <0x41100 0x100 0x41300 4>;
  48. interrupts = <0 0 3 0
  49. 1 0 3 0
  50. 2 0 3 0
  51. 3 0 3 0>;
  52. };
  53. message@41400 {
  54. compatible = "fsl,mpic-v3.1-msgr";
  55. reg = <0x41400 0x200>;
  56. interrupts = <
  57. 0xb0 2 0 0
  58. 0xb1 2 0 0
  59. 0xb2 2 0 0
  60. 0xb3 2 0 0>;
  61. };
  62. msi@41600 {
  63. compatible = "fsl,mpic-msi";
  64. reg = <0x41600 0x80>;
  65. msi-available-ranges = <0 0x100>;
  66. interrupts = <
  67. 0xe0 0 0 0
  68. 0xe1 0 0 0
  69. 0xe2 0 0 0
  70. 0xe3 0 0 0
  71. 0xe4 0 0 0
  72. 0xe5 0 0 0
  73. 0xe6 0 0 0
  74. 0xe7 0 0 0>;
  75. };