mpc8641_hpcn_36b.dts 7.2 KB

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  1. /*
  2. * MPC8641 HPCN Device Tree Source
  3. *
  4. * Copyright 2008-2009 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /include/ "mpc8641si-pre.dtsi"
  12. / {
  13. model = "MPC8641HPCN";
  14. compatible = "fsl,mpc8641hpcn";
  15. #address-cells = <2>;
  16. #size-cells = <2>;
  17. memory {
  18. device_type = "memory";
  19. reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0
  20. };
  21. lbc: localbus@fffe05000 {
  22. reg = <0x0f 0xffe05000 0x0 0x1000>;
  23. ranges = <0 0 0xf 0xef800000 0x00800000
  24. 2 0 0xf 0xffdf8000 0x00008000
  25. 3 0 0xf 0xffdf0000 0x00008000>;
  26. flash@0,0 {
  27. compatible = "cfi-flash";
  28. reg = <0 0 0x00800000>;
  29. bank-width = <2>;
  30. device-width = <2>;
  31. #address-cells = <1>;
  32. #size-cells = <1>;
  33. partition@0 {
  34. label = "kernel";
  35. reg = <0x00000000 0x00300000>;
  36. };
  37. partition@300000 {
  38. label = "firmware b";
  39. reg = <0x00300000 0x00100000>;
  40. read-only;
  41. };
  42. partition@400000 {
  43. label = "fs";
  44. reg = <0x00400000 0x00300000>;
  45. };
  46. partition@700000 {
  47. label = "firmware a";
  48. reg = <0x00700000 0x00100000>;
  49. read-only;
  50. };
  51. };
  52. };
  53. soc: soc8641@fffe00000 {
  54. ranges = <0x00000000 0x0f 0xffe00000 0x00100000>;
  55. enet0: ethernet@24000 {
  56. tbi-handle = <&tbi0>;
  57. phy-handle = <&phy0>;
  58. phy-connection-type = "rgmii-id";
  59. };
  60. mdio@24520 {
  61. phy0: ethernet-phy@0 {
  62. interrupts = <10 1 0 0>;
  63. reg = <0>;
  64. };
  65. phy1: ethernet-phy@1 {
  66. interrupts = <10 1 0 0>;
  67. reg = <1>;
  68. };
  69. phy2: ethernet-phy@2 {
  70. interrupts = <10 1 0 0>;
  71. reg = <2>;
  72. };
  73. phy3: ethernet-phy@3 {
  74. interrupts = <10 1 0 0>;
  75. reg = <3>;
  76. };
  77. tbi0: tbi-phy@11 {
  78. reg = <0x11>;
  79. device_type = "tbi-phy";
  80. };
  81. };
  82. enet1: ethernet@25000 {
  83. tbi-handle = <&tbi1>;
  84. phy-handle = <&phy1>;
  85. phy-connection-type = "rgmii-id";
  86. };
  87. mdio@25520 {
  88. tbi1: tbi-phy@11 {
  89. reg = <0x11>;
  90. device_type = "tbi-phy";
  91. };
  92. };
  93. enet2: ethernet@26000 {
  94. tbi-handle = <&tbi2>;
  95. phy-handle = <&phy2>;
  96. phy-connection-type = "rgmii-id";
  97. };
  98. mdio@26520 {
  99. tbi2: tbi-phy@11 {
  100. reg = <0x11>;
  101. device_type = "tbi-phy";
  102. };
  103. };
  104. enet3: ethernet@27000 {
  105. tbi-handle = <&tbi3>;
  106. phy-handle = <&phy3>;
  107. phy-connection-type = "rgmii-id";
  108. };
  109. mdio@27520 {
  110. tbi3: tbi-phy@11 {
  111. reg = <0x11>;
  112. device_type = "tbi-phy";
  113. };
  114. };
  115. };
  116. pci0: pcie@fffe08000 {
  117. reg = <0x0f 0xffe08000 0x0 0x1000>;
  118. ranges = <0x02000000 0x0 0xe0000000 0x0c 0x00000000 0x0 0x20000000
  119. 0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>;
  120. interrupt-map-mask = <0xff00 0 0 7>;
  121. interrupt-map = <
  122. /* IDSEL 0x11 func 0 - PCI slot 1 */
  123. 0x8800 0 0 1 &mpic 2 1
  124. 0x8800 0 0 2 &mpic 3 1
  125. 0x8800 0 0 3 &mpic 4 1
  126. 0x8800 0 0 4 &mpic 1 1
  127. /* IDSEL 0x11 func 1 - PCI slot 1 */
  128. 0x8900 0 0 1 &mpic 2 1
  129. 0x8900 0 0 2 &mpic 3 1
  130. 0x8900 0 0 3 &mpic 4 1
  131. 0x8900 0 0 4 &mpic 1 1
  132. /* IDSEL 0x11 func 2 - PCI slot 1 */
  133. 0x8a00 0 0 1 &mpic 2 1
  134. 0x8a00 0 0 2 &mpic 3 1
  135. 0x8a00 0 0 3 &mpic 4 1
  136. 0x8a00 0 0 4 &mpic 1 1
  137. /* IDSEL 0x11 func 3 - PCI slot 1 */
  138. 0x8b00 0 0 1 &mpic 2 1
  139. 0x8b00 0 0 2 &mpic 3 1
  140. 0x8b00 0 0 3 &mpic 4 1
  141. 0x8b00 0 0 4 &mpic 1 1
  142. /* IDSEL 0x11 func 4 - PCI slot 1 */
  143. 0x8c00 0 0 1 &mpic 2 1
  144. 0x8c00 0 0 2 &mpic 3 1
  145. 0x8c00 0 0 3 &mpic 4 1
  146. 0x8c00 0 0 4 &mpic 1 1
  147. /* IDSEL 0x11 func 5 - PCI slot 1 */
  148. 0x8d00 0 0 1 &mpic 2 1
  149. 0x8d00 0 0 2 &mpic 3 1
  150. 0x8d00 0 0 3 &mpic 4 1
  151. 0x8d00 0 0 4 &mpic 1 1
  152. /* IDSEL 0x11 func 6 - PCI slot 1 */
  153. 0x8e00 0 0 1 &mpic 2 1
  154. 0x8e00 0 0 2 &mpic 3 1
  155. 0x8e00 0 0 3 &mpic 4 1
  156. 0x8e00 0 0 4 &mpic 1 1
  157. /* IDSEL 0x11 func 7 - PCI slot 1 */
  158. 0x8f00 0 0 1 &mpic 2 1
  159. 0x8f00 0 0 2 &mpic 3 1
  160. 0x8f00 0 0 3 &mpic 4 1
  161. 0x8f00 0 0 4 &mpic 1 1
  162. /* IDSEL 0x12 func 0 - PCI slot 2 */
  163. 0x9000 0 0 1 &mpic 3 1
  164. 0x9000 0 0 2 &mpic 4 1
  165. 0x9000 0 0 3 &mpic 1 1
  166. 0x9000 0 0 4 &mpic 2 1
  167. /* IDSEL 0x12 func 1 - PCI slot 2 */
  168. 0x9100 0 0 1 &mpic 3 1
  169. 0x9100 0 0 2 &mpic 4 1
  170. 0x9100 0 0 3 &mpic 1 1
  171. 0x9100 0 0 4 &mpic 2 1
  172. /* IDSEL 0x12 func 2 - PCI slot 2 */
  173. 0x9200 0 0 1 &mpic 3 1
  174. 0x9200 0 0 2 &mpic 4 1
  175. 0x9200 0 0 3 &mpic 1 1
  176. 0x9200 0 0 4 &mpic 2 1
  177. /* IDSEL 0x12 func 3 - PCI slot 2 */
  178. 0x9300 0 0 1 &mpic 3 1
  179. 0x9300 0 0 2 &mpic 4 1
  180. 0x9300 0 0 3 &mpic 1 1
  181. 0x9300 0 0 4 &mpic 2 1
  182. /* IDSEL 0x12 func 4 - PCI slot 2 */
  183. 0x9400 0 0 1 &mpic 3 1
  184. 0x9400 0 0 2 &mpic 4 1
  185. 0x9400 0 0 3 &mpic 1 1
  186. 0x9400 0 0 4 &mpic 2 1
  187. /* IDSEL 0x12 func 5 - PCI slot 2 */
  188. 0x9500 0 0 1 &mpic 3 1
  189. 0x9500 0 0 2 &mpic 4 1
  190. 0x9500 0 0 3 &mpic 1 1
  191. 0x9500 0 0 4 &mpic 2 1
  192. /* IDSEL 0x12 func 6 - PCI slot 2 */
  193. 0x9600 0 0 1 &mpic 3 1
  194. 0x9600 0 0 2 &mpic 4 1
  195. 0x9600 0 0 3 &mpic 1 1
  196. 0x9600 0 0 4 &mpic 2 1
  197. /* IDSEL 0x12 func 7 - PCI slot 2 */
  198. 0x9700 0 0 1 &mpic 3 1
  199. 0x9700 0 0 2 &mpic 4 1
  200. 0x9700 0 0 3 &mpic 1 1
  201. 0x9700 0 0 4 &mpic 2 1
  202. // IDSEL 0x1c USB
  203. 0xe000 0 0 1 &i8259 12 2
  204. 0xe100 0 0 2 &i8259 9 2
  205. 0xe200 0 0 3 &i8259 10 2
  206. 0xe300 0 0 4 &i8259 11 2
  207. // IDSEL 0x1d Audio
  208. 0xe800 0 0 1 &i8259 6 2
  209. // IDSEL 0x1e Legacy
  210. 0xf000 0 0 1 &i8259 7 2
  211. 0xf100 0 0 1 &i8259 7 2
  212. // IDSEL 0x1f IDE/SATA
  213. 0xf800 0 0 1 &i8259 14 2
  214. 0xf900 0 0 1 &i8259 5 2
  215. >;
  216. pcie@0 {
  217. ranges = <0x02000000 0x0 0xe0000000
  218. 0x02000000 0x0 0xe0000000
  219. 0x0 0x20000000
  220. 0x01000000 0x0 0x00000000
  221. 0x01000000 0x0 0x00000000
  222. 0x0 0x00010000>;
  223. uli1575@0 {
  224. reg = <0 0 0 0 0>;
  225. #size-cells = <2>;
  226. #address-cells = <3>;
  227. ranges = <0x02000000 0x0 0xe0000000
  228. 0x02000000 0x0 0xe0000000
  229. 0x0 0x20000000
  230. 0x01000000 0x0 0x00000000
  231. 0x01000000 0x0 0x00000000
  232. 0x0 0x00010000>;
  233. isa@1e {
  234. device_type = "isa";
  235. #size-cells = <1>;
  236. #address-cells = <2>;
  237. reg = <0xf000 0 0 0 0>;
  238. ranges = <1 0 0x01000000 0 0
  239. 0x00001000>;
  240. interrupt-parent = <&i8259>;
  241. i8259: interrupt-controller@20 {
  242. reg = <1 0x20 2
  243. 1 0xa0 2
  244. 1 0x4d0 2>;
  245. interrupt-controller;
  246. device_type = "interrupt-controller";
  247. #address-cells = <0>;
  248. #interrupt-cells = <2>;
  249. compatible = "chrp,iic";
  250. interrupts = <9 2 0 0>;
  251. };
  252. i8042@60 {
  253. #size-cells = <0>;
  254. #address-cells = <1>;
  255. reg = <1 0x60 1 1 0x64 1>;
  256. interrupts = <1 3 12 3>;
  257. interrupt-parent = <&i8259>;
  258. keyboard@0 {
  259. reg = <0>;
  260. compatible = "pnpPNP,303";
  261. };
  262. mouse@1 {
  263. reg = <1>;
  264. compatible = "pnpPNP,f03";
  265. };
  266. };
  267. rtc@70 {
  268. compatible =
  269. "pnpPNP,b00";
  270. reg = <1 0x70 2>;
  271. };
  272. gpio@400 {
  273. reg = <1 0x400 0x80>;
  274. };
  275. };
  276. };
  277. };
  278. };
  279. pci1: pcie@fffe09000 {
  280. reg = <0x0f 0xffe09000 0x0 0x1000>;
  281. ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000
  282. 0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>;
  283. pcie@0 {
  284. ranges = <0x02000000 0x0 0xe0000000
  285. 0x02000000 0x0 0xe0000000
  286. 0x0 0x20000000
  287. 0x01000000 0x0 0x00000000
  288. 0x01000000 0x0 0x00000000
  289. 0x0 0x00010000>;
  290. };
  291. };
  292. };
  293. /include/ "mpc8641si-post.dtsi"