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mpc8548cds_36b.dts

mpc8548cds_36b.dts 2.2 KB
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  1. /*
    2. 

  2.  * MPC8548 CDS Device Tree Source (36-bit address map)
    3. 

  3.  *
    4. 

  4.  * Copyright 2012 Freescale Semiconductor Inc.
    5. 

  5.  *
    6. 

  6.  * This program is free software; you can redistribute  it and/or modify it
    7. 

  7.  * under  the terms of  the GNU General  Public License as published by the
    8. 

  8.  * Free Software Foundation;  either version 2 of the  License, or (at your
    9. 

  9.  * option) any later version.
    10. 

  10.  */
    11. 

  11. 

  12. /include/ "mpc8548si-pre.dtsi"
    13. 

  13. 

  14. / {
    15. 

  15. 	model = "MPC8548CDS";
    16. 

  16. 	compatible = "MPC8548CDS", "MPC85xxCDS";
    17. 

  17. 

  18. 	memory {
    19. 

  19. 		device_type = "memory";
    20. 

  20. 		reg = <0 0 0x0 0x8000000>;	// 128M at 0x0
    21. 

  21. 	};
    22. 

  22. 

  23. 	board_lbc: lbc: localbus@fe0005000 {
    24. 

  24. 		reg = <0xf 0xe0005000 0 0x1000>;
    25. 

  25. 

  26. 		ranges = <0x0 0x0 0xf 0xff000000 0x01000000
    27. 

  27. 			  0x1 0x0 0xf 0xf8004000 0x00001000>;
    28. 

  28. 

  29. 	};
    30. 

  30. 

  31. 	board_soc: soc: soc8548@fe0000000 {
    32. 

  32. 		ranges = <0 0xf 0xe0000000 0x100000>;
    33. 

  33. 	};
    34. 

  34. 

  35. 	board_pci0: pci0: pci@fe0008000 {
    36. 

  36. 		reg = <0xf 0xe0008000 0 0x1000>;
    37. 

  37. 		ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000
    38. 

  38. 			  0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>;
    39. 

  39. 		clock-frequency = <66666666>;
    40. 

  40. 	};
    41. 

  41. 

  42. 	pci1: pci@fe0009000 {
    43. 

  43. 		reg = <0xf 0xe0009000 0 0x1000>;
    44. 

  44. 		ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
    45. 

  45. 			  0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>;
    46. 

  46. 		clock-frequency = <66666666>;
    47. 

  47. 		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
    48. 

  48. 		interrupt-map = <
    49. 

  49. 

  50. 			/* IDSEL 0x15 */
    51. 

  51. 			0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
    52. 

  52. 			0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
    53. 

  53. 			0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
    54. 

  54. 			0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
    55. 

  55. 	};
    56. 

  56. 

  57. 	pci2: pcie@fe000a000 {
    58. 

  58. 		reg = <0xf 0xe000a000 0 0x1000>;
    59. 

  59. 		ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
    60. 

  60. 			  0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>;
    61. 

  61. 		pcie@0 {
    62. 

  62. 			ranges = <0x2000000 0x0 0xa0000000
    63. 

  63. 				  0x2000000 0x0 0xa0000000
    64. 

  64. 				  0x0 0x20000000
    65. 

  65. 

  66. 				  0x1000000 0x0 0x0
    67. 

  67. 				  0x1000000 0x0 0x0
    68. 

  68. 				  0x0 0x100000>;
    69. 

  69. 		};
    70. 

  70. 	};
    71. 

  71. 

  72. 	rio: rapidio@fe00c0000 {
    73. 

  73. 		reg = <0xf 0xe00c0000 0x0 0x20000>;
    74. 

  74. 		port1 {
    75. 

  75. 			ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>;
    76. 

  76. 		};
    77. 

  77. 	};
    78. 

  78. };
    79. 

  79. 

  80. /*
    81. 

  81.  * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
    82. 

  82.  * for interrupt-map & interrupt-map-mask.
    83. 

  83.  */
    84. 

  84. 

  85. /include/ "mpc8548si-post.dtsi"
    86. 

  86. /include/ "mpc8548cds.dtsi"
    87. 

  87.