b4860si-post.dtsi 7.7 KB

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  1. /*
  2. * B4860 Silicon/SoC Device Tree Source (post include)
  3. *
  4. * Copyright 2012 - 2015 Freescale Semiconductor Inc.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in the
  12. * documentation and/or other materials provided with the distribution.
  13. * * Neither the name of Freescale Semiconductor nor the
  14. * names of its contributors may be used to endorse or promote products
  15. * derived from this software without specific prior written permission.
  16. *
  17. *
  18. * ALTERNATIVELY, this software may be distributed under the terms of the
  19. * GNU General Public License ("GPL") as published by the Free Software
  20. * Foundation, either version 2 of that License or (at your option) any
  21. * later version.
  22. *
  23. * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24. * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. /include/ "b4si-post.dtsi"
  35. /* controller at 0x200000 */
  36. &pci0 {
  37. compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
  38. };
  39. &rio {
  40. compatible = "fsl,srio";
  41. interrupts = <16 2 1 20>;
  42. #address-cells = <2>;
  43. #size-cells = <2>;
  44. fsl,iommu-parent = <&pamu0>;
  45. ranges;
  46. port1 {
  47. #address-cells = <2>;
  48. #size-cells = <2>;
  49. cell-index = <1>;
  50. };
  51. port2 {
  52. #address-cells = <2>;
  53. #size-cells = <2>;
  54. cell-index = <2>;
  55. };
  56. };
  57. &dcsr {
  58. dcsr-epu@0 {
  59. compatible = "fsl,b4860-dcsr-epu", "fsl,dcsr-epu";
  60. };
  61. dcsr-npc {
  62. compatible = "fsl,b4860-dcsr-cnpc", "fsl,dcsr-cnpc";
  63. };
  64. dcsr-dpaa@9000 {
  65. compatible = "fsl,b4860-dcsr-dpaa", "fsl,dcsr-dpaa";
  66. };
  67. dcsr-ocn@11000 {
  68. compatible = "fsl,b4860-dcsr-ocn", "fsl,dcsr-ocn";
  69. };
  70. dcsr-ddr@13000 {
  71. compatible = "fsl,dcsr-ddr";
  72. dev-handle = <&ddr2>;
  73. reg = <0x13000 0x1000>;
  74. };
  75. dcsr-nal@18000 {
  76. compatible = "fsl,b4860-dcsr-nal", "fsl,dcsr-nal";
  77. };
  78. dcsr-rcpm@22000 {
  79. compatible = "fsl,b4860-dcsr-rcpm", "fsl,dcsr-rcpm";
  80. };
  81. dcsr-snpc@30000 {
  82. compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
  83. };
  84. dcsr-snpc@31000 {
  85. compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
  86. };
  87. dcsr-cpu-sb-proxy@108000 {
  88. compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
  89. cpu-handle = <&cpu1>;
  90. reg = <0x108000 0x1000 0x109000 0x1000>;
  91. };
  92. dcsr-cpu-sb-proxy@110000 {
  93. compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
  94. cpu-handle = <&cpu2>;
  95. reg = <0x110000 0x1000 0x111000 0x1000>;
  96. };
  97. dcsr-cpu-sb-proxy@118000 {
  98. compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
  99. cpu-handle = <&cpu3>;
  100. reg = <0x118000 0x1000 0x119000 0x1000>;
  101. };
  102. };
  103. &bportals {
  104. bman-portal@38000 {
  105. compatible = "fsl,bman-portal";
  106. reg = <0x38000 0x4000>, <0x100e000 0x1000>;
  107. interrupts = <133 2 0 0>;
  108. };
  109. bman-portal@3c000 {
  110. compatible = "fsl,bman-portal";
  111. reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
  112. interrupts = <135 2 0 0>;
  113. };
  114. bman-portal@40000 {
  115. compatible = "fsl,bman-portal";
  116. reg = <0x40000 0x4000>, <0x1010000 0x1000>;
  117. interrupts = <137 2 0 0>;
  118. };
  119. bman-portal@44000 {
  120. compatible = "fsl,bman-portal";
  121. reg = <0x44000 0x4000>, <0x1011000 0x1000>;
  122. interrupts = <139 2 0 0>;
  123. };
  124. bman-portal@48000 {
  125. compatible = "fsl,bman-portal";
  126. reg = <0x48000 0x4000>, <0x1012000 0x1000>;
  127. interrupts = <141 2 0 0>;
  128. };
  129. bman-portal@4c000 {
  130. compatible = "fsl,bman-portal";
  131. reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
  132. interrupts = <143 2 0 0>;
  133. };
  134. bman-portal@50000 {
  135. compatible = "fsl,bman-portal";
  136. reg = <0x50000 0x4000>, <0x1014000 0x1000>;
  137. interrupts = <145 2 0 0>;
  138. };
  139. bman-portal@54000 {
  140. compatible = "fsl,bman-portal";
  141. reg = <0x54000 0x4000>, <0x1015000 0x1000>;
  142. interrupts = <147 2 0 0>;
  143. };
  144. bman-portal@58000 {
  145. compatible = "fsl,bman-portal";
  146. reg = <0x58000 0x4000>, <0x1016000 0x1000>;
  147. interrupts = <149 2 0 0>;
  148. };
  149. bman-portal@5c000 {
  150. compatible = "fsl,bman-portal";
  151. reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
  152. interrupts = <151 2 0 0>;
  153. };
  154. bman-portal@60000 {
  155. compatible = "fsl,bman-portal";
  156. reg = <0x60000 0x4000>, <0x1018000 0x1000>;
  157. interrupts = <153 2 0 0>;
  158. };
  159. };
  160. &qportals {
  161. qportal14: qman-portal@38000 {
  162. compatible = "fsl,qman-portal";
  163. reg = <0x38000 0x4000>, <0x100e000 0x1000>;
  164. interrupts = <132 0x2 0 0>;
  165. cell-index = <0xe>;
  166. };
  167. qportal15: qman-portal@3c000 {
  168. compatible = "fsl,qman-portal";
  169. reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
  170. interrupts = <134 0x2 0 0>;
  171. cell-index = <0xf>;
  172. };
  173. qportal16: qman-portal@40000 {
  174. compatible = "fsl,qman-portal";
  175. reg = <0x40000 0x4000>, <0x1010000 0x1000>;
  176. interrupts = <136 0x2 0 0>;
  177. cell-index = <0x10>;
  178. };
  179. qportal17: qman-portal@44000 {
  180. compatible = "fsl,qman-portal";
  181. reg = <0x44000 0x4000>, <0x1011000 0x1000>;
  182. interrupts = <138 0x2 0 0>;
  183. cell-index = <0x11>;
  184. };
  185. qportal18: qman-portal@48000 {
  186. compatible = "fsl,qman-portal";
  187. reg = <0x48000 0x4000>, <0x1012000 0x1000>;
  188. interrupts = <140 0x2 0 0>;
  189. cell-index = <0x12>;
  190. };
  191. qportal19: qman-portal@4c000 {
  192. compatible = "fsl,qman-portal";
  193. reg = <0x4c000 0x4000>, <0x1013000 0x1000>;
  194. interrupts = <142 0x2 0 0>;
  195. cell-index = <0x13>;
  196. };
  197. qportal20: qman-portal@50000 {
  198. compatible = "fsl,qman-portal";
  199. reg = <0x50000 0x4000>, <0x1014000 0x1000>;
  200. interrupts = <144 0x2 0 0>;
  201. cell-index = <0x14>;
  202. };
  203. qportal21: qman-portal@54000 {
  204. compatible = "fsl,qman-portal";
  205. reg = <0x54000 0x4000>, <0x1015000 0x1000>;
  206. interrupts = <146 0x2 0 0>;
  207. cell-index = <0x15>;
  208. };
  209. qportal22: qman-portal@58000 {
  210. compatible = "fsl,qman-portal";
  211. reg = <0x58000 0x4000>, <0x1016000 0x1000>;
  212. interrupts = <148 0x2 0 0>;
  213. cell-index = <0x16>;
  214. };
  215. qportal23: qman-portal@5c000 {
  216. compatible = "fsl,qman-portal";
  217. reg = <0x5c000 0x4000>, <0x1017000 0x1000>;
  218. interrupts = <150 0x2 0 0>;
  219. cell-index = <0x17>;
  220. };
  221. qportal24: qman-portal@60000 {
  222. compatible = "fsl,qman-portal";
  223. reg = <0x60000 0x4000>, <0x1018000 0x1000>;
  224. interrupts = <152 0x2 0 0>;
  225. cell-index = <0x18>;
  226. };
  227. };
  228. &soc {
  229. ddr2: memory-controller@9000 {
  230. compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
  231. reg = <0x9000 0x1000>;
  232. interrupts = <16 2 1 9>;
  233. };
  234. cpc: l3-cache-controller@10000 {
  235. compatible = "fsl,b4860-l3-cache-controller", "cache";
  236. };
  237. guts: global-utilities@e0000 {
  238. compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
  239. };
  240. global-utilities@e1000 {
  241. compatible = "fsl,b4860-clockgen", "fsl,b4-clockgen",
  242. "fsl,qoriq-clockgen-2.0";
  243. };
  244. rcpm: global-utilities@e2000 {
  245. compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
  246. };
  247. /include/ "qoriq-fman3-0-1g-4.dtsi"
  248. /include/ "qoriq-fman3-0-1g-5.dtsi"
  249. /include/ "qoriq-fman3-0-10g-0.dtsi"
  250. /include/ "qoriq-fman3-0-10g-1.dtsi"
  251. fman@400000 {
  252. enet4: ethernet@e8000 {
  253. };
  254. enet5: ethernet@ea000 {
  255. };
  256. enet6: ethernet@f0000 {
  257. };
  258. enet7: ethernet@f2000 {
  259. };
  260. };
  261. L2_1: l2-cache-controller@c20000 {
  262. compatible = "fsl,b4860-l2-cache-controller";
  263. reg = <0xc20000 0x40000>;
  264. next-level-cache = <&cpc>;
  265. };
  266. };