io.h 8.0 KB

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  1. #ifndef _ASM_IO_H
  2. #define _ASM_IO_H
  3. #include <linux/types.h>
  4. #include <asm/pgtable.h>
  5. #define virt_to_phys(a) ((unsigned long)__pa(a))
  6. #define phys_to_virt(a) __va(a)
  7. #define virt_to_bus virt_to_phys
  8. #define bus_to_virt phys_to_virt
  9. static inline unsigned long isa_bus_to_virt(unsigned long addr) {
  10. BUG();
  11. return 0;
  12. }
  13. static inline unsigned long isa_virt_to_bus(void *addr) {
  14. BUG();
  15. return 0;
  16. }
  17. /*
  18. * Memory mapped I/O
  19. *
  20. * readX()/writeX() do byteswapping and take an ioremapped address
  21. * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
  22. * gsc_*() don't byteswap and operate on physical addresses;
  23. * eg dev->hpa or 0xfee00000.
  24. */
  25. static inline unsigned char gsc_readb(unsigned long addr)
  26. {
  27. long flags;
  28. unsigned char ret;
  29. __asm__ __volatile__(
  30. " rsm 2,%0\n"
  31. " ldbx 0(%2),%1\n"
  32. " mtsm %0\n"
  33. : "=&r" (flags), "=r" (ret) : "r" (addr) );
  34. return ret;
  35. }
  36. static inline unsigned short gsc_readw(unsigned long addr)
  37. {
  38. long flags;
  39. unsigned short ret;
  40. __asm__ __volatile__(
  41. " rsm 2,%0\n"
  42. " ldhx 0(%2),%1\n"
  43. " mtsm %0\n"
  44. : "=&r" (flags), "=r" (ret) : "r" (addr) );
  45. return ret;
  46. }
  47. static inline unsigned int gsc_readl(unsigned long addr)
  48. {
  49. u32 ret;
  50. __asm__ __volatile__(
  51. " ldwax 0(%1),%0\n"
  52. : "=r" (ret) : "r" (addr) );
  53. return ret;
  54. }
  55. static inline unsigned long long gsc_readq(unsigned long addr)
  56. {
  57. unsigned long long ret;
  58. #ifdef CONFIG_64BIT
  59. __asm__ __volatile__(
  60. " ldda 0(%1),%0\n"
  61. : "=r" (ret) : "r" (addr) );
  62. #else
  63. /* two reads may have side effects.. */
  64. ret = ((u64) gsc_readl(addr)) << 32;
  65. ret |= gsc_readl(addr+4);
  66. #endif
  67. return ret;
  68. }
  69. static inline void gsc_writeb(unsigned char val, unsigned long addr)
  70. {
  71. long flags;
  72. __asm__ __volatile__(
  73. " rsm 2,%0\n"
  74. " stbs %1,0(%2)\n"
  75. " mtsm %0\n"
  76. : "=&r" (flags) : "r" (val), "r" (addr) );
  77. }
  78. static inline void gsc_writew(unsigned short val, unsigned long addr)
  79. {
  80. long flags;
  81. __asm__ __volatile__(
  82. " rsm 2,%0\n"
  83. " sths %1,0(%2)\n"
  84. " mtsm %0\n"
  85. : "=&r" (flags) : "r" (val), "r" (addr) );
  86. }
  87. static inline void gsc_writel(unsigned int val, unsigned long addr)
  88. {
  89. __asm__ __volatile__(
  90. " stwas %0,0(%1)\n"
  91. : : "r" (val), "r" (addr) );
  92. }
  93. static inline void gsc_writeq(unsigned long long val, unsigned long addr)
  94. {
  95. #ifdef CONFIG_64BIT
  96. __asm__ __volatile__(
  97. " stda %0,0(%1)\n"
  98. : : "r" (val), "r" (addr) );
  99. #else
  100. /* two writes may have side effects.. */
  101. gsc_writel(val >> 32, addr);
  102. gsc_writel(val, addr+4);
  103. #endif
  104. }
  105. /*
  106. * The standard PCI ioremap interfaces
  107. */
  108. extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
  109. /* Most machines react poorly to I/O-space being cacheable... Instead let's
  110. * define ioremap() in terms of ioremap_nocache().
  111. */
  112. static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
  113. {
  114. return __ioremap(offset, size, _PAGE_NO_CACHE);
  115. }
  116. #define ioremap_nocache(off, sz) ioremap((off), (sz))
  117. #define ioremap_wc ioremap_nocache
  118. #define ioremap_uc ioremap_nocache
  119. extern void iounmap(const volatile void __iomem *addr);
  120. static inline unsigned char __raw_readb(const volatile void __iomem *addr)
  121. {
  122. return (*(volatile unsigned char __force *) (addr));
  123. }
  124. static inline unsigned short __raw_readw(const volatile void __iomem *addr)
  125. {
  126. return *(volatile unsigned short __force *) addr;
  127. }
  128. static inline unsigned int __raw_readl(const volatile void __iomem *addr)
  129. {
  130. return *(volatile unsigned int __force *) addr;
  131. }
  132. static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
  133. {
  134. return *(volatile unsigned long long __force *) addr;
  135. }
  136. static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
  137. {
  138. *(volatile unsigned char __force *) addr = b;
  139. }
  140. static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
  141. {
  142. *(volatile unsigned short __force *) addr = b;
  143. }
  144. static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
  145. {
  146. *(volatile unsigned int __force *) addr = b;
  147. }
  148. static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
  149. {
  150. *(volatile unsigned long long __force *) addr = b;
  151. }
  152. static inline unsigned char readb(const volatile void __iomem *addr)
  153. {
  154. return __raw_readb(addr);
  155. }
  156. static inline unsigned short readw(const volatile void __iomem *addr)
  157. {
  158. return le16_to_cpu(__raw_readw(addr));
  159. }
  160. static inline unsigned int readl(const volatile void __iomem *addr)
  161. {
  162. return le32_to_cpu(__raw_readl(addr));
  163. }
  164. static inline unsigned long long readq(const volatile void __iomem *addr)
  165. {
  166. return le64_to_cpu(__raw_readq(addr));
  167. }
  168. static inline void writeb(unsigned char b, volatile void __iomem *addr)
  169. {
  170. __raw_writeb(b, addr);
  171. }
  172. static inline void writew(unsigned short w, volatile void __iomem *addr)
  173. {
  174. __raw_writew(cpu_to_le16(w), addr);
  175. }
  176. static inline void writel(unsigned int l, volatile void __iomem *addr)
  177. {
  178. __raw_writel(cpu_to_le32(l), addr);
  179. }
  180. static inline void writeq(unsigned long long q, volatile void __iomem *addr)
  181. {
  182. __raw_writeq(cpu_to_le64(q), addr);
  183. }
  184. #define readb readb
  185. #define readw readw
  186. #define readl readl
  187. #define readq readq
  188. #define writeb writeb
  189. #define writew writew
  190. #define writel writel
  191. #define writeq writeq
  192. #define readb_relaxed(addr) readb(addr)
  193. #define readw_relaxed(addr) readw(addr)
  194. #define readl_relaxed(addr) readl(addr)
  195. #define readq_relaxed(addr) readq(addr)
  196. #define writeb_relaxed(b, addr) writeb(b, addr)
  197. #define writew_relaxed(w, addr) writew(w, addr)
  198. #define writel_relaxed(l, addr) writel(l, addr)
  199. #define writeq_relaxed(q, addr) writeq(q, addr)
  200. #define mmiowb() do { } while (0)
  201. void memset_io(volatile void __iomem *addr, unsigned char val, int count);
  202. void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
  203. void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
  204. /* Port-space IO */
  205. #define inb_p inb
  206. #define inw_p inw
  207. #define inl_p inl
  208. #define outb_p outb
  209. #define outw_p outw
  210. #define outl_p outl
  211. extern unsigned char eisa_in8(unsigned short port);
  212. extern unsigned short eisa_in16(unsigned short port);
  213. extern unsigned int eisa_in32(unsigned short port);
  214. extern void eisa_out8(unsigned char data, unsigned short port);
  215. extern void eisa_out16(unsigned short data, unsigned short port);
  216. extern void eisa_out32(unsigned int data, unsigned short port);
  217. #if defined(CONFIG_PCI)
  218. extern unsigned char inb(int addr);
  219. extern unsigned short inw(int addr);
  220. extern unsigned int inl(int addr);
  221. extern void outb(unsigned char b, int addr);
  222. extern void outw(unsigned short b, int addr);
  223. extern void outl(unsigned int b, int addr);
  224. #elif defined(CONFIG_EISA)
  225. #define inb eisa_in8
  226. #define inw eisa_in16
  227. #define inl eisa_in32
  228. #define outb eisa_out8
  229. #define outw eisa_out16
  230. #define outl eisa_out32
  231. #else
  232. static inline char inb(unsigned long addr)
  233. {
  234. BUG();
  235. return -1;
  236. }
  237. static inline short inw(unsigned long addr)
  238. {
  239. BUG();
  240. return -1;
  241. }
  242. static inline int inl(unsigned long addr)
  243. {
  244. BUG();
  245. return -1;
  246. }
  247. #define outb(x, y) BUG()
  248. #define outw(x, y) BUG()
  249. #define outl(x, y) BUG()
  250. #endif
  251. /*
  252. * String versions of in/out ops:
  253. */
  254. extern void insb (unsigned long port, void *dst, unsigned long count);
  255. extern void insw (unsigned long port, void *dst, unsigned long count);
  256. extern void insl (unsigned long port, void *dst, unsigned long count);
  257. extern void outsb (unsigned long port, const void *src, unsigned long count);
  258. extern void outsw (unsigned long port, const void *src, unsigned long count);
  259. extern void outsl (unsigned long port, const void *src, unsigned long count);
  260. /* IO Port space is : BBiiii where BB is HBA number. */
  261. #define IO_SPACE_LIMIT 0x00ffffff
  262. /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
  263. * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
  264. * mode (essentially just sign extending. This macro takes in a 32
  265. * bit I/O address (still with the leading f) and outputs the correct
  266. * value for either 32 or 64 bit mode */
  267. #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
  268. #include <asm-generic/iomap.h>
  269. /*
  270. * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  271. * access
  272. */
  273. #define xlate_dev_mem_ptr(p) __va(p)
  274. /*
  275. * Convert a virtual cached pointer to an uncached pointer
  276. */
  277. #define xlate_dev_kmem_ptr(p) p
  278. #endif