thread_info.h 5.9 KB

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  1. /* thread_info.h: MIPS low-level thread information
  2. *
  3. * Copyright (C) 2002 David Howells (dhowells@redhat.com)
  4. * - Incorporating suggestions made by Linus Torvalds and Dave Miller
  5. */
  6. #ifndef _ASM_THREAD_INFO_H
  7. #define _ASM_THREAD_INFO_H
  8. #ifdef __KERNEL__
  9. #ifndef __ASSEMBLY__
  10. #include <asm/processor.h>
  11. /*
  12. * low level task data that entry.S needs immediate access to
  13. * - this struct should fit entirely inside of one cache line
  14. * - this struct shares the supervisor stack pages
  15. * - if the contents of this structure are changed, the assembly constants
  16. * must also be changed
  17. */
  18. struct thread_info {
  19. struct task_struct *task; /* main task structure */
  20. unsigned long flags; /* low level flags */
  21. unsigned long tp_value; /* thread pointer */
  22. __u32 cpu; /* current CPU */
  23. int preempt_count; /* 0 => preemptable, <0 => BUG */
  24. int r2_emul_return; /* 1 => Returning from R2 emulator */
  25. mm_segment_t addr_limit; /*
  26. * thread address space limit:
  27. * 0x7fffffff for user-thead
  28. * 0xffffffff for kernel-thread
  29. */
  30. struct pt_regs *regs;
  31. long syscall; /* syscall number */
  32. };
  33. /*
  34. * macros/functions for gaining access to the thread information structure
  35. */
  36. #define INIT_THREAD_INFO(tsk) \
  37. { \
  38. .task = &tsk, \
  39. .flags = _TIF_FIXADE, \
  40. .cpu = 0, \
  41. .preempt_count = INIT_PREEMPT_COUNT, \
  42. .addr_limit = KERNEL_DS, \
  43. }
  44. #define init_thread_info (init_thread_union.thread_info)
  45. #define init_stack (init_thread_union.stack)
  46. /* How to get the thread information struct from C. */
  47. register struct thread_info *__current_thread_info __asm__("$28");
  48. static inline struct thread_info *current_thread_info(void)
  49. {
  50. return __current_thread_info;
  51. }
  52. #endif /* !__ASSEMBLY__ */
  53. /* thread information allocation */
  54. #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
  55. #define THREAD_SIZE_ORDER (1)
  56. #endif
  57. #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
  58. #define THREAD_SIZE_ORDER (2)
  59. #endif
  60. #ifdef CONFIG_PAGE_SIZE_8KB
  61. #define THREAD_SIZE_ORDER (1)
  62. #endif
  63. #ifdef CONFIG_PAGE_SIZE_16KB
  64. #define THREAD_SIZE_ORDER (0)
  65. #endif
  66. #ifdef CONFIG_PAGE_SIZE_32KB
  67. #define THREAD_SIZE_ORDER (0)
  68. #endif
  69. #ifdef CONFIG_PAGE_SIZE_64KB
  70. #define THREAD_SIZE_ORDER (0)
  71. #endif
  72. #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
  73. #define THREAD_MASK (THREAD_SIZE - 1UL)
  74. #define STACK_WARN (THREAD_SIZE / 8)
  75. /*
  76. * thread information flags
  77. * - these are process state flags that various assembly files may need to
  78. * access
  79. * - pending work-to-be-done flags are in LSW
  80. * - other flags in MSW
  81. */
  82. #define TIF_SIGPENDING 1 /* signal pending */
  83. #define TIF_NEED_RESCHED 2 /* rescheduling necessary */
  84. #define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */
  85. #define TIF_SECCOMP 4 /* secure computing */
  86. #define TIF_NOTIFY_RESUME 5 /* callback before returning to user */
  87. #define TIF_UPROBE 6 /* breakpointed or singlestepping */
  88. #define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
  89. #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
  90. #define TIF_MEMDIE 18 /* is terminating due to OOM killer */
  91. #define TIF_NOHZ 19 /* in adaptive nohz mode */
  92. #define TIF_FIXADE 20 /* Fix address errors in software */
  93. #define TIF_LOGADE 21 /* Log address errors to syslog */
  94. #define TIF_32BIT_REGS 22 /* 32-bit general purpose registers */
  95. #define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */
  96. #define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
  97. #define TIF_LOAD_WATCH 25 /* If set, load watch registers */
  98. #define TIF_SYSCALL_TRACEPOINT 26 /* syscall tracepoint instrumentation */
  99. #define TIF_32BIT_FPREGS 27 /* 32-bit floating point registers */
  100. #define TIF_HYBRID_FPREGS 28 /* 64b FP registers, odd singles in bits 63:32 of even doubles */
  101. #define TIF_USEDMSA 29 /* MSA has been used this quantum */
  102. #define TIF_MSA_CTX_LIVE 30 /* MSA context must be preserved */
  103. #define TIF_SYSCALL_TRACE 31 /* syscall trace active */
  104. #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
  105. #define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
  106. #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
  107. #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
  108. #define _TIF_SECCOMP (1<<TIF_SECCOMP)
  109. #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
  110. #define _TIF_UPROBE (1<<TIF_UPROBE)
  111. #define _TIF_USEDFPU (1<<TIF_USEDFPU)
  112. #define _TIF_NOHZ (1<<TIF_NOHZ)
  113. #define _TIF_FIXADE (1<<TIF_FIXADE)
  114. #define _TIF_LOGADE (1<<TIF_LOGADE)
  115. #define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS)
  116. #define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR)
  117. #define _TIF_FPUBOUND (1<<TIF_FPUBOUND)
  118. #define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH)
  119. #define _TIF_32BIT_FPREGS (1<<TIF_32BIT_FPREGS)
  120. #define _TIF_HYBRID_FPREGS (1<<TIF_HYBRID_FPREGS)
  121. #define _TIF_USEDMSA (1<<TIF_USEDMSA)
  122. #define _TIF_MSA_CTX_LIVE (1<<TIF_MSA_CTX_LIVE)
  123. #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
  124. #define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
  125. _TIF_SYSCALL_AUDIT | \
  126. _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP)
  127. /* work to do in syscall_trace_leave() */
  128. #define _TIF_WORK_SYSCALL_EXIT (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
  129. _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
  130. /* work to do on interrupt/exception return */
  131. #define _TIF_WORK_MASK \
  132. (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME | \
  133. _TIF_UPROBE)
  134. /* work to do on any return to u-space */
  135. #define _TIF_ALLWORK_MASK (_TIF_NOHZ | _TIF_WORK_MASK | \
  136. _TIF_WORK_SYSCALL_EXIT | \
  137. _TIF_SYSCALL_TRACEPOINT)
  138. /*
  139. * We stash processor id into a COP0 register to retrieve it fast
  140. * at kernel exception entry.
  141. */
  142. #if defined(CONFIG_MIPS_PGD_C0_CONTEXT)
  143. #define SMP_CPUID_REG 20, 0 /* XCONTEXT */
  144. #define ASM_SMP_CPUID_REG $20
  145. #define SMP_CPUID_PTRSHIFT 48
  146. #else
  147. #define SMP_CPUID_REG 4, 0 /* CONTEXT */
  148. #define ASM_SMP_CPUID_REG $4
  149. #define SMP_CPUID_PTRSHIFT 23
  150. #endif
  151. #ifdef CONFIG_64BIT
  152. #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 3)
  153. #else
  154. #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 2)
  155. #endif
  156. #define ASM_CPUID_MFC0 MFC0
  157. #define UASM_i_CPUID_MFC0 UASM_i_MFC0
  158. #endif /* __KERNEL__ */
  159. #endif /* _ASM_THREAD_INFO_H */