sead3.dts 4.7 KB

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  1. /dts-v1/;
  2. /memreserve/ 0x00000000 0x00001000; // reserved
  3. /memreserve/ 0x00001000 0x000ef000; // ROM data
  4. /memreserve/ 0x000f0000 0x004cc000; // reserved
  5. #include <dt-bindings/interrupt-controller/mips-gic.h>
  6. / {
  7. #address-cells = <1>;
  8. #size-cells = <1>;
  9. compatible = "mti,sead-3";
  10. model = "MIPS SEAD-3";
  11. interrupt-parent = <&gic>;
  12. chosen {
  13. stdout-path = "uart1:115200";
  14. };
  15. aliases {
  16. uart0 = &uart0;
  17. uart1 = &uart1;
  18. };
  19. cpus {
  20. cpu@0 {
  21. compatible = "mti,mips14KEc", "mti,mips14Kc";
  22. };
  23. };
  24. memory {
  25. device_type = "memory";
  26. reg = <0x0 0x08000000>;
  27. };
  28. cpu_intc: interrupt-controller {
  29. compatible = "mti,cpu-interrupt-controller";
  30. interrupt-controller;
  31. #interrupt-cells = <1>;
  32. };
  33. gic: interrupt-controller@1b1c0000 {
  34. compatible = "mti,gic";
  35. reg = <0x1b1c0000 0x20000>;
  36. interrupt-controller;
  37. #interrupt-cells = <3>;
  38. /*
  39. * Declare the interrupt-parent even though the mti,gic
  40. * binding doesn't require it, such that the kernel can
  41. * figure out that cpu_intc is the root interrupt
  42. * controller & should be probed first.
  43. */
  44. interrupt-parent = <&cpu_intc>;
  45. timer {
  46. compatible = "mti,gic-timer";
  47. interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
  48. };
  49. };
  50. ehci@1b200000 {
  51. compatible = "generic-ehci";
  52. reg = <0x1b200000 0x1000>;
  53. interrupts = <0>; /* GIC 0 or CPU 6 */
  54. has-transaction-translator;
  55. };
  56. flash@1c000000 {
  57. compatible = "intel,28f128j3", "cfi-flash";
  58. reg = <0x1c000000 0x2000000>;
  59. #address-cells = <1>;
  60. #size-cells = <1>;
  61. bank-width = <4>;
  62. partitions {
  63. compatible = "fixed-partitions";
  64. #address-cells = <1>;
  65. #size-cells = <1>;
  66. user-fs@0 {
  67. label = "User FS";
  68. reg = <0x0 0x1fc0000>;
  69. };
  70. board-config@3e0000 {
  71. label = "Board Config";
  72. reg = <0x1fc0000 0x40000>;
  73. };
  74. };
  75. };
  76. fpga_regs: system-controller@1f000000 {
  77. compatible = "mti,sead3-fpga", "syscon", "simple-mfd";
  78. reg = <0x1f000000 0x200>;
  79. reboot {
  80. compatible = "syscon-reboot";
  81. regmap = <&fpga_regs>;
  82. offset = <0x50>;
  83. mask = <0x4d>;
  84. };
  85. poweroff {
  86. compatible = "restart-poweroff";
  87. };
  88. };
  89. system-controller@1f000200 {
  90. compatible = "mti,sead3-cpld", "syscon", "simple-mfd";
  91. reg = <0x1f000200 0x300>;
  92. led@10.0 {
  93. compatible = "register-bit-led";
  94. offset = <0x10>;
  95. mask = <0x1>;
  96. label = "pled0";
  97. };
  98. led@10.1 {
  99. compatible = "register-bit-led";
  100. offset = <0x10>;
  101. mask = <0x2>;
  102. label = "pled1";
  103. };
  104. led@10.2 {
  105. compatible = "register-bit-led";
  106. offset = <0x10>;
  107. mask = <0x4>;
  108. label = "pled2";
  109. };
  110. led@10.3 {
  111. compatible = "register-bit-led";
  112. offset = <0x10>;
  113. mask = <0x8>;
  114. label = "pled3";
  115. };
  116. led@10.4 {
  117. compatible = "register-bit-led";
  118. offset = <0x10>;
  119. mask = <0x10>;
  120. label = "pled4";
  121. };
  122. led@10.5 {
  123. compatible = "register-bit-led";
  124. offset = <0x10>;
  125. mask = <0x20>;
  126. label = "pled5";
  127. };
  128. led@10.6 {
  129. compatible = "register-bit-led";
  130. offset = <0x10>;
  131. mask = <0x40>;
  132. label = "pled6";
  133. };
  134. led@10.7 {
  135. compatible = "register-bit-led";
  136. offset = <0x10>;
  137. mask = <0x80>;
  138. label = "pled7";
  139. };
  140. led@18.0 {
  141. compatible = "register-bit-led";
  142. offset = <0x18>;
  143. mask = <0x1>;
  144. label = "fled0";
  145. };
  146. led@18.1 {
  147. compatible = "register-bit-led";
  148. offset = <0x18>;
  149. mask = <0x2>;
  150. label = "fled1";
  151. };
  152. led@18.2 {
  153. compatible = "register-bit-led";
  154. offset = <0x18>;
  155. mask = <0x4>;
  156. label = "fled2";
  157. };
  158. led@18.3 {
  159. compatible = "register-bit-led";
  160. offset = <0x18>;
  161. mask = <0x8>;
  162. label = "fled3";
  163. };
  164. led@18.4 {
  165. compatible = "register-bit-led";
  166. offset = <0x18>;
  167. mask = <0x10>;
  168. label = "fled4";
  169. };
  170. led@18.5 {
  171. compatible = "register-bit-led";
  172. offset = <0x18>;
  173. mask = <0x20>;
  174. label = "fled5";
  175. };
  176. led@18.6 {
  177. compatible = "register-bit-led";
  178. offset = <0x18>;
  179. mask = <0x40>;
  180. label = "fled6";
  181. };
  182. led@18.7 {
  183. compatible = "register-bit-led";
  184. offset = <0x18>;
  185. mask = <0x80>;
  186. label = "fled7";
  187. };
  188. lcd@200 {
  189. compatible = "mti,sead3-lcd";
  190. offset = <0x200>;
  191. };
  192. };
  193. /* UART connected to FTDI & miniUSB socket */
  194. uart0: uart@1f000900 {
  195. compatible = "ns16550a";
  196. reg = <0x1f000900 0x20>;
  197. reg-io-width = <4>;
  198. reg-shift = <2>;
  199. clock-frequency = <14745600>;
  200. interrupts = <3>; /* GIC 3 or CPU 4 */
  201. no-loopback-test;
  202. };
  203. /* UART connected to RS232 socket */
  204. uart1: uart@1f000800 {
  205. compatible = "ns16550a";
  206. reg = <0x1f000800 0x20>;
  207. reg-io-width = <4>;
  208. reg-shift = <2>;
  209. clock-frequency = <14745600>;
  210. interrupts = <2>; /* GIC 2 or CPU 4 */
  211. no-loopback-test;
  212. };
  213. eth@1f010000 {
  214. compatible = "smsc,lan9115";
  215. reg = <0x1f010000 0x10000>;
  216. reg-io-width = <4>;
  217. interrupts = <0>; /* GIC 0 or CPU 6 */
  218. phy-mode = "mii";
  219. smsc,irq-push-pull;
  220. smsc,save-mac-address;
  221. };
  222. };