macints.c 8.1 KB

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  1. /*
  2. * Macintosh interrupts
  3. *
  4. * General design:
  5. * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
  6. * exclusively use the autovector interrupts (the 'generic level0-level7'
  7. * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
  8. * are used:
  9. * 1 - VIA1
  10. * - slot 0: one second interrupt (CA2)
  11. * - slot 1: VBlank (CA1)
  12. * - slot 2: ADB data ready (SR full)
  13. * - slot 3: ADB data (CB2)
  14. * - slot 4: ADB clock (CB1)
  15. * - slot 5: timer 2
  16. * - slot 6: timer 1
  17. * - slot 7: status of IRQ; signals 'any enabled int.'
  18. *
  19. * 2 - VIA2 or RBV
  20. * - slot 0: SCSI DRQ (CA2)
  21. * - slot 1: NUBUS IRQ (CA1) need to read port A to find which
  22. * - slot 2: /EXP IRQ (only on IIci)
  23. * - slot 3: SCSI IRQ (CB2)
  24. * - slot 4: ASC IRQ (CB1)
  25. * - slot 5: timer 2 (not on IIci)
  26. * - slot 6: timer 1 (not on IIci)
  27. * - slot 7: status of IRQ; signals 'any enabled int.'
  28. *
  29. * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
  30. *
  31. * 3 - unused (?)
  32. *
  33. * 4 - SCC
  34. *
  35. * 5 - unused (?)
  36. * [serial errors or special conditions seem to raise level 6
  37. * interrupts on some models (LC4xx?)]
  38. *
  39. * 6 - off switch (?)
  40. *
  41. * Machines with Quadra-like VIA hardware, except PSC and PMU machines, support
  42. * an alternate interrupt mapping, as used by A/UX. It spreads ethernet and
  43. * sound out to their own autovector IRQs and gives VIA1 a higher priority:
  44. *
  45. * 1 - unused (?)
  46. *
  47. * 3 - on-board SONIC
  48. *
  49. * 5 - Apple Sound Chip (ASC)
  50. *
  51. * 6 - VIA1
  52. *
  53. * For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to
  54. * the Quadra (A/UX) mapping:
  55. *
  56. * 1 - ISM IOP (ADB)
  57. *
  58. * 2 - SCSI
  59. *
  60. * 3 - NuBus
  61. *
  62. * 4 - SCC IOP
  63. *
  64. * 6 - VIA1
  65. *
  66. * For PSC Macintoshes (660AV, 840AV):
  67. *
  68. * 3 - PSC level 3
  69. * - slot 0: MACE
  70. *
  71. * 4 - PSC level 4
  72. * - slot 1: SCC channel A interrupt
  73. * - slot 2: SCC channel B interrupt
  74. * - slot 3: MACE DMA
  75. *
  76. * 5 - PSC level 5
  77. *
  78. * 6 - PSC level 6
  79. *
  80. * Finally we have good 'ole level 7, the non-maskable interrupt:
  81. *
  82. * 7 - NMI (programmer's switch on the back of some Macs)
  83. * Also RAM parity error on models which support it (IIc, IIfx?)
  84. *
  85. * The current interrupt logic looks something like this:
  86. *
  87. * - We install dispatchers for the autovector interrupts (1-7). These
  88. * dispatchers are responsible for querying the hardware (the
  89. * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
  90. * this information a machspec interrupt number is generated by placing the
  91. * index of the interrupt hardware into the low three bits and the original
  92. * autovector interrupt number in the upper 5 bits. The handlers for the
  93. * resulting machspec interrupt are then called.
  94. *
  95. * - Nubus is a special case because its interrupts are hidden behind two
  96. * layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
  97. * which translates to IRQ number 17. In this spot we install _another_
  98. * dispatcher. This dispatcher finds the interrupting slot number (9-F) and
  99. * then forms a new machspec interrupt number as above with the slot number
  100. * minus 9 in the low three bits and the pseudo-level 7 in the upper five
  101. * bits. The handlers for this new machspec interrupt number are then
  102. * called. This puts Nubus interrupts into the range 56-62.
  103. *
  104. * - The Baboon interrupts (used on some PowerBooks) are an even more special
  105. * case. They're hidden behind the Nubus slot $C interrupt thus adding a
  106. * third layer of indirection. Why oh why did the Apple engineers do that?
  107. *
  108. */
  109. #include <linux/types.h>
  110. #include <linux/kernel.h>
  111. #include <linux/sched.h>
  112. #include <linux/interrupt.h>
  113. #include <linux/irq.h>
  114. #include <linux/delay.h>
  115. #include <asm/irq.h>
  116. #include <asm/macintosh.h>
  117. #include <asm/macints.h>
  118. #include <asm/mac_via.h>
  119. #include <asm/mac_psc.h>
  120. #include <asm/mac_oss.h>
  121. #include <asm/mac_iop.h>
  122. #include <asm/mac_baboon.h>
  123. #include <asm/hwtest.h>
  124. #include <asm/irq_regs.h>
  125. #define SHUTUP_SONIC
  126. /*
  127. * console_loglevel determines NMI handler function
  128. */
  129. irqreturn_t mac_nmi_handler(int, void *);
  130. irqreturn_t mac_debug_handler(int, void *);
  131. /* #define DEBUG_MACINTS */
  132. static unsigned int mac_irq_startup(struct irq_data *);
  133. static void mac_irq_shutdown(struct irq_data *);
  134. static struct irq_chip mac_irq_chip = {
  135. .name = "mac",
  136. .irq_enable = mac_irq_enable,
  137. .irq_disable = mac_irq_disable,
  138. .irq_startup = mac_irq_startup,
  139. .irq_shutdown = mac_irq_shutdown,
  140. };
  141. void __init mac_init_IRQ(void)
  142. {
  143. #ifdef DEBUG_MACINTS
  144. printk("mac_init_IRQ(): Setting things up...\n");
  145. #endif
  146. m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
  147. NUM_MAC_SOURCES - IRQ_USER);
  148. /* Make sure the SONIC interrupt is cleared or things get ugly */
  149. #ifdef SHUTUP_SONIC
  150. printk("Killing onboard sonic... ");
  151. /* This address should hopefully be mapped already */
  152. if (hwreg_present((void*)(0x50f0a000))) {
  153. *(long *)(0x50f0a014) = 0x7fffL;
  154. *(long *)(0x50f0a010) = 0L;
  155. }
  156. printk("Done.\n");
  157. #endif /* SHUTUP_SONIC */
  158. /*
  159. * Now register the handlers for the master IRQ handlers
  160. * at levels 1-7. Most of the work is done elsewhere.
  161. */
  162. if (oss_present)
  163. oss_register_interrupts();
  164. else
  165. via_register_interrupts();
  166. if (psc)
  167. psc_register_interrupts();
  168. if (baboon_present)
  169. baboon_register_interrupts();
  170. iop_register_interrupts();
  171. if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
  172. mac_nmi_handler))
  173. pr_err("Couldn't register NMI\n");
  174. #ifdef DEBUG_MACINTS
  175. printk("mac_init_IRQ(): Done!\n");
  176. #endif
  177. }
  178. /*
  179. * mac_irq_enable - enable an interrupt source
  180. * mac_irq_disable - disable an interrupt source
  181. *
  182. * These routines are just dispatchers to the VIA/OSS/PSC routines.
  183. */
  184. void mac_irq_enable(struct irq_data *data)
  185. {
  186. int irq = data->irq;
  187. int irq_src = IRQ_SRC(irq);
  188. switch(irq_src) {
  189. case 1:
  190. case 2:
  191. case 7:
  192. if (oss_present)
  193. oss_irq_enable(irq);
  194. else
  195. via_irq_enable(irq);
  196. break;
  197. case 3:
  198. case 4:
  199. case 5:
  200. case 6:
  201. if (psc)
  202. psc_irq_enable(irq);
  203. else if (oss_present)
  204. oss_irq_enable(irq);
  205. break;
  206. case 8:
  207. if (baboon_present)
  208. baboon_irq_enable(irq);
  209. break;
  210. }
  211. }
  212. void mac_irq_disable(struct irq_data *data)
  213. {
  214. int irq = data->irq;
  215. int irq_src = IRQ_SRC(irq);
  216. switch(irq_src) {
  217. case 1:
  218. case 2:
  219. case 7:
  220. if (oss_present)
  221. oss_irq_disable(irq);
  222. else
  223. via_irq_disable(irq);
  224. break;
  225. case 3:
  226. case 4:
  227. case 5:
  228. case 6:
  229. if (psc)
  230. psc_irq_disable(irq);
  231. else if (oss_present)
  232. oss_irq_disable(irq);
  233. break;
  234. case 8:
  235. if (baboon_present)
  236. baboon_irq_disable(irq);
  237. break;
  238. }
  239. }
  240. static unsigned int mac_irq_startup(struct irq_data *data)
  241. {
  242. int irq = data->irq;
  243. if (IRQ_SRC(irq) == 7 && !oss_present)
  244. via_nubus_irq_startup(irq);
  245. else
  246. mac_irq_enable(data);
  247. return 0;
  248. }
  249. static void mac_irq_shutdown(struct irq_data *data)
  250. {
  251. int irq = data->irq;
  252. if (IRQ_SRC(irq) == 7 && !oss_present)
  253. via_nubus_irq_shutdown(irq);
  254. else
  255. mac_irq_disable(data);
  256. }
  257. static int num_debug[8];
  258. irqreturn_t mac_debug_handler(int irq, void *dev_id)
  259. {
  260. if (num_debug[irq] < 10) {
  261. printk("DEBUG: Unexpected IRQ %d\n", irq);
  262. num_debug[irq]++;
  263. }
  264. return IRQ_HANDLED;
  265. }
  266. static int in_nmi;
  267. static volatile int nmi_hold;
  268. irqreturn_t mac_nmi_handler(int irq, void *dev_id)
  269. {
  270. int i;
  271. /*
  272. * generate debug output on NMI switch if 'debug' kernel option given
  273. * (only works with Penguin!)
  274. */
  275. in_nmi++;
  276. for (i=0; i<100; i++)
  277. udelay(1000);
  278. if (in_nmi == 1) {
  279. nmi_hold = 1;
  280. printk("... pausing, press NMI to resume ...");
  281. } else {
  282. printk(" ok!\n");
  283. nmi_hold = 0;
  284. }
  285. barrier();
  286. while (nmi_hold == 1)
  287. udelay(1000);
  288. if (console_loglevel >= 8) {
  289. #if 0
  290. struct pt_regs *fp = get_irq_regs();
  291. show_state();
  292. printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp);
  293. printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
  294. fp->d0, fp->d1, fp->d2, fp->d3);
  295. printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
  296. fp->d4, fp->d5, fp->a0, fp->a1);
  297. if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
  298. printk("Corrupted stack page\n");
  299. printk("Process %s (pid: %d, stackpage=%08lx)\n",
  300. current->comm, current->pid, current->kernel_stack_page);
  301. if (intr_count == 1)
  302. dump_stack((struct frame *)fp);
  303. #else
  304. /* printk("NMI "); */
  305. #endif
  306. }
  307. in_nmi--;
  308. return IRQ_HANDLED;
  309. }