pci-frv.c 5.8 KB

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  1. /* pci-frv.c: low-level PCI access routines
  2. *
  3. * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. * - Derived from the i386 equivalent stuff
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/types.h>
  13. #include <linux/kernel.h>
  14. #include <linux/pci.h>
  15. #include <linux/init.h>
  16. #include <linux/ioport.h>
  17. #include <linux/errno.h>
  18. #include "pci-frv.h"
  19. /*
  20. * We need to avoid collisions with `mirrored' VGA ports
  21. * and other strange ISA hardware, so we always want the
  22. * addresses to be allocated in the 0x000-0x0ff region
  23. * modulo 0x400.
  24. *
  25. * Why? Because some silly external IO cards only decode
  26. * the low 10 bits of the IO address. The 0x00-0xff region
  27. * is reserved for motherboard devices that decode all 16
  28. * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
  29. * but we want to try to avoid allocating at 0x2900-0x2bff
  30. * which might have be mirrored at 0x0100-0x03ff..
  31. */
  32. resource_size_t
  33. pcibios_align_resource(void *data, const struct resource *res,
  34. resource_size_t size, resource_size_t align)
  35. {
  36. resource_size_t start = res->start;
  37. if ((res->flags & IORESOURCE_IO) && (start & 0x300))
  38. start = (start + 0x3ff) & ~0x3ff;
  39. return start;
  40. }
  41. /*
  42. * Handle resources of PCI devices. If the world were perfect, we could
  43. * just allocate all the resource regions and do nothing more. It isn't.
  44. * On the other hand, we cannot just re-allocate all devices, as it would
  45. * require us to know lots of host bridge internals. So we attempt to
  46. * keep as much of the original configuration as possible, but tweak it
  47. * when it's found to be wrong.
  48. *
  49. * Known BIOS problems we have to work around:
  50. * - I/O or memory regions not configured
  51. * - regions configured, but not enabled in the command register
  52. * - bogus I/O addresses above 64K used
  53. * - expansion ROMs left enabled (this may sound harmless, but given
  54. * the fact the PCI specs explicitly allow address decoders to be
  55. * shared between expansion ROMs and other resource regions, it's
  56. * at least dangerous)
  57. *
  58. * Our solution:
  59. * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
  60. * This gives us fixed barriers on where we can allocate.
  61. * (2) Allocate resources for all enabled devices. If there is
  62. * a collision, just mark the resource as unallocated. Also
  63. * disable expansion ROMs during this step.
  64. * (3) Try to allocate resources for disabled devices. If the
  65. * resources were assigned correctly, everything goes well,
  66. * if they weren't, they won't disturb allocation of other
  67. * resources.
  68. * (4) Assign new addresses to resources which were either
  69. * not configured at all or misconfigured. If explicitly
  70. * requested by the user, configure expansion ROM address
  71. * as well.
  72. */
  73. static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
  74. {
  75. struct list_head *ln;
  76. struct pci_bus *bus;
  77. struct pci_dev *dev;
  78. int idx;
  79. struct resource *r;
  80. /* Depth-First Search on bus tree */
  81. for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
  82. bus = list_entry(ln, struct pci_bus, node);
  83. if ((dev = bus->self)) {
  84. for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
  85. r = &dev->resource[idx];
  86. if (!r->start)
  87. continue;
  88. pci_claim_bridge_resource(dev, idx);
  89. }
  90. }
  91. pcibios_allocate_bus_resources(&bus->children);
  92. }
  93. }
  94. static void __init pcibios_allocate_resources(int pass)
  95. {
  96. struct pci_dev *dev = NULL;
  97. int idx, disabled;
  98. u16 command;
  99. struct resource *r;
  100. for_each_pci_dev(dev) {
  101. pci_read_config_word(dev, PCI_COMMAND, &command);
  102. for(idx = 0; idx < 6; idx++) {
  103. r = &dev->resource[idx];
  104. if (r->parent) /* Already allocated */
  105. continue;
  106. if (!r->start) /* Address not assigned at all */
  107. continue;
  108. if (r->flags & IORESOURCE_IO)
  109. disabled = !(command & PCI_COMMAND_IO);
  110. else
  111. disabled = !(command & PCI_COMMAND_MEMORY);
  112. if (pass == disabled) {
  113. DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
  114. r->start, r->end, r->flags, disabled, pass);
  115. if (pci_claim_resource(dev, idx) < 0) {
  116. /* We'll assign a new address later */
  117. r->end -= r->start;
  118. r->start = 0;
  119. }
  120. }
  121. }
  122. if (!pass) {
  123. r = &dev->resource[PCI_ROM_RESOURCE];
  124. if (r->flags & IORESOURCE_ROM_ENABLE) {
  125. /* Turn the ROM off, leave the resource region, but keep it unregistered. */
  126. u32 reg;
  127. DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
  128. r->flags &= ~IORESOURCE_ROM_ENABLE;
  129. pci_read_config_dword(dev, dev->rom_base_reg, &reg);
  130. pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
  131. }
  132. }
  133. }
  134. }
  135. static void __init pcibios_assign_resources(void)
  136. {
  137. struct pci_dev *dev = NULL;
  138. int idx;
  139. struct resource *r;
  140. for_each_pci_dev(dev) {
  141. int class = dev->class >> 8;
  142. /* Don't touch classless devices and host bridges */
  143. if (!class || class == PCI_CLASS_BRIDGE_HOST)
  144. continue;
  145. for(idx=0; idx<6; idx++) {
  146. r = &dev->resource[idx];
  147. /*
  148. * Don't touch IDE controllers and I/O ports of video cards!
  149. */
  150. if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
  151. (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
  152. continue;
  153. /*
  154. * We shall assign a new address to this resource, either because
  155. * the BIOS forgot to do so or because we have decided the old
  156. * address was unusable for some reason.
  157. */
  158. if (!r->start && r->end)
  159. pci_assign_resource(dev, idx);
  160. }
  161. }
  162. }
  163. void __init pcibios_resource_survey(void)
  164. {
  165. DBG("PCI: Allocating resources\n");
  166. pcibios_allocate_bus_resources(&pci_root_buses);
  167. pcibios_allocate_resources(0);
  168. pcibios_allocate_resources(1);
  169. pcibios_assign_resources();
  170. }