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blackfin
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mach-bf537
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mach
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bf537.h

bf537.h 2.1 KB
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  1. /*
    2. 

  2.  * System MMR Register and memory map for ADSP-BF537
    3. 

  3.  *
    4. 

  4.  * Copyright 2005-2008 Analog Devices Inc.
    5. 

  5.  *
    6. 

  6.  * Licensed under the GPL-2 or later.
    7. 

  7.  */
    8. 

  8. 

  9. #ifndef __MACH_BF537_H__
    10. 

  10. #define __MACH_BF537_H__
    11. 

  11. 

  12. #define OFFSET_(x) ((x) & 0x0000FFFF)
    13. 

  13. 

  14. /*some misc defines*/
    15. 

  15. #define IMASK_IVG15		0x8000
    16. 

  16. #define IMASK_IVG14		0x4000
    17. 

  17. #define IMASK_IVG13		0x2000
    18. 

  18. #define IMASK_IVG12		0x1000
    19. 

  19. 

  20. #define IMASK_IVG11		0x0800
    21. 

  21. #define IMASK_IVG10		0x0400
    22. 

  22. #define IMASK_IVG9		0x0200
    23. 

  23. #define IMASK_IVG8		0x0100
    24. 

  24. 

  25. #define IMASK_IVG7		0x0080
    26. 

  26. #define IMASK_IVGTMR	0x0040
    27. 

  27. #define IMASK_IVGHW		0x0020
    28. 

  28. 

  29. /***************************/
    30. 

  30. 

  31. 

  32. #define BFIN_DSUBBANKS	4
    33. 

  33. #define BFIN_DWAYS		2
    34. 

  34. #define BFIN_DLINES		64
    35. 

  35. #define BFIN_ISUBBANKS	4
    36. 

  36. #define BFIN_IWAYS		4
    37. 

  37. #define BFIN_ILINES		32
    38. 

  38. 

  39. #define WAY0_L			0x1
    40. 

  40. #define WAY1_L			0x2
    41. 

  41. #define WAY01_L			0x3
    42. 

  42. #define WAY2_L			0x4
    43. 

  43. #define WAY02_L			0x5
    44. 

  44. #define	WAY12_L			0x6
    45. 

  45. #define	WAY012_L		0x7
    46. 

  46. 

  47. #define	WAY3_L			0x8
    48. 

  48. #define	WAY03_L			0x9
    49. 

  49. #define	WAY13_L			0xA
    50. 

  50. #define	WAY013_L		0xB
    51. 

  51. 

  52. #define	WAY32_L			0xC
    53. 

  53. #define	WAY320_L		0xD
    54. 

  54. #define	WAY321_L		0xE
    55. 

  55. #define	WAYALL_L		0xF
    56. 

  56. 

  57. #define DMC_ENABLE (2<<2)	/*yes, 2, not 1 */
    58. 

  58. 

  59. /********************************* EBIU Settings ************************************/
    60. 

  60. #define AMBCTL0VAL	((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)
    61. 

  61. #define AMBCTL1VAL	((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)
    62. 

  62. 

  63. #ifdef CONFIG_C_AMBEN_ALL
    64. 

  64. #define V_AMBEN AMBEN_ALL
    65. 

  65. #endif
    66. 

  66. #ifdef CONFIG_C_AMBEN
    67. 

  67. #define V_AMBEN 0x0
    68. 

  68. #endif
    69. 

  69. #ifdef CONFIG_C_AMBEN_B0
    70. 

  70. #define V_AMBEN AMBEN_B0
    71. 

  71. #endif
    72. 

  72. #ifdef CONFIG_C_AMBEN_B0_B1
    73. 

  73. #define V_AMBEN AMBEN_B0_B1
    74. 

  74. #endif
    75. 

  75. #ifdef CONFIG_C_AMBEN_B0_B1_B2
    76. 

  76. #define V_AMBEN AMBEN_B0_B1_B2
    77. 

  77. #endif
    78. 

  78. #ifdef CONFIG_C_AMCKEN
    79. 

  79. #define V_AMCKEN AMCKEN
    80. 

  80. #else
    81. 

  81. #define V_AMCKEN 0x0
    82. 

  82. #endif
    83. 

  83. #ifdef CONFIG_C_CDPRIO
    84. 

  84. #define V_CDPRIO 0x100
    85. 

  85. #else
    86. 

  86. #define V_CDPRIO 0x0
    87. 

  87. #endif
    88. 

  88. 

  89. #define AMGCTLVAL	(V_AMBEN | V_AMCKEN | V_CDPRIO)
    90. 

  90. 

  91. #ifdef CONFIG_BF537
    92. 

  92. #define CPU "BF537"
    93. 

  93. #define CPUID 0x27c8
    94. 

  94. #endif
    95. 

  95. #ifdef CONFIG_BF536
    96. 

  96. #define CPU "BF536"
    97. 

  97. #define CPUID 0x27c8
    98. 

  98. #endif
    99. 

  99. #ifdef CONFIG_BF534
    100. 

  100. #define CPU "BF534"
    101. 

  101. #define CPUID 0x27c6
    102. 

  102. #endif
    103. 

  103. 

  104. #ifndef CPU
    105. 

  105. #error "Unknown CPU type - This kernel doesn't seem to be configured properly"
    106. 

  106. #endif
    107. 

  107. 

  108. #endif				/* __MACH_BF537_H__  */
    109. 

  109.