ezkit.c 29 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/export.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/usb/musb.h>
  20. #include <linux/leds.h>
  21. #include <linux/input.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/reboot.h>
  25. #include <asm/nand.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. #include <linux/spi/ad7877.h>
  29. #include <asm/bfin_sport.h>
  30. /*
  31. * Name the Board for the /proc/cpuinfo
  32. */
  33. #ifdef CONFIG_BFIN527_EZKIT_V2
  34. const char bfin_board_name[] = "ADI BF527-EZKIT V2";
  35. #else
  36. const char bfin_board_name[] = "ADI BF527-EZKIT";
  37. #endif
  38. /*
  39. * Driver needs to know address, irq and flag pin.
  40. */
  41. #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
  42. #include <linux/usb/isp1760.h>
  43. static struct resource bfin_isp1760_resources[] = {
  44. [0] = {
  45. .start = 0x203C0000,
  46. .end = 0x203C0000 + 0x000fffff,
  47. .flags = IORESOURCE_MEM,
  48. },
  49. [1] = {
  50. .start = IRQ_PF7,
  51. .end = IRQ_PF7,
  52. .flags = IORESOURCE_IRQ,
  53. },
  54. };
  55. static struct isp1760_platform_data isp1760_priv = {
  56. .is_isp1761 = 0,
  57. .bus_width_16 = 1,
  58. .port1_otg = 0,
  59. .analog_oc = 0,
  60. .dack_polarity_high = 0,
  61. .dreq_polarity_high = 0,
  62. };
  63. static struct platform_device bfin_isp1760_device = {
  64. .name = "isp1760",
  65. .id = 0,
  66. .dev = {
  67. .platform_data = &isp1760_priv,
  68. },
  69. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  70. .resource = bfin_isp1760_resources,
  71. };
  72. #endif
  73. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  74. static struct resource musb_resources[] = {
  75. [0] = {
  76. .start = 0xffc03800,
  77. .end = 0xffc03cff,
  78. .flags = IORESOURCE_MEM,
  79. },
  80. [1] = { /* general IRQ */
  81. .start = IRQ_USB_INT0,
  82. .end = IRQ_USB_INT0,
  83. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  84. .name = "mc"
  85. },
  86. [2] = { /* DMA IRQ */
  87. .start = IRQ_USB_DMA,
  88. .end = IRQ_USB_DMA,
  89. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  90. .name = "dma"
  91. },
  92. };
  93. static struct musb_hdrc_config musb_config = {
  94. .multipoint = 0,
  95. .dyn_fifo = 0,
  96. .soft_con = 1,
  97. .dma = 1,
  98. .num_eps = 8,
  99. .dma_channels = 8,
  100. .gpio_vrsel = GPIO_PG13,
  101. /* Some custom boards need to be active low, just set it to "0"
  102. * if it is the case.
  103. */
  104. .gpio_vrsel_active = 1,
  105. .clkin = 24, /* musb CLKIN in MHZ */
  106. };
  107. static struct musb_hdrc_platform_data musb_plat = {
  108. #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
  109. .mode = MUSB_OTG,
  110. #elif defined(CONFIG_USB_MUSB_HDRC)
  111. .mode = MUSB_HOST,
  112. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  113. .mode = MUSB_PERIPHERAL,
  114. #endif
  115. .config = &musb_config,
  116. };
  117. static u64 musb_dmamask = ~(u32)0;
  118. static struct platform_device musb_device = {
  119. .name = "musb-blackfin",
  120. .id = 0,
  121. .dev = {
  122. .dma_mask = &musb_dmamask,
  123. .coherent_dma_mask = 0xffffffff,
  124. .platform_data = &musb_plat,
  125. },
  126. .num_resources = ARRAY_SIZE(musb_resources),
  127. .resource = musb_resources,
  128. };
  129. #endif
  130. #if IS_ENABLED(CONFIG_FB_BFIN_T350MCQB)
  131. static struct resource bf52x_t350mcqb_resources[] = {
  132. {
  133. .start = IRQ_PPI_ERROR,
  134. .end = IRQ_PPI_ERROR,
  135. .flags = IORESOURCE_IRQ,
  136. },
  137. };
  138. static struct platform_device bf52x_t350mcqb_device = {
  139. .name = "bfin-t350mcqb",
  140. .id = -1,
  141. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  142. .resource = bf52x_t350mcqb_resources,
  143. };
  144. #endif
  145. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  146. #include <asm/bfin-lq035q1.h>
  147. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  148. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  149. .ppi_mode = USE_RGB565_8_BIT_PPI,
  150. };
  151. static struct resource bfin_lq035q1_resources[] = {
  152. {
  153. .start = IRQ_PPI_ERROR,
  154. .end = IRQ_PPI_ERROR,
  155. .flags = IORESOURCE_IRQ,
  156. },
  157. };
  158. static struct platform_device bfin_lq035q1_device = {
  159. .name = "bfin-lq035q1",
  160. .id = -1,
  161. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  162. .resource = bfin_lq035q1_resources,
  163. .dev = {
  164. .platform_data = &bfin_lq035q1_data,
  165. },
  166. };
  167. #endif
  168. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  169. static struct mtd_partition ezkit_partitions[] = {
  170. {
  171. .name = "bootloader(nor)",
  172. .size = 0x40000,
  173. .offset = 0,
  174. }, {
  175. .name = "linux kernel(nor)",
  176. .size = 0x1C0000,
  177. .offset = MTDPART_OFS_APPEND,
  178. }, {
  179. .name = "file system(nor)",
  180. .size = MTDPART_SIZ_FULL,
  181. .offset = MTDPART_OFS_APPEND,
  182. }
  183. };
  184. static struct physmap_flash_data ezkit_flash_data = {
  185. .width = 2,
  186. .parts = ezkit_partitions,
  187. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  188. };
  189. static struct resource ezkit_flash_resource = {
  190. .start = 0x20000000,
  191. .end = 0x203fffff,
  192. .flags = IORESOURCE_MEM,
  193. };
  194. static struct platform_device ezkit_flash_device = {
  195. .name = "physmap-flash",
  196. .id = 0,
  197. .dev = {
  198. .platform_data = &ezkit_flash_data,
  199. },
  200. .num_resources = 1,
  201. .resource = &ezkit_flash_resource,
  202. };
  203. #endif
  204. #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
  205. static struct mtd_partition partition_info[] = {
  206. {
  207. .name = "bootloader(nand)",
  208. .offset = 0,
  209. .size = 0x40000,
  210. }, {
  211. .name = "linux kernel(nand)",
  212. .offset = MTDPART_OFS_APPEND,
  213. .size = 4 * 1024 * 1024,
  214. },
  215. {
  216. .name = "file system(nand)",
  217. .offset = MTDPART_OFS_APPEND,
  218. .size = MTDPART_SIZ_FULL,
  219. },
  220. };
  221. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  222. .data_width = NFC_NWIDTH_8,
  223. .partitions = partition_info,
  224. .nr_partitions = ARRAY_SIZE(partition_info),
  225. .rd_dly = 3,
  226. .wr_dly = 3,
  227. };
  228. static struct resource bf5xx_nand_resources[] = {
  229. {
  230. .start = NFC_CTL,
  231. .end = NFC_DATA_RD + 2,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. {
  235. .start = CH_NFC,
  236. .end = CH_NFC,
  237. .flags = IORESOURCE_IRQ,
  238. },
  239. };
  240. static struct platform_device bf5xx_nand_device = {
  241. .name = "bf5xx-nand",
  242. .id = 0,
  243. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  244. .resource = bf5xx_nand_resources,
  245. .dev = {
  246. .platform_data = &bf5xx_nand_platform,
  247. },
  248. };
  249. #endif
  250. #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  251. static struct resource bfin_pcmcia_cf_resources[] = {
  252. {
  253. .start = 0x20310000, /* IO PORT */
  254. .end = 0x20312000,
  255. .flags = IORESOURCE_MEM,
  256. }, {
  257. .start = 0x20311000, /* Attribute Memory */
  258. .end = 0x20311FFF,
  259. .flags = IORESOURCE_MEM,
  260. }, {
  261. .start = IRQ_PF4,
  262. .end = IRQ_PF4,
  263. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  264. }, {
  265. .start = 6, /* Card Detect PF6 */
  266. .end = 6,
  267. .flags = IORESOURCE_IRQ,
  268. },
  269. };
  270. static struct platform_device bfin_pcmcia_cf_device = {
  271. .name = "bfin_cf_pcmcia",
  272. .id = -1,
  273. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  274. .resource = bfin_pcmcia_cf_resources,
  275. };
  276. #endif
  277. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  278. static struct platform_device rtc_device = {
  279. .name = "rtc-bfin",
  280. .id = -1,
  281. };
  282. #endif
  283. #if IS_ENABLED(CONFIG_SMC91X)
  284. #include <linux/smc91x.h>
  285. static struct smc91x_platdata smc91x_info = {
  286. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  287. .leda = RPC_LED_100_10,
  288. .ledb = RPC_LED_TX_RX,
  289. };
  290. static struct resource smc91x_resources[] = {
  291. {
  292. .name = "smc91x-regs",
  293. .start = 0x20300300,
  294. .end = 0x20300300 + 16,
  295. .flags = IORESOURCE_MEM,
  296. }, {
  297. .start = IRQ_PF7,
  298. .end = IRQ_PF7,
  299. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  300. },
  301. };
  302. static struct platform_device smc91x_device = {
  303. .name = "smc91x",
  304. .id = 0,
  305. .num_resources = ARRAY_SIZE(smc91x_resources),
  306. .resource = smc91x_resources,
  307. .dev = {
  308. .platform_data = &smc91x_info,
  309. },
  310. };
  311. #endif
  312. #if IS_ENABLED(CONFIG_DM9000)
  313. static struct resource dm9000_resources[] = {
  314. [0] = {
  315. .start = 0x203FB800,
  316. .end = 0x203FB800 + 1,
  317. .flags = IORESOURCE_MEM,
  318. },
  319. [1] = {
  320. .start = 0x203FB800 + 4,
  321. .end = 0x203FB800 + 5,
  322. .flags = IORESOURCE_MEM,
  323. },
  324. [2] = {
  325. .start = IRQ_PF9,
  326. .end = IRQ_PF9,
  327. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  328. },
  329. };
  330. static struct platform_device dm9000_device = {
  331. .name = "dm9000",
  332. .id = -1,
  333. .num_resources = ARRAY_SIZE(dm9000_resources),
  334. .resource = dm9000_resources,
  335. };
  336. #endif
  337. #if IS_ENABLED(CONFIG_BFIN_MAC)
  338. #include <linux/bfin_mac.h>
  339. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  340. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  341. {
  342. .addr = 1,
  343. .irq = IRQ_MAC_PHYINT,
  344. },
  345. };
  346. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  347. .phydev_number = 1,
  348. .phydev_data = bfin_phydev_data,
  349. .phy_mode = PHY_INTERFACE_MODE_RMII,
  350. .mac_peripherals = bfin_mac_peripherals,
  351. };
  352. static struct platform_device bfin_mii_bus = {
  353. .name = "bfin_mii_bus",
  354. .dev = {
  355. .platform_data = &bfin_mii_bus_data,
  356. }
  357. };
  358. static struct platform_device bfin_mac_device = {
  359. .name = "bfin_mac",
  360. .dev = {
  361. .platform_data = &bfin_mii_bus,
  362. }
  363. };
  364. #endif
  365. #if IS_ENABLED(CONFIG_USB_NET2272)
  366. static struct resource net2272_bfin_resources[] = {
  367. {
  368. .start = 0x20300000,
  369. .end = 0x20300000 + 0x100,
  370. .flags = IORESOURCE_MEM,
  371. }, {
  372. .start = 1,
  373. .flags = IORESOURCE_BUS,
  374. }, {
  375. .start = IRQ_PF7,
  376. .end = IRQ_PF7,
  377. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  378. },
  379. };
  380. static struct platform_device net2272_bfin_device = {
  381. .name = "net2272",
  382. .id = -1,
  383. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  384. .resource = net2272_bfin_resources,
  385. };
  386. #endif
  387. #if IS_ENABLED(CONFIG_MTD_M25P80)
  388. static struct mtd_partition bfin_spi_flash_partitions[] = {
  389. {
  390. .name = "bootloader(spi)",
  391. .size = 0x00040000,
  392. .offset = 0,
  393. .mask_flags = MTD_CAP_ROM
  394. }, {
  395. .name = "linux kernel(spi)",
  396. .size = MTDPART_SIZ_FULL,
  397. .offset = MTDPART_OFS_APPEND,
  398. }
  399. };
  400. static struct flash_platform_data bfin_spi_flash_data = {
  401. .name = "m25p80",
  402. .parts = bfin_spi_flash_partitions,
  403. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  404. .type = "m25p16",
  405. };
  406. /* SPI flash chip (m25p64) */
  407. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  408. .enable_dma = 0, /* use dma transfer with this chip*/
  409. };
  410. #endif
  411. #if IS_ENABLED(CONFIG_MMC_SPI)
  412. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  413. .enable_dma = 0,
  414. };
  415. #endif
  416. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  417. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  418. .model = 7877,
  419. .vref_delay_usecs = 50, /* internal, no capacitor */
  420. .x_plate_ohms = 419,
  421. .y_plate_ohms = 486,
  422. .pressure_max = 1000,
  423. .pressure_min = 0,
  424. .stopacq_polarity = 1,
  425. .first_conversion_delay = 3,
  426. .acquisition_time = 1,
  427. .averaging = 1,
  428. .pen_down_acc_interval = 1,
  429. };
  430. #endif
  431. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879)
  432. #include <linux/platform_data/ad7879.h>
  433. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  434. .model = 7879, /* Model = AD7879 */
  435. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  436. .pressure_max = 10000,
  437. .pressure_min = 0,
  438. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  439. .acquisition_time = 1, /* 4us acquisition time per sample */
  440. .median = 2, /* do 8 measurements */
  441. .averaging = 1, /* take the average of 4 middle samples */
  442. .pen_down_acc_interval = 255, /* 9.4 ms */
  443. .gpio_export = 0, /* Export GPIO to gpiolib */
  444. };
  445. #endif
  446. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  447. static const u16 bfin_snd_pin[][7] = {
  448. {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  449. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0, 0},
  450. {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  451. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_TFS, 0},
  452. };
  453. static struct bfin_snd_platform_data bfin_snd_data[] = {
  454. {
  455. .pin_req = &bfin_snd_pin[0][0],
  456. },
  457. {
  458. .pin_req = &bfin_snd_pin[1][0],
  459. },
  460. };
  461. #define BFIN_SND_RES(x) \
  462. [x] = { \
  463. { \
  464. .start = SPORT##x##_TCR1, \
  465. .end = SPORT##x##_TCR1, \
  466. .flags = IORESOURCE_MEM \
  467. }, \
  468. { \
  469. .start = CH_SPORT##x##_RX, \
  470. .end = CH_SPORT##x##_RX, \
  471. .flags = IORESOURCE_DMA, \
  472. }, \
  473. { \
  474. .start = CH_SPORT##x##_TX, \
  475. .end = CH_SPORT##x##_TX, \
  476. .flags = IORESOURCE_DMA, \
  477. }, \
  478. { \
  479. .start = IRQ_SPORT##x##_ERROR, \
  480. .end = IRQ_SPORT##x##_ERROR, \
  481. .flags = IORESOURCE_IRQ, \
  482. } \
  483. }
  484. static struct resource bfin_snd_resources[][4] = {
  485. BFIN_SND_RES(0),
  486. BFIN_SND_RES(1),
  487. };
  488. #endif
  489. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  490. static struct platform_device bfin_i2s_pcm = {
  491. .name = "bfin-i2s-pcm-audio",
  492. .id = -1,
  493. };
  494. #endif
  495. #if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
  496. static struct platform_device bfin_ac97_pcm = {
  497. .name = "bfin-ac97-pcm-audio",
  498. .id = -1,
  499. };
  500. #endif
  501. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  502. static struct platform_device bfin_i2s = {
  503. .name = "bfin-i2s",
  504. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  505. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  506. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  507. .dev = {
  508. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  509. },
  510. };
  511. #endif
  512. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
  513. static const char * const ad1836_link[] = {
  514. "bfin-i2s.0",
  515. "spi0.4",
  516. };
  517. static struct platform_device bfin_ad1836_machine = {
  518. .name = "bfin-snd-ad1836",
  519. .id = -1,
  520. .dev = {
  521. .platform_data = (void *)ad1836_link,
  522. },
  523. };
  524. #endif
  525. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  526. #if IS_ENABLED(CONFIG_MTD_M25P80)
  527. {
  528. /* the modalias must be the same as spi device driver name */
  529. .modalias = "m25p80", /* Name of spi_driver for this device */
  530. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  531. .bus_num = 0, /* Framework bus number */
  532. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  533. .platform_data = &bfin_spi_flash_data,
  534. .controller_data = &spi_flash_chip_info,
  535. .mode = SPI_MODE_3,
  536. },
  537. #endif
  538. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  539. {
  540. .modalias = "ad183x",
  541. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  542. .bus_num = 0,
  543. .chip_select = 4,
  544. .platform_data = "ad1836",
  545. .mode = SPI_MODE_3,
  546. },
  547. #endif
  548. #if IS_ENABLED(CONFIG_MMC_SPI)
  549. {
  550. .modalias = "mmc_spi",
  551. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  552. .bus_num = 0,
  553. .chip_select = 3,
  554. .controller_data = &mmc_spi_chip_info,
  555. .mode = SPI_MODE_0,
  556. },
  557. #endif
  558. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
  559. {
  560. .modalias = "ad7877",
  561. .platform_data = &bfin_ad7877_ts_info,
  562. .irq = IRQ_PF8,
  563. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  564. .bus_num = 0,
  565. .chip_select = 2,
  566. },
  567. #endif
  568. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_SPI)
  569. {
  570. .modalias = "ad7879",
  571. .platform_data = &bfin_ad7879_ts_info,
  572. .irq = IRQ_PF8,
  573. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  574. .bus_num = 0,
  575. .chip_select = 3,
  576. .mode = SPI_CPHA | SPI_CPOL,
  577. },
  578. #endif
  579. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  580. {
  581. .modalias = "spidev",
  582. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  583. .bus_num = 0,
  584. .chip_select = 1,
  585. },
  586. #endif
  587. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  588. {
  589. .modalias = "bfin-lq035q1-spi",
  590. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  591. .bus_num = 0,
  592. .chip_select = 7,
  593. .mode = SPI_CPHA | SPI_CPOL,
  594. },
  595. #endif
  596. };
  597. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  598. /* SPI controller data */
  599. static struct bfin5xx_spi_master bfin_spi0_info = {
  600. .num_chipselect = 8,
  601. .enable_dma = 1, /* master has the ability to do dma transfer */
  602. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  603. };
  604. /* SPI (0) */
  605. static struct resource bfin_spi0_resource[] = {
  606. [0] = {
  607. .start = SPI0_REGBASE,
  608. .end = SPI0_REGBASE + 0xFF,
  609. .flags = IORESOURCE_MEM,
  610. },
  611. [1] = {
  612. .start = CH_SPI,
  613. .end = CH_SPI,
  614. .flags = IORESOURCE_DMA,
  615. },
  616. [2] = {
  617. .start = IRQ_SPI,
  618. .end = IRQ_SPI,
  619. .flags = IORESOURCE_IRQ,
  620. },
  621. };
  622. static struct platform_device bfin_spi0_device = {
  623. .name = "bfin-spi",
  624. .id = 0, /* Bus number */
  625. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  626. .resource = bfin_spi0_resource,
  627. .dev = {
  628. .platform_data = &bfin_spi0_info, /* Passed to driver */
  629. },
  630. };
  631. #endif /* spi master and devices */
  632. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  633. #ifdef CONFIG_SERIAL_BFIN_UART0
  634. static struct resource bfin_uart0_resources[] = {
  635. {
  636. .start = UART0_THR,
  637. .end = UART0_GCTL+2,
  638. .flags = IORESOURCE_MEM,
  639. },
  640. {
  641. .start = IRQ_UART0_TX,
  642. .end = IRQ_UART0_TX,
  643. .flags = IORESOURCE_IRQ,
  644. },
  645. {
  646. .start = IRQ_UART0_RX,
  647. .end = IRQ_UART0_RX,
  648. .flags = IORESOURCE_IRQ,
  649. },
  650. {
  651. .start = IRQ_UART0_ERROR,
  652. .end = IRQ_UART0_ERROR,
  653. .flags = IORESOURCE_IRQ,
  654. },
  655. {
  656. .start = CH_UART0_TX,
  657. .end = CH_UART0_TX,
  658. .flags = IORESOURCE_DMA,
  659. },
  660. {
  661. .start = CH_UART0_RX,
  662. .end = CH_UART0_RX,
  663. .flags = IORESOURCE_DMA,
  664. },
  665. };
  666. static unsigned short bfin_uart0_peripherals[] = {
  667. P_UART0_TX, P_UART0_RX, 0
  668. };
  669. static struct platform_device bfin_uart0_device = {
  670. .name = "bfin-uart",
  671. .id = 0,
  672. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  673. .resource = bfin_uart0_resources,
  674. .dev = {
  675. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  676. },
  677. };
  678. #endif
  679. #ifdef CONFIG_SERIAL_BFIN_UART1
  680. static struct resource bfin_uart1_resources[] = {
  681. {
  682. .start = UART1_THR,
  683. .end = UART1_GCTL+2,
  684. .flags = IORESOURCE_MEM,
  685. },
  686. {
  687. .start = IRQ_UART1_TX,
  688. .end = IRQ_UART1_TX,
  689. .flags = IORESOURCE_IRQ,
  690. },
  691. {
  692. .start = IRQ_UART1_RX,
  693. .end = IRQ_UART1_RX,
  694. .flags = IORESOURCE_IRQ,
  695. },
  696. {
  697. .start = IRQ_UART1_ERROR,
  698. .end = IRQ_UART1_ERROR,
  699. .flags = IORESOURCE_IRQ,
  700. },
  701. {
  702. .start = CH_UART1_TX,
  703. .end = CH_UART1_TX,
  704. .flags = IORESOURCE_DMA,
  705. },
  706. {
  707. .start = CH_UART1_RX,
  708. .end = CH_UART1_RX,
  709. .flags = IORESOURCE_DMA,
  710. },
  711. #ifdef CONFIG_BFIN_UART1_CTSRTS
  712. { /* CTS pin */
  713. .start = GPIO_PF9,
  714. .end = GPIO_PF9,
  715. .flags = IORESOURCE_IO,
  716. },
  717. { /* RTS pin */
  718. .start = GPIO_PF10,
  719. .end = GPIO_PF10,
  720. .flags = IORESOURCE_IO,
  721. },
  722. #endif
  723. };
  724. static unsigned short bfin_uart1_peripherals[] = {
  725. P_UART1_TX, P_UART1_RX, 0
  726. };
  727. static struct platform_device bfin_uart1_device = {
  728. .name = "bfin-uart",
  729. .id = 1,
  730. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  731. .resource = bfin_uart1_resources,
  732. .dev = {
  733. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  734. },
  735. };
  736. #endif
  737. #endif
  738. #if IS_ENABLED(CONFIG_BFIN_SIR)
  739. #ifdef CONFIG_BFIN_SIR0
  740. static struct resource bfin_sir0_resources[] = {
  741. {
  742. .start = 0xFFC00400,
  743. .end = 0xFFC004FF,
  744. .flags = IORESOURCE_MEM,
  745. },
  746. {
  747. .start = IRQ_UART0_RX,
  748. .end = IRQ_UART0_RX+1,
  749. .flags = IORESOURCE_IRQ,
  750. },
  751. {
  752. .start = CH_UART0_RX,
  753. .end = CH_UART0_RX+1,
  754. .flags = IORESOURCE_DMA,
  755. },
  756. };
  757. static struct platform_device bfin_sir0_device = {
  758. .name = "bfin_sir",
  759. .id = 0,
  760. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  761. .resource = bfin_sir0_resources,
  762. };
  763. #endif
  764. #ifdef CONFIG_BFIN_SIR1
  765. static struct resource bfin_sir1_resources[] = {
  766. {
  767. .start = 0xFFC02000,
  768. .end = 0xFFC020FF,
  769. .flags = IORESOURCE_MEM,
  770. },
  771. {
  772. .start = IRQ_UART1_RX,
  773. .end = IRQ_UART1_RX+1,
  774. .flags = IORESOURCE_IRQ,
  775. },
  776. {
  777. .start = CH_UART1_RX,
  778. .end = CH_UART1_RX+1,
  779. .flags = IORESOURCE_DMA,
  780. },
  781. };
  782. static struct platform_device bfin_sir1_device = {
  783. .name = "bfin_sir",
  784. .id = 1,
  785. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  786. .resource = bfin_sir1_resources,
  787. };
  788. #endif
  789. #endif
  790. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  791. static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
  792. static struct resource bfin_twi0_resource[] = {
  793. [0] = {
  794. .start = TWI0_REGBASE,
  795. .end = TWI0_REGBASE,
  796. .flags = IORESOURCE_MEM,
  797. },
  798. [1] = {
  799. .start = IRQ_TWI,
  800. .end = IRQ_TWI,
  801. .flags = IORESOURCE_IRQ,
  802. },
  803. };
  804. static struct platform_device i2c_bfin_twi_device = {
  805. .name = "i2c-bfin-twi",
  806. .id = 0,
  807. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  808. .resource = bfin_twi0_resource,
  809. .dev = {
  810. .platform_data = &bfin_twi0_pins,
  811. },
  812. };
  813. #endif
  814. #if IS_ENABLED(CONFIG_PMIC_ADP5520)
  815. #include <linux/mfd/adp5520.h>
  816. /*
  817. * ADP5520/5501 LEDs Data
  818. */
  819. static struct led_info adp5520_leds[] = {
  820. {
  821. .name = "adp5520-led1",
  822. .default_trigger = "none",
  823. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  824. },
  825. };
  826. static struct adp5520_leds_platform_data adp5520_leds_data = {
  827. .num_leds = ARRAY_SIZE(adp5520_leds),
  828. .leds = adp5520_leds,
  829. .fade_in = ADP5520_FADE_T_600ms,
  830. .fade_out = ADP5520_FADE_T_600ms,
  831. .led_on_time = ADP5520_LED_ONT_600ms,
  832. };
  833. /*
  834. * ADP5520 Keypad Data
  835. */
  836. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  837. [ADP5520_KEY(3, 3)] = KEY_1,
  838. [ADP5520_KEY(2, 3)] = KEY_2,
  839. [ADP5520_KEY(1, 3)] = KEY_3,
  840. [ADP5520_KEY(0, 3)] = KEY_UP,
  841. [ADP5520_KEY(3, 2)] = KEY_4,
  842. [ADP5520_KEY(2, 2)] = KEY_5,
  843. [ADP5520_KEY(1, 2)] = KEY_6,
  844. [ADP5520_KEY(0, 2)] = KEY_DOWN,
  845. [ADP5520_KEY(3, 1)] = KEY_7,
  846. [ADP5520_KEY(2, 1)] = KEY_8,
  847. [ADP5520_KEY(1, 1)] = KEY_9,
  848. [ADP5520_KEY(0, 1)] = KEY_DOT,
  849. [ADP5520_KEY(3, 0)] = KEY_BACKSPACE,
  850. [ADP5520_KEY(2, 0)] = KEY_0,
  851. [ADP5520_KEY(1, 0)] = KEY_HELP,
  852. [ADP5520_KEY(0, 0)] = KEY_ENTER,
  853. };
  854. static struct adp5520_keys_platform_data adp5520_keys_data = {
  855. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  856. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  857. .keymap = adp5520_keymap,
  858. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  859. .repeat = 0,
  860. };
  861. /*
  862. * ADP5520/5501 Multifunction Device Init Data
  863. */
  864. static struct adp5520_platform_data adp5520_pdev_data = {
  865. .leds = &adp5520_leds_data,
  866. .keys = &adp5520_keys_data,
  867. };
  868. #endif
  869. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  870. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  871. {
  872. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  873. },
  874. #endif
  875. #if IS_ENABLED(CONFIG_INPUT_PCF8574)
  876. {
  877. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  878. .irq = IRQ_PF8,
  879. },
  880. #endif
  881. #if IS_ENABLED(CONFIG_FB_BFIN_7393)
  882. {
  883. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  884. },
  885. #endif
  886. #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_I2C)
  887. {
  888. I2C_BOARD_INFO("ad7879", 0x2C),
  889. .irq = IRQ_PF8,
  890. .platform_data = (void *)&bfin_ad7879_ts_info,
  891. },
  892. #endif
  893. #if IS_ENABLED(CONFIG_PMIC_ADP5520)
  894. {
  895. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  896. .irq = IRQ_PF9,
  897. .platform_data = (void *)&adp5520_pdev_data,
  898. },
  899. #endif
  900. #if IS_ENABLED(CONFIG_SND_SOC_SSM2602)
  901. {
  902. I2C_BOARD_INFO("ssm2602", 0x1b),
  903. },
  904. #endif
  905. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  906. {
  907. I2C_BOARD_INFO("ad5252", 0x2f),
  908. },
  909. #endif
  910. #if IS_ENABLED(CONFIG_SND_SOC_ADAU1373)
  911. {
  912. I2C_BOARD_INFO("adau1373", 0x1A),
  913. },
  914. #endif
  915. };
  916. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  917. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  918. static struct resource bfin_sport0_uart_resources[] = {
  919. {
  920. .start = SPORT0_TCR1,
  921. .end = SPORT0_MRCS3+4,
  922. .flags = IORESOURCE_MEM,
  923. },
  924. {
  925. .start = IRQ_SPORT0_RX,
  926. .end = IRQ_SPORT0_RX+1,
  927. .flags = IORESOURCE_IRQ,
  928. },
  929. {
  930. .start = IRQ_SPORT0_ERROR,
  931. .end = IRQ_SPORT0_ERROR,
  932. .flags = IORESOURCE_IRQ,
  933. },
  934. };
  935. static unsigned short bfin_sport0_peripherals[] = {
  936. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  937. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  938. };
  939. static struct platform_device bfin_sport0_uart_device = {
  940. .name = "bfin-sport-uart",
  941. .id = 0,
  942. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  943. .resource = bfin_sport0_uart_resources,
  944. .dev = {
  945. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  946. },
  947. };
  948. #endif
  949. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  950. static struct resource bfin_sport1_uart_resources[] = {
  951. {
  952. .start = SPORT1_TCR1,
  953. .end = SPORT1_MRCS3+4,
  954. .flags = IORESOURCE_MEM,
  955. },
  956. {
  957. .start = IRQ_SPORT1_RX,
  958. .end = IRQ_SPORT1_RX+1,
  959. .flags = IORESOURCE_IRQ,
  960. },
  961. {
  962. .start = IRQ_SPORT1_ERROR,
  963. .end = IRQ_SPORT1_ERROR,
  964. .flags = IORESOURCE_IRQ,
  965. },
  966. };
  967. static unsigned short bfin_sport1_peripherals[] = {
  968. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  969. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  970. };
  971. static struct platform_device bfin_sport1_uart_device = {
  972. .name = "bfin-sport-uart",
  973. .id = 1,
  974. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  975. .resource = bfin_sport1_uart_resources,
  976. .dev = {
  977. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  978. },
  979. };
  980. #endif
  981. #endif
  982. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  983. #include <linux/gpio_keys.h>
  984. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  985. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  986. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  987. };
  988. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  989. .buttons = bfin_gpio_keys_table,
  990. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  991. };
  992. static struct platform_device bfin_device_gpiokeys = {
  993. .name = "gpio-keys",
  994. .dev = {
  995. .platform_data = &bfin_gpio_keys_data,
  996. },
  997. };
  998. #endif
  999. #if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
  1000. #include <linux/platform_data/bfin_rotary.h>
  1001. static const u16 per_cnt[] = {
  1002. P_CNT_CUD,
  1003. P_CNT_CDG,
  1004. P_CNT_CZM,
  1005. 0
  1006. };
  1007. static struct bfin_rotary_platform_data bfin_rotary_data = {
  1008. /*.rotary_up_key = KEY_UP,*/
  1009. /*.rotary_down_key = KEY_DOWN,*/
  1010. .rotary_rel_code = REL_WHEEL,
  1011. .rotary_button_key = KEY_ENTER,
  1012. .debounce = 10, /* 0..17 */
  1013. .mode = ROT_QUAD_ENC | ROT_DEBE,
  1014. .pm_wakeup = 1,
  1015. .pin_list = per_cnt,
  1016. };
  1017. static struct resource bfin_rotary_resources[] = {
  1018. {
  1019. .start = CNT_CONFIG,
  1020. .end = CNT_CONFIG + 0xff,
  1021. .flags = IORESOURCE_MEM,
  1022. },
  1023. {
  1024. .start = IRQ_CNT,
  1025. .end = IRQ_CNT,
  1026. .flags = IORESOURCE_IRQ,
  1027. },
  1028. };
  1029. static struct platform_device bfin_rotary_device = {
  1030. .name = "bfin-rotary",
  1031. .id = -1,
  1032. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  1033. .resource = bfin_rotary_resources,
  1034. .dev = {
  1035. .platform_data = &bfin_rotary_data,
  1036. },
  1037. };
  1038. #endif
  1039. static const unsigned int cclk_vlev_datasheet[] =
  1040. {
  1041. VRPAIR(VLEV_100, 400000000),
  1042. VRPAIR(VLEV_105, 426000000),
  1043. VRPAIR(VLEV_110, 500000000),
  1044. VRPAIR(VLEV_115, 533000000),
  1045. VRPAIR(VLEV_120, 600000000),
  1046. };
  1047. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1048. .tuple_tab = cclk_vlev_datasheet,
  1049. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1050. .vr_settling_time = 25 /* us */,
  1051. };
  1052. static struct platform_device bfin_dpmc = {
  1053. .name = "bfin dpmc",
  1054. .dev = {
  1055. .platform_data = &bfin_dmpc_vreg_data,
  1056. },
  1057. };
  1058. static struct platform_device *stamp_devices[] __initdata = {
  1059. &bfin_dpmc,
  1060. #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
  1061. &bf5xx_nand_device,
  1062. #endif
  1063. #if IS_ENABLED(CONFIG_BFIN_CFPCMCIA)
  1064. &bfin_pcmcia_cf_device,
  1065. #endif
  1066. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  1067. &rtc_device,
  1068. #endif
  1069. #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
  1070. &bfin_isp1760_device,
  1071. #endif
  1072. #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
  1073. &musb_device,
  1074. #endif
  1075. #if IS_ENABLED(CONFIG_SMC91X)
  1076. &smc91x_device,
  1077. #endif
  1078. #if IS_ENABLED(CONFIG_DM9000)
  1079. &dm9000_device,
  1080. #endif
  1081. #if IS_ENABLED(CONFIG_BFIN_MAC)
  1082. &bfin_mii_bus,
  1083. &bfin_mac_device,
  1084. #endif
  1085. #if IS_ENABLED(CONFIG_USB_NET2272)
  1086. &net2272_bfin_device,
  1087. #endif
  1088. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  1089. &bfin_spi0_device,
  1090. #endif
  1091. #if IS_ENABLED(CONFIG_FB_BFIN_T350MCQB)
  1092. &bf52x_t350mcqb_device,
  1093. #endif
  1094. #if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1)
  1095. &bfin_lq035q1_device,
  1096. #endif
  1097. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  1098. #ifdef CONFIG_SERIAL_BFIN_UART0
  1099. &bfin_uart0_device,
  1100. #endif
  1101. #ifdef CONFIG_SERIAL_BFIN_UART1
  1102. &bfin_uart1_device,
  1103. #endif
  1104. #endif
  1105. #if IS_ENABLED(CONFIG_BFIN_SIR)
  1106. #ifdef CONFIG_BFIN_SIR0
  1107. &bfin_sir0_device,
  1108. #endif
  1109. #ifdef CONFIG_BFIN_SIR1
  1110. &bfin_sir1_device,
  1111. #endif
  1112. #endif
  1113. #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
  1114. &i2c_bfin_twi_device,
  1115. #endif
  1116. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  1117. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1118. &bfin_sport0_uart_device,
  1119. #endif
  1120. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1121. &bfin_sport1_uart_device,
  1122. #endif
  1123. #endif
  1124. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  1125. &bfin_device_gpiokeys,
  1126. #endif
  1127. #if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
  1128. &bfin_rotary_device,
  1129. #endif
  1130. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  1131. &ezkit_flash_device,
  1132. #endif
  1133. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  1134. &bfin_i2s_pcm,
  1135. #endif
  1136. #if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
  1137. &bfin_ac97_pcm,
  1138. #endif
  1139. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  1140. &bfin_i2s,
  1141. #endif
  1142. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
  1143. &bfin_ad1836_machine,
  1144. #endif
  1145. };
  1146. static int __init ezkit_init(void)
  1147. {
  1148. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1149. i2c_register_board_info(0, bfin_i2c_board_info,
  1150. ARRAY_SIZE(bfin_i2c_board_info));
  1151. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  1152. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1153. return 0;
  1154. }
  1155. arch_initcall(ezkit_init);
  1156. static struct platform_device *ezkit_early_devices[] __initdata = {
  1157. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1158. #ifdef CONFIG_SERIAL_BFIN_UART0
  1159. &bfin_uart0_device,
  1160. #endif
  1161. #ifdef CONFIG_SERIAL_BFIN_UART1
  1162. &bfin_uart1_device,
  1163. #endif
  1164. #endif
  1165. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1166. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1167. &bfin_sport0_uart_device,
  1168. #endif
  1169. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1170. &bfin_sport1_uart_device,
  1171. #endif
  1172. #endif
  1173. };
  1174. void __init native_machine_early_platform_add_devices(void)
  1175. {
  1176. printk(KERN_INFO "register early platform devices\n");
  1177. early_platform_add_devices(ezkit_early_devices,
  1178. ARRAY_SIZE(ezkit_early_devices));
  1179. }
  1180. void native_machine_restart(char *cmd)
  1181. {
  1182. /* workaround reboot hang when booting from SPI */
  1183. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  1184. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  1185. }
  1186. int bfin_get_ether_addr(char *addr)
  1187. {
  1188. /* the MAC is stored in OTP memory page 0xDF */
  1189. u32 ret;
  1190. u64 otp_mac;
  1191. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  1192. ret = otp_read(0xDF, 0x00, &otp_mac);
  1193. if (!(ret & 0x1)) {
  1194. char *otp_mac_p = (char *)&otp_mac;
  1195. for (ret = 0; ret < 6; ++ret)
  1196. addr[ret] = otp_mac_p[5 - ret];
  1197. }
  1198. return 0;
  1199. }
  1200. EXPORT_SYMBOL(bfin_get_ether_addr);