op_model_avr32.c 5.0 KB

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  1. /*
  2. * AVR32 Performance Counter Driver
  3. *
  4. * Copyright (C) 2005-2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Author: Ronny Pedersen
  11. */
  12. #include <linux/errno.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/irq.h>
  15. #include <linux/oprofile.h>
  16. #include <linux/sched.h>
  17. #include <linux/types.h>
  18. #include <asm/sysreg.h>
  19. #define AVR32_PERFCTR_IRQ_GROUP 0
  20. #define AVR32_PERFCTR_IRQ_LINE 1
  21. void avr32_backtrace(struct pt_regs * const regs, unsigned int depth);
  22. enum { PCCNT, PCNT0, PCNT1, NR_counter };
  23. struct avr32_perf_counter {
  24. unsigned long enabled;
  25. unsigned long event;
  26. unsigned long count;
  27. unsigned long unit_mask;
  28. unsigned long kernel;
  29. unsigned long user;
  30. u32 ie_mask;
  31. u32 flag_mask;
  32. };
  33. static struct avr32_perf_counter counter[NR_counter] = {
  34. {
  35. .ie_mask = SYSREG_BIT(IEC),
  36. .flag_mask = SYSREG_BIT(FC),
  37. }, {
  38. .ie_mask = SYSREG_BIT(IE0),
  39. .flag_mask = SYSREG_BIT(F0),
  40. }, {
  41. .ie_mask = SYSREG_BIT(IE1),
  42. .flag_mask = SYSREG_BIT(F1),
  43. },
  44. };
  45. static void avr32_perf_counter_reset(void)
  46. {
  47. /* Reset all counter and disable/clear all interrupts */
  48. sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
  49. | SYSREG_BIT(PCCR_C)
  50. | SYSREG_BIT(FC)
  51. | SYSREG_BIT(F0)
  52. | SYSREG_BIT(F1)));
  53. }
  54. static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
  55. {
  56. struct avr32_perf_counter *ctr = dev_id;
  57. struct pt_regs *regs;
  58. u32 pccr;
  59. if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
  60. & (1 << AVR32_PERFCTR_IRQ_LINE))))
  61. return IRQ_NONE;
  62. regs = get_irq_regs();
  63. pccr = sysreg_read(PCCR);
  64. /* Clear the interrupt flags we're about to handle */
  65. sysreg_write(PCCR, pccr);
  66. /* PCCNT */
  67. if (ctr->enabled && (pccr & ctr->flag_mask)) {
  68. sysreg_write(PCCNT, -ctr->count);
  69. oprofile_add_sample(regs, PCCNT);
  70. }
  71. ctr++;
  72. /* PCNT0 */
  73. if (ctr->enabled && (pccr & ctr->flag_mask)) {
  74. sysreg_write(PCNT0, -ctr->count);
  75. oprofile_add_sample(regs, PCNT0);
  76. }
  77. ctr++;
  78. /* PCNT1 */
  79. if (ctr->enabled && (pccr & ctr->flag_mask)) {
  80. sysreg_write(PCNT1, -ctr->count);
  81. oprofile_add_sample(regs, PCNT1);
  82. }
  83. return IRQ_HANDLED;
  84. }
  85. static int avr32_perf_counter_create_files(struct dentry *root)
  86. {
  87. struct dentry *dir;
  88. unsigned int i;
  89. char filename[4];
  90. for (i = 0; i < NR_counter; i++) {
  91. snprintf(filename, sizeof(filename), "%u", i);
  92. dir = oprofilefs_mkdir(root, filename);
  93. oprofilefs_create_ulong(dir, "enabled",
  94. &counter[i].enabled);
  95. oprofilefs_create_ulong(dir, "event",
  96. &counter[i].event);
  97. oprofilefs_create_ulong(dir, "count",
  98. &counter[i].count);
  99. /* Dummy entries */
  100. oprofilefs_create_ulong(dir, "kernel",
  101. &counter[i].kernel);
  102. oprofilefs_create_ulong(dir, "user",
  103. &counter[i].user);
  104. oprofilefs_create_ulong(dir, "unit_mask",
  105. &counter[i].unit_mask);
  106. }
  107. return 0;
  108. }
  109. static int avr32_perf_counter_setup(void)
  110. {
  111. struct avr32_perf_counter *ctr;
  112. u32 pccr;
  113. int ret;
  114. int i;
  115. pr_debug("avr32_perf_counter_setup\n");
  116. if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
  117. printk(KERN_ERR
  118. "oprofile: setup: perf counter already enabled\n");
  119. return -EBUSY;
  120. }
  121. ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
  122. avr32_perf_counter_interrupt, IRQF_SHARED,
  123. "oprofile", counter);
  124. if (ret)
  125. return ret;
  126. avr32_perf_counter_reset();
  127. pccr = 0;
  128. for (i = PCCNT; i < NR_counter; i++) {
  129. ctr = &counter[i];
  130. if (!ctr->enabled)
  131. continue;
  132. pr_debug("enabling counter %d...\n", i);
  133. pccr |= ctr->ie_mask;
  134. switch (i) {
  135. case PCCNT:
  136. /* PCCNT always counts cycles, so no events */
  137. sysreg_write(PCCNT, -ctr->count);
  138. break;
  139. case PCNT0:
  140. pccr |= SYSREG_BF(CONF0, ctr->event);
  141. sysreg_write(PCNT0, -ctr->count);
  142. break;
  143. case PCNT1:
  144. pccr |= SYSREG_BF(CONF1, ctr->event);
  145. sysreg_write(PCNT1, -ctr->count);
  146. break;
  147. }
  148. }
  149. pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
  150. sysreg_write(PCCR, pccr);
  151. return 0;
  152. }
  153. static void avr32_perf_counter_shutdown(void)
  154. {
  155. pr_debug("avr32_perf_counter_shutdown\n");
  156. avr32_perf_counter_reset();
  157. free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
  158. }
  159. static int avr32_perf_counter_start(void)
  160. {
  161. pr_debug("avr32_perf_counter_start\n");
  162. sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
  163. return 0;
  164. }
  165. static void avr32_perf_counter_stop(void)
  166. {
  167. pr_debug("avr32_perf_counter_stop\n");
  168. sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
  169. }
  170. static struct oprofile_operations avr32_perf_counter_ops __initdata = {
  171. .create_files = avr32_perf_counter_create_files,
  172. .setup = avr32_perf_counter_setup,
  173. .shutdown = avr32_perf_counter_shutdown,
  174. .start = avr32_perf_counter_start,
  175. .stop = avr32_perf_counter_stop,
  176. .cpu_type = "avr32",
  177. };
  178. int __init oprofile_arch_init(struct oprofile_operations *ops)
  179. {
  180. if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
  181. return -ENODEV;
  182. memcpy(ops, &avr32_perf_counter_ops,
  183. sizeof(struct oprofile_operations));
  184. ops->backtrace = avr32_backtrace;
  185. printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
  186. return 0;
  187. }
  188. void oprofile_arch_exit(void)
  189. {
  190. }