sysreg-sr.c 6.4 KB

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  1. /*
  2. * Copyright (C) 2012-2015 - ARM Ltd
  3. * Author: Marc Zyngier <marc.zyngier@arm.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include <linux/compiler.h>
  18. #include <linux/kvm_host.h>
  19. #include <asm/kvm_asm.h>
  20. #include <asm/kvm_hyp.h>
  21. /* Yes, this does nothing, on purpose */
  22. static void __hyp_text __sysreg_do_nothing(struct kvm_cpu_context *ctxt) { }
  23. /*
  24. * Non-VHE: Both host and guest must save everything.
  25. *
  26. * VHE: Host must save tpidr*_el0, actlr_el1, mdscr_el1, sp_el0,
  27. * and guest must save everything.
  28. */
  29. static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
  30. {
  31. ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1);
  32. ctxt->sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0);
  33. ctxt->sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0);
  34. ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1);
  35. ctxt->gp_regs.regs.sp = read_sysreg(sp_el0);
  36. }
  37. static void __hyp_text __sysreg_save_state(struct kvm_cpu_context *ctxt)
  38. {
  39. ctxt->sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2);
  40. ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1);
  41. ctxt->sys_regs[SCTLR_EL1] = read_sysreg_el1(sctlr);
  42. ctxt->sys_regs[CPACR_EL1] = read_sysreg_el1(cpacr);
  43. ctxt->sys_regs[TTBR0_EL1] = read_sysreg_el1(ttbr0);
  44. ctxt->sys_regs[TTBR1_EL1] = read_sysreg_el1(ttbr1);
  45. ctxt->sys_regs[TCR_EL1] = read_sysreg_el1(tcr);
  46. ctxt->sys_regs[ESR_EL1] = read_sysreg_el1(esr);
  47. ctxt->sys_regs[AFSR0_EL1] = read_sysreg_el1(afsr0);
  48. ctxt->sys_regs[AFSR1_EL1] = read_sysreg_el1(afsr1);
  49. ctxt->sys_regs[FAR_EL1] = read_sysreg_el1(far);
  50. ctxt->sys_regs[MAIR_EL1] = read_sysreg_el1(mair);
  51. ctxt->sys_regs[VBAR_EL1] = read_sysreg_el1(vbar);
  52. ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg_el1(contextidr);
  53. ctxt->sys_regs[AMAIR_EL1] = read_sysreg_el1(amair);
  54. ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg_el1(cntkctl);
  55. ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1);
  56. ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1);
  57. ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1);
  58. ctxt->gp_regs.elr_el1 = read_sysreg_el1(elr);
  59. ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(spsr);
  60. ctxt->gp_regs.regs.pc = read_sysreg_el2(elr);
  61. ctxt->gp_regs.regs.pstate = read_sysreg_el2(spsr);
  62. }
  63. static hyp_alternate_select(__sysreg_call_save_host_state,
  64. __sysreg_save_state, __sysreg_do_nothing,
  65. ARM64_HAS_VIRT_HOST_EXTN);
  66. void __hyp_text __sysreg_save_host_state(struct kvm_cpu_context *ctxt)
  67. {
  68. __sysreg_call_save_host_state()(ctxt);
  69. __sysreg_save_common_state(ctxt);
  70. }
  71. void __hyp_text __sysreg_save_guest_state(struct kvm_cpu_context *ctxt)
  72. {
  73. __sysreg_save_state(ctxt);
  74. __sysreg_save_common_state(ctxt);
  75. }
  76. static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)
  77. {
  78. write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1);
  79. write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0);
  80. write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0);
  81. write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1);
  82. write_sysreg(ctxt->gp_regs.regs.sp, sp_el0);
  83. }
  84. static void __hyp_text __sysreg_restore_state(struct kvm_cpu_context *ctxt)
  85. {
  86. write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2);
  87. write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1);
  88. write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1], sctlr);
  89. write_sysreg_el1(ctxt->sys_regs[CPACR_EL1], cpacr);
  90. write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1], ttbr0);
  91. write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1], ttbr1);
  92. write_sysreg_el1(ctxt->sys_regs[TCR_EL1], tcr);
  93. write_sysreg_el1(ctxt->sys_regs[ESR_EL1], esr);
  94. write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1], afsr0);
  95. write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1], afsr1);
  96. write_sysreg_el1(ctxt->sys_regs[FAR_EL1], far);
  97. write_sysreg_el1(ctxt->sys_regs[MAIR_EL1], mair);
  98. write_sysreg_el1(ctxt->sys_regs[VBAR_EL1], vbar);
  99. write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],contextidr);
  100. write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1], amair);
  101. write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1], cntkctl);
  102. write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1);
  103. write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1);
  104. write_sysreg(ctxt->gp_regs.sp_el1, sp_el1);
  105. write_sysreg_el1(ctxt->gp_regs.elr_el1, elr);
  106. write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],spsr);
  107. write_sysreg_el2(ctxt->gp_regs.regs.pc, elr);
  108. write_sysreg_el2(ctxt->gp_regs.regs.pstate, spsr);
  109. }
  110. static hyp_alternate_select(__sysreg_call_restore_host_state,
  111. __sysreg_restore_state, __sysreg_do_nothing,
  112. ARM64_HAS_VIRT_HOST_EXTN);
  113. void __hyp_text __sysreg_restore_host_state(struct kvm_cpu_context *ctxt)
  114. {
  115. __sysreg_call_restore_host_state()(ctxt);
  116. __sysreg_restore_common_state(ctxt);
  117. }
  118. void __hyp_text __sysreg_restore_guest_state(struct kvm_cpu_context *ctxt)
  119. {
  120. __sysreg_restore_state(ctxt);
  121. __sysreg_restore_common_state(ctxt);
  122. }
  123. void __hyp_text __sysreg32_save_state(struct kvm_vcpu *vcpu)
  124. {
  125. u64 *spsr, *sysreg;
  126. if (read_sysreg(hcr_el2) & HCR_RW)
  127. return;
  128. spsr = vcpu->arch.ctxt.gp_regs.spsr;
  129. sysreg = vcpu->arch.ctxt.sys_regs;
  130. spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt);
  131. spsr[KVM_SPSR_UND] = read_sysreg(spsr_und);
  132. spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq);
  133. spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq);
  134. sysreg[DACR32_EL2] = read_sysreg(dacr32_el2);
  135. sysreg[IFSR32_EL2] = read_sysreg(ifsr32_el2);
  136. if (__fpsimd_enabled())
  137. sysreg[FPEXC32_EL2] = read_sysreg(fpexc32_el2);
  138. if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
  139. sysreg[DBGVCR32_EL2] = read_sysreg(dbgvcr32_el2);
  140. }
  141. void __hyp_text __sysreg32_restore_state(struct kvm_vcpu *vcpu)
  142. {
  143. u64 *spsr, *sysreg;
  144. if (read_sysreg(hcr_el2) & HCR_RW)
  145. return;
  146. spsr = vcpu->arch.ctxt.gp_regs.spsr;
  147. sysreg = vcpu->arch.ctxt.sys_regs;
  148. write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt);
  149. write_sysreg(spsr[KVM_SPSR_UND], spsr_und);
  150. write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq);
  151. write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq);
  152. write_sysreg(sysreg[DACR32_EL2], dacr32_el2);
  153. write_sysreg(sysreg[IFSR32_EL2], ifsr32_el2);
  154. if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
  155. write_sysreg(sysreg[DBGVCR32_EL2], dbgvcr32_el2);
  156. }
  157. void __hyp_text __kvm_set_tpidr_el2(u64 tpidr_el2)
  158. {
  159. asm("msr tpidr_el2, %0": : "r" (tpidr_el2));
  160. }