actions-arm.c 6.1 KB

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  1. /*
  2. * Copyright (C) 2012 Rabin Vincent <rabin at rab.in>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/types.h>
  10. #include <linux/stddef.h>
  11. #include <linux/wait.h>
  12. #include <linux/uprobes.h>
  13. #include <linux/module.h>
  14. #include "../decode.h"
  15. #include "../decode-arm.h"
  16. #include "core.h"
  17. static int uprobes_substitute_pc(unsigned long *pinsn, u32 oregs)
  18. {
  19. probes_opcode_t insn = __mem_to_opcode_arm(*pinsn);
  20. probes_opcode_t temp;
  21. probes_opcode_t mask;
  22. int freereg;
  23. u32 free = 0xffff;
  24. u32 regs;
  25. for (regs = oregs; regs; regs >>= 4, insn >>= 4) {
  26. if ((regs & 0xf) == REG_TYPE_NONE)
  27. continue;
  28. free &= ~(1 << (insn & 0xf));
  29. }
  30. /* No PC, no problem */
  31. if (free & (1 << 15))
  32. return 15;
  33. if (!free)
  34. return -1;
  35. /*
  36. * fls instead of ffs ensures that for "ldrd r0, r1, [pc]" we would
  37. * pick LR instead of R1.
  38. */
  39. freereg = free = fls(free) - 1;
  40. temp = __mem_to_opcode_arm(*pinsn);
  41. insn = temp;
  42. regs = oregs;
  43. mask = 0xf;
  44. for (; regs; regs >>= 4, mask <<= 4, free <<= 4, temp >>= 4) {
  45. if ((regs & 0xf) == REG_TYPE_NONE)
  46. continue;
  47. if ((temp & 0xf) != 15)
  48. continue;
  49. insn &= ~mask;
  50. insn |= free & mask;
  51. }
  52. *pinsn = __opcode_to_mem_arm(insn);
  53. return freereg;
  54. }
  55. static void uprobe_set_pc(struct arch_uprobe *auprobe,
  56. struct arch_uprobe_task *autask,
  57. struct pt_regs *regs)
  58. {
  59. u32 pcreg = auprobe->pcreg;
  60. autask->backup = regs->uregs[pcreg];
  61. regs->uregs[pcreg] = regs->ARM_pc + 8;
  62. }
  63. static void uprobe_unset_pc(struct arch_uprobe *auprobe,
  64. struct arch_uprobe_task *autask,
  65. struct pt_regs *regs)
  66. {
  67. /* PC will be taken care of by common code */
  68. regs->uregs[auprobe->pcreg] = autask->backup;
  69. }
  70. static void uprobe_aluwrite_pc(struct arch_uprobe *auprobe,
  71. struct arch_uprobe_task *autask,
  72. struct pt_regs *regs)
  73. {
  74. u32 pcreg = auprobe->pcreg;
  75. alu_write_pc(regs->uregs[pcreg], regs);
  76. regs->uregs[pcreg] = autask->backup;
  77. }
  78. static void uprobe_write_pc(struct arch_uprobe *auprobe,
  79. struct arch_uprobe_task *autask,
  80. struct pt_regs *regs)
  81. {
  82. u32 pcreg = auprobe->pcreg;
  83. load_write_pc(regs->uregs[pcreg], regs);
  84. regs->uregs[pcreg] = autask->backup;
  85. }
  86. enum probes_insn
  87. decode_pc_ro(probes_opcode_t insn, struct arch_probes_insn *asi,
  88. const struct decode_header *d)
  89. {
  90. struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
  91. asi);
  92. struct decode_emulate *decode = (struct decode_emulate *) d;
  93. u32 regs = decode->header.type_regs.bits >> DECODE_TYPE_BITS;
  94. int reg;
  95. reg = uprobes_substitute_pc(&auprobe->ixol[0], regs);
  96. if (reg == 15)
  97. return INSN_GOOD;
  98. if (reg == -1)
  99. return INSN_REJECTED;
  100. auprobe->pcreg = reg;
  101. auprobe->prehandler = uprobe_set_pc;
  102. auprobe->posthandler = uprobe_unset_pc;
  103. return INSN_GOOD;
  104. }
  105. enum probes_insn
  106. decode_wb_pc(probes_opcode_t insn, struct arch_probes_insn *asi,
  107. const struct decode_header *d, bool alu)
  108. {
  109. struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
  110. asi);
  111. enum probes_insn ret = decode_pc_ro(insn, asi, d);
  112. if (((insn >> 12) & 0xf) == 15)
  113. auprobe->posthandler = alu ? uprobe_aluwrite_pc
  114. : uprobe_write_pc;
  115. return ret;
  116. }
  117. enum probes_insn
  118. decode_rd12rn16rm0rs8_rwflags(probes_opcode_t insn,
  119. struct arch_probes_insn *asi,
  120. const struct decode_header *d)
  121. {
  122. return decode_wb_pc(insn, asi, d, true);
  123. }
  124. enum probes_insn
  125. decode_ldr(probes_opcode_t insn, struct arch_probes_insn *asi,
  126. const struct decode_header *d)
  127. {
  128. return decode_wb_pc(insn, asi, d, false);
  129. }
  130. enum probes_insn
  131. uprobe_decode_ldmstm(probes_opcode_t insn,
  132. struct arch_probes_insn *asi,
  133. const struct decode_header *d)
  134. {
  135. struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
  136. asi);
  137. unsigned reglist = insn & 0xffff;
  138. int rn = (insn >> 16) & 0xf;
  139. int lbit = insn & (1 << 20);
  140. unsigned used = reglist | (1 << rn);
  141. if (rn == 15)
  142. return INSN_REJECTED;
  143. if (!(used & (1 << 15)))
  144. return INSN_GOOD;
  145. if (used & (1 << 14))
  146. return INSN_REJECTED;
  147. /* Use LR instead of PC */
  148. insn ^= 0xc000;
  149. auprobe->pcreg = 14;
  150. auprobe->ixol[0] = __opcode_to_mem_arm(insn);
  151. auprobe->prehandler = uprobe_set_pc;
  152. if (lbit)
  153. auprobe->posthandler = uprobe_write_pc;
  154. else
  155. auprobe->posthandler = uprobe_unset_pc;
  156. return INSN_GOOD;
  157. }
  158. const union decode_action uprobes_probes_actions[] = {
  159. [PROBES_PRELOAD_IMM] = {.handler = probes_simulate_nop},
  160. [PROBES_PRELOAD_REG] = {.handler = probes_simulate_nop},
  161. [PROBES_BRANCH_IMM] = {.handler = simulate_blx1},
  162. [PROBES_MRS] = {.handler = simulate_mrs},
  163. [PROBES_BRANCH_REG] = {.handler = simulate_blx2bx},
  164. [PROBES_CLZ] = {.handler = probes_simulate_nop},
  165. [PROBES_SATURATING_ARITHMETIC] = {.handler = probes_simulate_nop},
  166. [PROBES_MUL1] = {.handler = probes_simulate_nop},
  167. [PROBES_MUL2] = {.handler = probes_simulate_nop},
  168. [PROBES_SWP] = {.handler = probes_simulate_nop},
  169. [PROBES_LDRSTRD] = {.decoder = decode_pc_ro},
  170. [PROBES_LOAD_EXTRA] = {.decoder = decode_pc_ro},
  171. [PROBES_LOAD] = {.decoder = decode_ldr},
  172. [PROBES_STORE_EXTRA] = {.decoder = decode_pc_ro},
  173. [PROBES_STORE] = {.decoder = decode_pc_ro},
  174. [PROBES_MOV_IP_SP] = {.handler = simulate_mov_ipsp},
  175. [PROBES_DATA_PROCESSING_REG] = {
  176. .decoder = decode_rd12rn16rm0rs8_rwflags},
  177. [PROBES_DATA_PROCESSING_IMM] = {
  178. .decoder = decode_rd12rn16rm0rs8_rwflags},
  179. [PROBES_MOV_HALFWORD] = {.handler = probes_simulate_nop},
  180. [PROBES_SEV] = {.handler = probes_simulate_nop},
  181. [PROBES_WFE] = {.handler = probes_simulate_nop},
  182. [PROBES_SATURATE] = {.handler = probes_simulate_nop},
  183. [PROBES_REV] = {.handler = probes_simulate_nop},
  184. [PROBES_MMI] = {.handler = probes_simulate_nop},
  185. [PROBES_PACK] = {.handler = probes_simulate_nop},
  186. [PROBES_EXTEND] = {.handler = probes_simulate_nop},
  187. [PROBES_EXTEND_ADD] = {.handler = probes_simulate_nop},
  188. [PROBES_MUL_ADD_LONG] = {.handler = probes_simulate_nop},
  189. [PROBES_MUL_ADD] = {.handler = probes_simulate_nop},
  190. [PROBES_BITFIELD] = {.handler = probes_simulate_nop},
  191. [PROBES_BRANCH] = {.handler = simulate_bbl},
  192. [PROBES_LDMSTM] = {.decoder = uprobe_decode_ldmstm}
  193. };