opt-arm.c 11 KB

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  1. /*
  2. * Kernel Probes Jump Optimization (Optprobes)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. *
  18. * Copyright (C) IBM Corporation, 2002, 2004
  19. * Copyright (C) Hitachi Ltd., 2012
  20. * Copyright (C) Huawei Inc., 2014
  21. */
  22. #include <linux/kprobes.h>
  23. #include <linux/jump_label.h>
  24. #include <asm/kprobes.h>
  25. #include <asm/cacheflush.h>
  26. /* for arm_gen_branch */
  27. #include <asm/insn.h>
  28. /* for patch_text */
  29. #include <asm/patch.h>
  30. #include "core.h"
  31. /*
  32. * See register_usage_flags. If the probed instruction doesn't use PC,
  33. * we can copy it into template and have it executed directly without
  34. * simulation or emulation.
  35. */
  36. #define ARM_REG_PC 15
  37. #define can_kprobe_direct_exec(m) (!test_bit(ARM_REG_PC, &(m)))
  38. /*
  39. * NOTE: the first sub and add instruction will be modified according
  40. * to the stack cost of the instruction.
  41. */
  42. asm (
  43. ".global optprobe_template_entry\n"
  44. "optprobe_template_entry:\n"
  45. ".global optprobe_template_sub_sp\n"
  46. "optprobe_template_sub_sp:"
  47. " sub sp, sp, #0xff\n"
  48. " stmia sp, {r0 - r14} \n"
  49. ".global optprobe_template_add_sp\n"
  50. "optprobe_template_add_sp:"
  51. " add r3, sp, #0xff\n"
  52. " str r3, [sp, #52]\n"
  53. " mrs r4, cpsr\n"
  54. " str r4, [sp, #64]\n"
  55. " mov r1, sp\n"
  56. " ldr r0, 1f\n"
  57. " ldr r2, 2f\n"
  58. /*
  59. * AEABI requires an 8-bytes alignment stack. If
  60. * SP % 8 != 0 (SP % 4 == 0 should be ensured),
  61. * alloc more bytes here.
  62. */
  63. " and r4, sp, #4\n"
  64. " sub sp, sp, r4\n"
  65. #if __LINUX_ARM_ARCH__ >= 5
  66. " blx r2\n"
  67. #else
  68. " mov lr, pc\n"
  69. " mov pc, r2\n"
  70. #endif
  71. " add sp, sp, r4\n"
  72. " ldr r1, [sp, #64]\n"
  73. " tst r1, #"__stringify(PSR_T_BIT)"\n"
  74. " ldrne r2, [sp, #60]\n"
  75. " orrne r2, #1\n"
  76. " strne r2, [sp, #60] @ set bit0 of PC for thumb\n"
  77. " msr cpsr_cxsf, r1\n"
  78. ".global optprobe_template_restore_begin\n"
  79. "optprobe_template_restore_begin:\n"
  80. " ldmia sp, {r0 - r15}\n"
  81. ".global optprobe_template_restore_orig_insn\n"
  82. "optprobe_template_restore_orig_insn:\n"
  83. " nop\n"
  84. ".global optprobe_template_restore_end\n"
  85. "optprobe_template_restore_end:\n"
  86. " nop\n"
  87. ".global optprobe_template_val\n"
  88. "optprobe_template_val:\n"
  89. "1: .long 0\n"
  90. ".global optprobe_template_call\n"
  91. "optprobe_template_call:\n"
  92. "2: .long 0\n"
  93. ".global optprobe_template_end\n"
  94. "optprobe_template_end:\n");
  95. #define TMPL_VAL_IDX \
  96. ((unsigned long *)&optprobe_template_val - (unsigned long *)&optprobe_template_entry)
  97. #define TMPL_CALL_IDX \
  98. ((unsigned long *)&optprobe_template_call - (unsigned long *)&optprobe_template_entry)
  99. #define TMPL_END_IDX \
  100. ((unsigned long *)&optprobe_template_end - (unsigned long *)&optprobe_template_entry)
  101. #define TMPL_ADD_SP \
  102. ((unsigned long *)&optprobe_template_add_sp - (unsigned long *)&optprobe_template_entry)
  103. #define TMPL_SUB_SP \
  104. ((unsigned long *)&optprobe_template_sub_sp - (unsigned long *)&optprobe_template_entry)
  105. #define TMPL_RESTORE_BEGIN \
  106. ((unsigned long *)&optprobe_template_restore_begin - (unsigned long *)&optprobe_template_entry)
  107. #define TMPL_RESTORE_ORIGN_INSN \
  108. ((unsigned long *)&optprobe_template_restore_orig_insn - (unsigned long *)&optprobe_template_entry)
  109. #define TMPL_RESTORE_END \
  110. ((unsigned long *)&optprobe_template_restore_end - (unsigned long *)&optprobe_template_entry)
  111. /*
  112. * ARM can always optimize an instruction when using ARM ISA, except
  113. * instructions like 'str r0, [sp, r1]' which store to stack and unable
  114. * to determine stack space consumption statically.
  115. */
  116. int arch_prepared_optinsn(struct arch_optimized_insn *optinsn)
  117. {
  118. return optinsn->insn != NULL;
  119. }
  120. /*
  121. * In ARM ISA, kprobe opt always replace one instruction (4 bytes
  122. * aligned and 4 bytes long). It is impossible to encounter another
  123. * kprobe in the address range. So always return 0.
  124. */
  125. int arch_check_optimized_kprobe(struct optimized_kprobe *op)
  126. {
  127. return 0;
  128. }
  129. /* Caller must ensure addr & 3 == 0 */
  130. static int can_optimize(struct kprobe *kp)
  131. {
  132. if (kp->ainsn.stack_space < 0)
  133. return 0;
  134. /*
  135. * 255 is the biggest imm can be used in 'sub r0, r0, #<imm>'.
  136. * Number larger than 255 needs special encoding.
  137. */
  138. if (kp->ainsn.stack_space > 255 - sizeof(struct pt_regs))
  139. return 0;
  140. return 1;
  141. }
  142. /* Free optimized instruction slot */
  143. static void
  144. __arch_remove_optimized_kprobe(struct optimized_kprobe *op, int dirty)
  145. {
  146. if (op->optinsn.insn) {
  147. free_optinsn_slot(op->optinsn.insn, dirty);
  148. op->optinsn.insn = NULL;
  149. }
  150. }
  151. extern void kprobe_handler(struct pt_regs *regs);
  152. static void
  153. optimized_callback(struct optimized_kprobe *op, struct pt_regs *regs)
  154. {
  155. unsigned long flags;
  156. struct kprobe *p = &op->kp;
  157. struct kprobe_ctlblk *kcb;
  158. /* Save skipped registers */
  159. regs->ARM_pc = (unsigned long)op->kp.addr;
  160. regs->ARM_ORIG_r0 = ~0UL;
  161. local_irq_save(flags);
  162. kcb = get_kprobe_ctlblk();
  163. if (kprobe_running()) {
  164. kprobes_inc_nmissed_count(&op->kp);
  165. } else {
  166. __this_cpu_write(current_kprobe, &op->kp);
  167. kcb->kprobe_status = KPROBE_HIT_ACTIVE;
  168. opt_pre_handler(&op->kp, regs);
  169. __this_cpu_write(current_kprobe, NULL);
  170. }
  171. /*
  172. * We singlestep the replaced instruction only when it can't be
  173. * executed directly during restore.
  174. */
  175. if (!p->ainsn.kprobe_direct_exec)
  176. op->kp.ainsn.insn_singlestep(p->opcode, &p->ainsn, regs);
  177. local_irq_restore(flags);
  178. }
  179. NOKPROBE_SYMBOL(optimized_callback)
  180. int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *orig)
  181. {
  182. kprobe_opcode_t *code;
  183. unsigned long rel_chk;
  184. unsigned long val;
  185. unsigned long stack_protect = sizeof(struct pt_regs);
  186. if (!can_optimize(orig))
  187. return -EILSEQ;
  188. code = get_optinsn_slot();
  189. if (!code)
  190. return -ENOMEM;
  191. /*
  192. * Verify if the address gap is in 32MiB range, because this uses
  193. * a relative jump.
  194. *
  195. * kprobe opt use a 'b' instruction to branch to optinsn.insn.
  196. * According to ARM manual, branch instruction is:
  197. *
  198. * 31 28 27 24 23 0
  199. * +------+---+---+---+---+----------------+
  200. * | cond | 1 | 0 | 1 | 0 | imm24 |
  201. * +------+---+---+---+---+----------------+
  202. *
  203. * imm24 is a signed 24 bits integer. The real branch offset is computed
  204. * by: imm32 = SignExtend(imm24:'00', 32);
  205. *
  206. * So the maximum forward branch should be:
  207. * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
  208. * The maximum backword branch should be:
  209. * (0xff800000 << 2) = 0xfe000000 = -0x2000000
  210. *
  211. * We can simply check (rel & 0xfe000003):
  212. * if rel is positive, (rel & 0xfe000000) shoule be 0
  213. * if rel is negitive, (rel & 0xfe000000) should be 0xfe000000
  214. * the last '3' is used for alignment checking.
  215. */
  216. rel_chk = (unsigned long)((long)code -
  217. (long)orig->addr + 8) & 0xfe000003;
  218. if ((rel_chk != 0) && (rel_chk != 0xfe000000)) {
  219. /*
  220. * Different from x86, we free code buf directly instead of
  221. * calling __arch_remove_optimized_kprobe() because
  222. * we have not fill any field in op.
  223. */
  224. free_optinsn_slot(code, 0);
  225. return -ERANGE;
  226. }
  227. /* Copy arch-dep-instance from template. */
  228. memcpy(code, &optprobe_template_entry,
  229. TMPL_END_IDX * sizeof(kprobe_opcode_t));
  230. /* Adjust buffer according to instruction. */
  231. BUG_ON(orig->ainsn.stack_space < 0);
  232. stack_protect += orig->ainsn.stack_space;
  233. /* Should have been filtered by can_optimize(). */
  234. BUG_ON(stack_protect > 255);
  235. /* Create a 'sub sp, sp, #<stack_protect>' */
  236. code[TMPL_SUB_SP] = __opcode_to_mem_arm(0xe24dd000 | stack_protect);
  237. /* Create a 'add r3, sp, #<stack_protect>' */
  238. code[TMPL_ADD_SP] = __opcode_to_mem_arm(0xe28d3000 | stack_protect);
  239. /* Set probe information */
  240. val = (unsigned long)op;
  241. code[TMPL_VAL_IDX] = val;
  242. /* Set probe function call */
  243. val = (unsigned long)optimized_callback;
  244. code[TMPL_CALL_IDX] = val;
  245. /* If possible, copy insn and have it executed during restore */
  246. orig->ainsn.kprobe_direct_exec = false;
  247. if (can_kprobe_direct_exec(orig->ainsn.register_usage_flags)) {
  248. kprobe_opcode_t final_branch = arm_gen_branch(
  249. (unsigned long)(&code[TMPL_RESTORE_END]),
  250. (unsigned long)(op->kp.addr) + 4);
  251. if (final_branch != 0) {
  252. /*
  253. * Replace original 'ldmia sp, {r0 - r15}' with
  254. * 'ldmia {r0 - r14}', restore all registers except pc.
  255. */
  256. code[TMPL_RESTORE_BEGIN] = __opcode_to_mem_arm(0xe89d7fff);
  257. /* The original probed instruction */
  258. code[TMPL_RESTORE_ORIGN_INSN] = __opcode_to_mem_arm(orig->opcode);
  259. /* Jump back to next instruction */
  260. code[TMPL_RESTORE_END] = __opcode_to_mem_arm(final_branch);
  261. orig->ainsn.kprobe_direct_exec = true;
  262. }
  263. }
  264. flush_icache_range((unsigned long)code,
  265. (unsigned long)(&code[TMPL_END_IDX]));
  266. /* Set op->optinsn.insn means prepared. */
  267. op->optinsn.insn = code;
  268. return 0;
  269. }
  270. void __kprobes arch_optimize_kprobes(struct list_head *oplist)
  271. {
  272. struct optimized_kprobe *op, *tmp;
  273. list_for_each_entry_safe(op, tmp, oplist, list) {
  274. unsigned long insn;
  275. WARN_ON(kprobe_disabled(&op->kp));
  276. /*
  277. * Backup instructions which will be replaced
  278. * by jump address
  279. */
  280. memcpy(op->optinsn.copied_insn, op->kp.addr,
  281. RELATIVEJUMP_SIZE);
  282. insn = arm_gen_branch((unsigned long)op->kp.addr,
  283. (unsigned long)op->optinsn.insn);
  284. BUG_ON(insn == 0);
  285. /*
  286. * Make it a conditional branch if replaced insn
  287. * is consitional
  288. */
  289. insn = (__mem_to_opcode_arm(
  290. op->optinsn.copied_insn[0]) & 0xf0000000) |
  291. (insn & 0x0fffffff);
  292. /*
  293. * Similar to __arch_disarm_kprobe, operations which
  294. * removing breakpoints must be wrapped by stop_machine
  295. * to avoid racing.
  296. */
  297. kprobes_remove_breakpoint(op->kp.addr, insn);
  298. list_del_init(&op->list);
  299. }
  300. }
  301. void arch_unoptimize_kprobe(struct optimized_kprobe *op)
  302. {
  303. arch_arm_kprobe(&op->kp);
  304. }
  305. /*
  306. * Recover original instructions and breakpoints from relative jumps.
  307. * Caller must call with locking kprobe_mutex.
  308. */
  309. void arch_unoptimize_kprobes(struct list_head *oplist,
  310. struct list_head *done_list)
  311. {
  312. struct optimized_kprobe *op, *tmp;
  313. list_for_each_entry_safe(op, tmp, oplist, list) {
  314. arch_unoptimize_kprobe(op);
  315. list_move(&op->list, done_list);
  316. }
  317. }
  318. int arch_within_optimized_kprobe(struct optimized_kprobe *op,
  319. unsigned long addr)
  320. {
  321. return ((unsigned long)op->kp.addr <= addr &&
  322. (unsigned long)op->kp.addr + RELATIVEJUMP_SIZE > addr);
  323. }
  324. void arch_remove_optimized_kprobe(struct optimized_kprobe *op)
  325. {
  326. __arch_remove_optimized_kprobe(op, 1);
  327. }