tlb-v7.S 2.6 KB

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  1. /*
  2. * linux/arch/arm/mm/tlb-v7.S
  3. *
  4. * Copyright (C) 1997-2002 Russell King
  5. * Modified for ARMv7 by Catalin Marinas
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * ARM architecture version 6 TLB handling functions.
  12. * These assume a split I/D TLB.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/linkage.h>
  16. #include <asm/assembler.h>
  17. #include <asm/asm-offsets.h>
  18. #include <asm/page.h>
  19. #include <asm/tlbflush.h>
  20. #include "proc-macros.S"
  21. /*
  22. * v7wbi_flush_user_tlb_range(start, end, vma)
  23. *
  24. * Invalidate a range of TLB entries in the specified address space.
  25. *
  26. * - start - start address (may not be aligned)
  27. * - end - end address (exclusive, may not be aligned)
  28. * - vma - vma_struct describing address range
  29. *
  30. * It is assumed that:
  31. * - the "Invalidate single entry" instruction will invalidate
  32. * both the I and the D TLBs on Harvard-style TLBs
  33. */
  34. ENTRY(v7wbi_flush_user_tlb_range)
  35. vma_vm_mm r3, r2 @ get vma->vm_mm
  36. mmid r3, r3 @ get vm_mm->context.id
  37. dsb ish
  38. mov r0, r0, lsr #PAGE_SHIFT @ align address
  39. mov r1, r1, lsr #PAGE_SHIFT
  40. asid r3, r3 @ mask ASID
  41. #ifdef CONFIG_ARM_ERRATA_720789
  42. ALT_SMP(W(mov) r3, #0 )
  43. ALT_UP(W(nop) )
  44. #endif
  45. orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA
  46. mov r1, r1, lsl #PAGE_SHIFT
  47. 1:
  48. #ifdef CONFIG_ARM_ERRATA_720789
  49. ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
  50. #else
  51. ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable)
  52. #endif
  53. ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA
  54. add r0, r0, #PAGE_SZ
  55. cmp r0, r1
  56. blo 1b
  57. dsb ish
  58. ret lr
  59. ENDPROC(v7wbi_flush_user_tlb_range)
  60. /*
  61. * v7wbi_flush_kern_tlb_range(start,end)
  62. *
  63. * Invalidate a range of kernel TLB entries
  64. *
  65. * - start - start address (may not be aligned)
  66. * - end - end address (exclusive, may not be aligned)
  67. */
  68. ENTRY(v7wbi_flush_kern_tlb_range)
  69. dsb ish
  70. mov r0, r0, lsr #PAGE_SHIFT @ align address
  71. mov r1, r1, lsr #PAGE_SHIFT
  72. mov r0, r0, lsl #PAGE_SHIFT
  73. mov r1, r1, lsl #PAGE_SHIFT
  74. 1:
  75. #ifdef CONFIG_ARM_ERRATA_720789
  76. ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
  77. #else
  78. ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable)
  79. #endif
  80. ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA
  81. add r0, r0, #PAGE_SZ
  82. cmp r0, r1
  83. blo 1b
  84. dsb ish
  85. isb
  86. ret lr
  87. ENDPROC(v7wbi_flush_kern_tlb_range)
  88. __INIT
  89. /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */
  90. define_tlb_functions v7wbi, v7wbi_tlb_flags_up, flags_smp=v7wbi_tlb_flags_smp