assabet.c 18 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/assabet.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * This file contains all Assabet-specific tweaks.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/errno.h>
  16. #include <linux/ioport.h>
  17. #include <linux/platform_data/sa11x0-serial.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/mfd/ucb1x00.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <linux/delay.h>
  24. #include <linux/mm.h>
  25. #include <linux/leds.h>
  26. #include <linux/slab.h>
  27. #include <video/sa1100fb.h>
  28. #include <mach/hardware.h>
  29. #include <asm/mach-types.h>
  30. #include <asm/setup.h>
  31. #include <asm/page.h>
  32. #include <asm/pgtable-hwdef.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/tlbflush.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/flash.h>
  37. #include <linux/platform_data/irda-sa11x0.h>
  38. #include <asm/mach/map.h>
  39. #include <mach/assabet.h>
  40. #include <linux/platform_data/mfd-mcp-sa11x0.h>
  41. #include <mach/irqs.h>
  42. #include "generic.h"
  43. #define ASSABET_BCR_DB1110 \
  44. (ASSABET_BCR_SPK_OFF | \
  45. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  46. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  47. ASSABET_BCR_IRDA_MD0)
  48. #define ASSABET_BCR_DB1111 \
  49. (ASSABET_BCR_SPK_OFF | \
  50. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  51. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  52. ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  53. ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
  54. unsigned long SCR_value = ASSABET_SCR_INIT;
  55. EXPORT_SYMBOL(SCR_value);
  56. static unsigned long BCR_value = ASSABET_BCR_DB1110;
  57. void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  58. {
  59. unsigned long flags;
  60. local_irq_save(flags);
  61. BCR_value = (BCR_value & ~mask) | val;
  62. ASSABET_BCR = BCR_value;
  63. local_irq_restore(flags);
  64. }
  65. EXPORT_SYMBOL(ASSABET_BCR_frob);
  66. /*
  67. * The codec reset goes to three devices, so we need to release
  68. * the rest when any one of these requests it. However, that
  69. * causes the ADV7171 to consume around 100mA - more than half
  70. * the LCD-blanked power.
  71. *
  72. * With the ADV7171, LCD and backlight enabled, we go over
  73. * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
  74. * is connected, the Assabet crashes.
  75. */
  76. #define RST_UCB1X00 (1 << 0)
  77. #define RST_UDA1341 (1 << 1)
  78. #define RST_ADV7171 (1 << 2)
  79. #define SDA GPIO_GPIO(15)
  80. #define SCK GPIO_GPIO(18)
  81. #define MOD GPIO_GPIO(17)
  82. static void adv7171_start(void)
  83. {
  84. GPSR = SCK;
  85. udelay(1);
  86. GPSR = SDA;
  87. udelay(2);
  88. GPCR = SDA;
  89. }
  90. static void adv7171_stop(void)
  91. {
  92. GPSR = SCK;
  93. udelay(2);
  94. GPSR = SDA;
  95. udelay(1);
  96. }
  97. static void adv7171_send(unsigned byte)
  98. {
  99. unsigned i;
  100. for (i = 0; i < 8; i++, byte <<= 1) {
  101. GPCR = SCK;
  102. udelay(1);
  103. if (byte & 0x80)
  104. GPSR = SDA;
  105. else
  106. GPCR = SDA;
  107. udelay(1);
  108. GPSR = SCK;
  109. udelay(1);
  110. }
  111. GPCR = SCK;
  112. udelay(1);
  113. GPSR = SDA;
  114. udelay(1);
  115. GPDR &= ~SDA;
  116. GPSR = SCK;
  117. udelay(1);
  118. if (GPLR & SDA)
  119. printk(KERN_WARNING "No ACK from ADV7171\n");
  120. udelay(1);
  121. GPCR = SCK | SDA;
  122. udelay(1);
  123. GPDR |= SDA;
  124. udelay(1);
  125. }
  126. static void adv7171_write(unsigned reg, unsigned val)
  127. {
  128. unsigned gpdr = GPDR;
  129. unsigned gplr = GPLR;
  130. ASSABET_BCR = BCR_value | ASSABET_BCR_AUDIO_ON;
  131. udelay(100);
  132. GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
  133. GPDR = (GPDR | SCK | MOD) & ~SDA;
  134. udelay(10);
  135. if (!(GPLR & SDA))
  136. printk(KERN_WARNING "Something dragging SDA down?\n");
  137. GPDR |= SDA;
  138. adv7171_start();
  139. adv7171_send(0x54);
  140. adv7171_send(reg);
  141. adv7171_send(val);
  142. adv7171_stop();
  143. /* Restore GPIO state for L3 bus */
  144. GPSR = gplr & (SDA | SCK | MOD);
  145. GPCR = (~gplr) & (SDA | SCK | MOD);
  146. GPDR = gpdr;
  147. }
  148. static void adv7171_sleep(void)
  149. {
  150. /* Put the ADV7171 into sleep mode */
  151. adv7171_write(0x04, 0x40);
  152. }
  153. static unsigned codec_nreset;
  154. static void assabet_codec_reset(unsigned mask, int set)
  155. {
  156. unsigned long flags;
  157. bool old;
  158. local_irq_save(flags);
  159. old = !codec_nreset;
  160. if (set)
  161. codec_nreset &= ~mask;
  162. else
  163. codec_nreset |= mask;
  164. if (old != !codec_nreset) {
  165. if (codec_nreset) {
  166. ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
  167. adv7171_sleep();
  168. } else {
  169. ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
  170. }
  171. }
  172. local_irq_restore(flags);
  173. }
  174. static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
  175. {
  176. int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
  177. state == UCB_RST_PROBE_FAIL;
  178. assabet_codec_reset(RST_UCB1X00, set);
  179. }
  180. void assabet_uda1341_reset(int set)
  181. {
  182. assabet_codec_reset(RST_UDA1341, set);
  183. }
  184. EXPORT_SYMBOL(assabet_uda1341_reset);
  185. /*
  186. * Assabet flash support code.
  187. */
  188. #ifdef ASSABET_REV_4
  189. /*
  190. * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
  191. */
  192. static struct mtd_partition assabet_partitions[] = {
  193. {
  194. .name = "bootloader",
  195. .size = 0x00020000,
  196. .offset = 0,
  197. .mask_flags = MTD_WRITEABLE,
  198. }, {
  199. .name = "bootloader params",
  200. .size = 0x00020000,
  201. .offset = MTDPART_OFS_APPEND,
  202. .mask_flags = MTD_WRITEABLE,
  203. }, {
  204. .name = "jffs",
  205. .size = MTDPART_SIZ_FULL,
  206. .offset = MTDPART_OFS_APPEND,
  207. }
  208. };
  209. #else
  210. /*
  211. * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
  212. */
  213. static struct mtd_partition assabet_partitions[] = {
  214. {
  215. .name = "bootloader",
  216. .size = 0x00040000,
  217. .offset = 0,
  218. .mask_flags = MTD_WRITEABLE,
  219. }, {
  220. .name = "bootloader params",
  221. .size = 0x00040000,
  222. .offset = MTDPART_OFS_APPEND,
  223. .mask_flags = MTD_WRITEABLE,
  224. }, {
  225. .name = "jffs",
  226. .size = MTDPART_SIZ_FULL,
  227. .offset = MTDPART_OFS_APPEND,
  228. }
  229. };
  230. #endif
  231. static struct flash_platform_data assabet_flash_data = {
  232. .map_name = "cfi_probe",
  233. .parts = assabet_partitions,
  234. .nr_parts = ARRAY_SIZE(assabet_partitions),
  235. };
  236. static struct resource assabet_flash_resources[] = {
  237. DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
  238. DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
  239. };
  240. /*
  241. * Assabet IrDA support code.
  242. */
  243. static int assabet_irda_set_power(struct device *dev, unsigned int state)
  244. {
  245. static unsigned int bcr_state[4] = {
  246. ASSABET_BCR_IRDA_MD0,
  247. ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
  248. ASSABET_BCR_IRDA_MD1,
  249. 0
  250. };
  251. if (state < 4)
  252. ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
  253. bcr_state[state]);
  254. return 0;
  255. }
  256. static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
  257. {
  258. if (speed < 4000000)
  259. ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
  260. else
  261. ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
  262. }
  263. static struct irda_platform_data assabet_irda_data = {
  264. .set_power = assabet_irda_set_power,
  265. .set_speed = assabet_irda_set_speed,
  266. };
  267. static struct ucb1x00_plat_data assabet_ucb1x00_data = {
  268. .reset = assabet_ucb1x00_reset,
  269. .gpio_base = -1,
  270. .can_wakeup = 1,
  271. };
  272. static struct mcp_plat_data assabet_mcp_data = {
  273. .mccr0 = MCCR0_ADM,
  274. .sclk_rate = 11981000,
  275. .codec_pdata = &assabet_ucb1x00_data,
  276. };
  277. static void assabet_lcd_set_visual(u32 visual)
  278. {
  279. u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
  280. if (machine_is_assabet()) {
  281. #if 1 // phase 4 or newer Assabet's
  282. if (is_true_color)
  283. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  284. else
  285. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  286. #else
  287. // older Assabet's
  288. if (is_true_color)
  289. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  290. else
  291. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  292. #endif
  293. }
  294. }
  295. #ifndef ASSABET_PAL_VIDEO
  296. static void assabet_lcd_backlight_power(int on)
  297. {
  298. if (on)
  299. ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
  300. else
  301. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  302. }
  303. /*
  304. * Turn on/off the backlight. When turning the backlight on, we wait
  305. * 500us after turning it on so we don't cause the supplies to droop
  306. * when we enable the LCD controller (and cause a hard reset.)
  307. */
  308. static void assabet_lcd_power(int on)
  309. {
  310. if (on) {
  311. ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
  312. udelay(500);
  313. } else
  314. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  315. }
  316. /*
  317. * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
  318. * takes an RGB666 signal, but we provide it with an RGB565 signal
  319. * instead (def_rgb_16).
  320. */
  321. static struct sa1100fb_mach_info lq039q2ds54_info = {
  322. .pixclock = 171521, .bpp = 16,
  323. .xres = 320, .yres = 240,
  324. .hsync_len = 5, .vsync_len = 1,
  325. .left_margin = 61, .upper_margin = 3,
  326. .right_margin = 9, .lower_margin = 0,
  327. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  328. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  329. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
  330. .backlight_power = assabet_lcd_backlight_power,
  331. .lcd_power = assabet_lcd_power,
  332. .set_visual = assabet_lcd_set_visual,
  333. };
  334. #else
  335. static void assabet_pal_backlight_power(int on)
  336. {
  337. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  338. }
  339. static void assabet_pal_power(int on)
  340. {
  341. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  342. }
  343. static struct sa1100fb_mach_info pal_info = {
  344. .pixclock = 67797, .bpp = 16,
  345. .xres = 640, .yres = 512,
  346. .hsync_len = 64, .vsync_len = 6,
  347. .left_margin = 125, .upper_margin = 70,
  348. .right_margin = 115, .lower_margin = 36,
  349. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  350. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
  351. .backlight_power = assabet_pal_backlight_power,
  352. .lcd_power = assabet_pal_power,
  353. .set_visual = assabet_lcd_set_visual,
  354. };
  355. #endif
  356. #ifdef CONFIG_ASSABET_NEPONSET
  357. static struct resource neponset_resources[] = {
  358. DEFINE_RES_MEM(0x10000000, 0x08000000),
  359. DEFINE_RES_MEM(0x18000000, 0x04000000),
  360. DEFINE_RES_MEM(0x40000000, SZ_8K),
  361. DEFINE_RES_IRQ(IRQ_GPIO25),
  362. };
  363. #endif
  364. static void __init assabet_init(void)
  365. {
  366. /*
  367. * Ensure that the power supply is in "high power" mode.
  368. */
  369. GPSR = GPIO_GPIO16;
  370. GPDR |= GPIO_GPIO16;
  371. /*
  372. * Ensure that these pins are set as outputs and are driving
  373. * logic 0. This ensures that we won't inadvertently toggle
  374. * the WS latch in the CPLD, and we don't float causing
  375. * excessive power drain. --rmk
  376. */
  377. GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  378. GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  379. /*
  380. * Also set GPIO27 as an output; this is used to clock UART3
  381. * via the FPGA and as otherwise has no pullups or pulldowns,
  382. * so stop it floating.
  383. */
  384. GPCR = GPIO_GPIO27;
  385. GPDR |= GPIO_GPIO27;
  386. /*
  387. * Set up registers for sleep mode.
  388. */
  389. PWER = PWER_GPIO0;
  390. PGSR = 0;
  391. PCFR = 0;
  392. PSDR = 0;
  393. PPDR |= PPC_TXD3 | PPC_TXD1;
  394. PPSR |= PPC_TXD3 | PPC_TXD1;
  395. sa11x0_ppc_configure_mcp();
  396. if (machine_has_neponset()) {
  397. /*
  398. * Angel sets this, but other bootloaders may not.
  399. *
  400. * This must precede any driver calls to BCR_set()
  401. * or BCR_clear().
  402. */
  403. ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
  404. #ifndef CONFIG_ASSABET_NEPONSET
  405. printk( "Warning: Neponset detected but full support "
  406. "hasn't been configured in the kernel\n" );
  407. #else
  408. platform_device_register_simple("neponset", 0,
  409. neponset_resources, ARRAY_SIZE(neponset_resources));
  410. #endif
  411. }
  412. #ifndef ASSABET_PAL_VIDEO
  413. sa11x0_register_lcd(&lq039q2ds54_info);
  414. #else
  415. sa11x0_register_lcd(&pal_video);
  416. #endif
  417. sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
  418. ARRAY_SIZE(assabet_flash_resources));
  419. sa11x0_register_irda(&assabet_irda_data);
  420. sa11x0_register_mcp(&assabet_mcp_data);
  421. }
  422. /*
  423. * On Assabet, we must probe for the Neponset board _before_
  424. * paging_init() has occurred to actually determine the amount
  425. * of RAM available. To do so, we map the appropriate IO section
  426. * in the page table here in order to access GPIO registers.
  427. */
  428. static void __init map_sa1100_gpio_regs( void )
  429. {
  430. unsigned long phys = __PREG(GPLR) & PMD_MASK;
  431. unsigned long virt = (unsigned long)io_p2v(phys);
  432. int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
  433. pmd_t *pmd;
  434. pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
  435. *pmd = __pmd(phys | prot);
  436. flush_pmd_entry(pmd);
  437. }
  438. /*
  439. * Read System Configuration "Register"
  440. * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
  441. * User's Guide", section 4.4.1)
  442. *
  443. * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
  444. * to set up the serial port for decompression status messages. We
  445. * repeat it here because the kernel may not be loaded as a zImage, and
  446. * also because it's a hassle to communicate the SCR value to the kernel
  447. * from the decompressor.
  448. *
  449. * Note that IRQs are guaranteed to be disabled.
  450. */
  451. static void __init get_assabet_scr(void)
  452. {
  453. unsigned long uninitialized_var(scr), i;
  454. GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
  455. GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
  456. GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
  457. for(i = 100; i--; ) /* Read GPIO 9:2 */
  458. scr = GPLR;
  459. GPDR |= 0x3fc; /* restore correct pin direction */
  460. scr &= 0x3fc; /* save as system configuration byte. */
  461. SCR_value = scr;
  462. }
  463. static void __init
  464. fixup_assabet(struct tag *tags, char **cmdline)
  465. {
  466. /* This must be done before any call to machine_has_neponset() */
  467. map_sa1100_gpio_regs();
  468. get_assabet_scr();
  469. if (machine_has_neponset())
  470. printk("Neponset expansion board detected\n");
  471. }
  472. static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
  473. {
  474. if (port->mapbase == _Ser1UTCR0) {
  475. if (state)
  476. ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
  477. ASSABET_BCR_COM_RTS |
  478. ASSABET_BCR_COM_DTR);
  479. else
  480. ASSABET_BCR_set(ASSABET_BCR_RS232EN |
  481. ASSABET_BCR_COM_RTS |
  482. ASSABET_BCR_COM_DTR);
  483. }
  484. }
  485. /*
  486. * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
  487. * and UART3 (radio module). We only handle them for UART1 here.
  488. */
  489. static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
  490. {
  491. if (port->mapbase == _Ser1UTCR0) {
  492. u_int set = 0, clear = 0;
  493. if (mctrl & TIOCM_RTS)
  494. clear |= ASSABET_BCR_COM_RTS;
  495. else
  496. set |= ASSABET_BCR_COM_RTS;
  497. if (mctrl & TIOCM_DTR)
  498. clear |= ASSABET_BCR_COM_DTR;
  499. else
  500. set |= ASSABET_BCR_COM_DTR;
  501. ASSABET_BCR_clear(clear);
  502. ASSABET_BCR_set(set);
  503. }
  504. }
  505. static u_int assabet_get_mctrl(struct uart_port *port)
  506. {
  507. u_int ret = 0;
  508. u_int bsr = ASSABET_BSR;
  509. /* need 2 reads to read current value */
  510. bsr = ASSABET_BSR;
  511. if (port->mapbase == _Ser1UTCR0) {
  512. if (bsr & ASSABET_BSR_COM_DCD)
  513. ret |= TIOCM_CD;
  514. if (bsr & ASSABET_BSR_COM_CTS)
  515. ret |= TIOCM_CTS;
  516. if (bsr & ASSABET_BSR_COM_DSR)
  517. ret |= TIOCM_DSR;
  518. } else if (port->mapbase == _Ser3UTCR0) {
  519. if (bsr & ASSABET_BSR_RAD_DCD)
  520. ret |= TIOCM_CD;
  521. if (bsr & ASSABET_BSR_RAD_CTS)
  522. ret |= TIOCM_CTS;
  523. if (bsr & ASSABET_BSR_RAD_DSR)
  524. ret |= TIOCM_DSR;
  525. if (bsr & ASSABET_BSR_RAD_RI)
  526. ret |= TIOCM_RI;
  527. } else {
  528. ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
  529. }
  530. return ret;
  531. }
  532. static struct sa1100_port_fns assabet_port_fns __initdata = {
  533. .set_mctrl = assabet_set_mctrl,
  534. .get_mctrl = assabet_get_mctrl,
  535. .pm = assabet_uart_pm,
  536. };
  537. static struct map_desc assabet_io_desc[] __initdata = {
  538. { /* Board Control Register */
  539. .virtual = 0xf1000000,
  540. .pfn = __phys_to_pfn(0x12000000),
  541. .length = 0x00100000,
  542. .type = MT_DEVICE
  543. }, { /* MQ200 */
  544. .virtual = 0xf2800000,
  545. .pfn = __phys_to_pfn(0x4b800000),
  546. .length = 0x00800000,
  547. .type = MT_DEVICE
  548. }
  549. };
  550. static void __init assabet_map_io(void)
  551. {
  552. sa1100_map_io();
  553. iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
  554. /*
  555. * Set SUS bit in SDCR0 so serial port 1 functions.
  556. * Its called GPCLKR0 in my SA1110 manual.
  557. */
  558. Ser1SDCR0 |= SDCR0_SUS;
  559. MSC1 = (MSC1 & ~0xffff) |
  560. MSC_NonBrst | MSC_32BitStMem |
  561. MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
  562. if (!machine_has_neponset())
  563. sa1100_register_uart_fns(&assabet_port_fns);
  564. /*
  565. * When Neponset is attached, the first UART should be
  566. * UART3. That's what Angel is doing and many documents
  567. * are stating this.
  568. *
  569. * We do the Neponset mapping even if Neponset support
  570. * isn't compiled in so the user will still get something on
  571. * the expected physical serial port.
  572. *
  573. * We no longer do this; not all boot loaders support it,
  574. * and UART3 appears to be somewhat unreliable with blob.
  575. */
  576. sa1100_register_uart(0, 1);
  577. sa1100_register_uart(2, 3);
  578. }
  579. /* LEDs */
  580. #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
  581. struct assabet_led {
  582. struct led_classdev cdev;
  583. u32 mask;
  584. };
  585. /*
  586. * The triggers lines up below will only be used if the
  587. * LED triggers are compiled in.
  588. */
  589. static const struct {
  590. const char *name;
  591. const char *trigger;
  592. } assabet_leds[] = {
  593. { "assabet:red", "cpu0",},
  594. { "assabet:green", "heartbeat", },
  595. };
  596. /*
  597. * The LED control in Assabet is reversed:
  598. * - setting bit means turn off LED
  599. * - clearing bit means turn on LED
  600. */
  601. static void assabet_led_set(struct led_classdev *cdev,
  602. enum led_brightness b)
  603. {
  604. struct assabet_led *led = container_of(cdev,
  605. struct assabet_led, cdev);
  606. if (b != LED_OFF)
  607. ASSABET_BCR_clear(led->mask);
  608. else
  609. ASSABET_BCR_set(led->mask);
  610. }
  611. static enum led_brightness assabet_led_get(struct led_classdev *cdev)
  612. {
  613. struct assabet_led *led = container_of(cdev,
  614. struct assabet_led, cdev);
  615. return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
  616. }
  617. static int __init assabet_leds_init(void)
  618. {
  619. int i;
  620. if (!machine_is_assabet())
  621. return -ENODEV;
  622. for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
  623. struct assabet_led *led;
  624. led = kzalloc(sizeof(*led), GFP_KERNEL);
  625. if (!led)
  626. break;
  627. led->cdev.name = assabet_leds[i].name;
  628. led->cdev.brightness_set = assabet_led_set;
  629. led->cdev.brightness_get = assabet_led_get;
  630. led->cdev.default_trigger = assabet_leds[i].trigger;
  631. if (!i)
  632. led->mask = ASSABET_BCR_LED_RED;
  633. else
  634. led->mask = ASSABET_BCR_LED_GREEN;
  635. if (led_classdev_register(NULL, &led->cdev) < 0) {
  636. kfree(led);
  637. break;
  638. }
  639. }
  640. return 0;
  641. }
  642. /*
  643. * Since we may have triggers on any subsystem, defer registration
  644. * until after subsystem_init.
  645. */
  646. fs_initcall(assabet_leds_init);
  647. #endif
  648. MACHINE_START(ASSABET, "Intel-Assabet")
  649. .atag_offset = 0x100,
  650. .fixup = fixup_assabet,
  651. .map_io = assabet_map_io,
  652. .nr_irqs = SA1100_NR_IRQS,
  653. .init_irq = sa1100_init_irq,
  654. .init_time = sa1100_timer_init,
  655. .init_machine = assabet_init,
  656. .init_late = sa11x0_init_late,
  657. #ifdef CONFIG_SA1111
  658. .dma_zone_size = SZ_1M,
  659. #endif
  660. .restart = sa11x0_restart,
  661. MACHINE_END