setup-usb-phy.c 2.1 KB

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  1. /*
  2. * Copyright (C) 2011 Samsung Electronics Co.Ltd
  3. * Author: Joonyoung Shim <jy0922.shim@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/io.h>
  15. #include <linux/platform_device.h>
  16. #include <mach/map.h>
  17. #include <plat/cpu.h>
  18. #include <plat/usb-phy.h>
  19. #include "regs-sys.h"
  20. #include "regs-usb-hsotg-phy.h"
  21. static int s3c_usb_otgphy_init(struct platform_device *pdev)
  22. {
  23. struct clk *xusbxti;
  24. u32 phyclk;
  25. writel(readl(S3C64XX_OTHERS) | S3C64XX_OTHERS_USBMASK, S3C64XX_OTHERS);
  26. /* set clock frequency for PLL */
  27. phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK;
  28. xusbxti = clk_get(&pdev->dev, "xusbxti");
  29. if (xusbxti && !IS_ERR(xusbxti)) {
  30. switch (clk_get_rate(xusbxti)) {
  31. case 12 * MHZ:
  32. phyclk |= S3C_PHYCLK_CLKSEL_12M;
  33. break;
  34. case 24 * MHZ:
  35. phyclk |= S3C_PHYCLK_CLKSEL_24M;
  36. break;
  37. default:
  38. case 48 * MHZ:
  39. /* default reference clock */
  40. break;
  41. }
  42. clk_put(xusbxti);
  43. }
  44. /* TODO: select external clock/oscillator */
  45. writel(phyclk | S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK);
  46. /* set to normal OTG PHY */
  47. writel((readl(S3C_PHYPWR) & ~S3C_PHYPWR_NORMAL_MASK), S3C_PHYPWR);
  48. mdelay(1);
  49. /* reset OTG PHY and Link */
  50. writel(S3C_RSTCON_PHY | S3C_RSTCON_HCLK | S3C_RSTCON_PHYCLK,
  51. S3C_RSTCON);
  52. udelay(20); /* at-least 10uS */
  53. writel(0, S3C_RSTCON);
  54. return 0;
  55. }
  56. static int s3c_usb_otgphy_exit(struct platform_device *pdev)
  57. {
  58. writel((readl(S3C_PHYPWR) | S3C_PHYPWR_ANALOG_POWERDOWN |
  59. S3C_PHYPWR_OTG_DISABLE), S3C_PHYPWR);
  60. writel(readl(S3C64XX_OTHERS) & ~S3C64XX_OTHERS_USBMASK, S3C64XX_OTHERS);
  61. return 0;
  62. }
  63. int s5p_usb_phy_init(struct platform_device *pdev, int type)
  64. {
  65. if (type == USB_PHY_TYPE_DEVICE)
  66. return s3c_usb_otgphy_init(pdev);
  67. return -EINVAL;
  68. }
  69. int s5p_usb_phy_exit(struct platform_device *pdev, int type)
  70. {
  71. if (type == USB_PHY_TYPE_DEVICE)
  72. return s3c_usb_otgphy_exit(pdev);
  73. return -EINVAL;
  74. }