usb.c 15 KB

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  1. /*
  2. * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx
  3. *
  4. * Copyright (C) 2004 Texas Instruments, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/module.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <asm/irq.h>
  26. #include <mach/mux.h>
  27. #include <mach/usb.h>
  28. #include "common.h"
  29. /* These routines should handle the standard chip-specific modes
  30. * for usb0/1/2 ports, covering basic mux and transceiver setup.
  31. *
  32. * Some board-*.c files will need to set up additional mux options,
  33. * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  34. */
  35. /* TESTED ON:
  36. * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  37. * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  38. * - 5912 OSK UDC, with *nonstandard* A-to-A cable
  39. * - 1510 Innovator UDC with bundled usb0 cable
  40. * - 1510 Innovator OHCI with bundled usb1/usb2 cable
  41. * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  42. * - 1710 custom development board using alternate pin group
  43. * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  44. */
  45. #define INT_USB_IRQ_GEN IH2_BASE + 20
  46. #define INT_USB_IRQ_NISO IH2_BASE + 30
  47. #define INT_USB_IRQ_ISO IH2_BASE + 29
  48. #define INT_USB_IRQ_HGEN INT_USB_HHC_1
  49. #define INT_USB_IRQ_OTG IH2_BASE + 8
  50. #ifdef CONFIG_ARCH_OMAP_OTG
  51. void __init
  52. omap_otg_init(struct omap_usb_config *config)
  53. {
  54. u32 syscon;
  55. int alt_pingroup = 0;
  56. /* NOTE: no bus or clock setup (yet?) */
  57. syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
  58. if (!(syscon & OTG_RESET_DONE))
  59. pr_debug("USB resets not complete?\n");
  60. //omap_writew(0, OTG_IRQ_EN);
  61. /* pin muxing and transceiver pinouts */
  62. if (config->pins[0] > 2) /* alt pingroup 2 */
  63. alt_pingroup = 1;
  64. syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
  65. syscon |= config->usb1_init(config->pins[1]);
  66. syscon |= config->usb2_init(config->pins[2], alt_pingroup);
  67. pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
  68. omap_writel(syscon, OTG_SYSCON_1);
  69. syscon = config->hmc_mode;
  70. syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
  71. #ifdef CONFIG_USB_OTG
  72. if (config->otg)
  73. syscon |= OTG_EN;
  74. #endif
  75. if (cpu_class_is_omap1())
  76. pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
  77. omap_readl(USB_TRANSCEIVER_CTRL));
  78. pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
  79. omap_writel(syscon, OTG_SYSCON_2);
  80. printk("USB: hmc %d", config->hmc_mode);
  81. if (!alt_pingroup)
  82. printk(", usb2 alt %d wires", config->pins[2]);
  83. else if (config->pins[0])
  84. printk(", usb0 %d wires%s", config->pins[0],
  85. is_usb0_device(config) ? " (dev)" : "");
  86. if (config->pins[1])
  87. printk(", usb1 %d wires", config->pins[1]);
  88. if (!alt_pingroup && config->pins[2])
  89. printk(", usb2 %d wires", config->pins[2]);
  90. if (config->otg)
  91. printk(", Mini-AB on usb%d", config->otg - 1);
  92. printk("\n");
  93. if (cpu_class_is_omap1()) {
  94. u16 w;
  95. /* leave USB clocks/controllers off until needed */
  96. w = omap_readw(ULPD_SOFT_REQ);
  97. w &= ~SOFT_USB_CLK_REQ;
  98. omap_writew(w, ULPD_SOFT_REQ);
  99. w = omap_readw(ULPD_CLOCK_CTRL);
  100. w &= ~USB_MCLK_EN;
  101. w |= DIS_USB_PVCI_CLK;
  102. omap_writew(w, ULPD_CLOCK_CTRL);
  103. }
  104. syscon = omap_readl(OTG_SYSCON_1);
  105. syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
  106. #if IS_ENABLED(CONFIG_USB_OMAP)
  107. if (config->otg || config->register_dev) {
  108. struct platform_device *udc_device = config->udc_device;
  109. int status;
  110. syscon &= ~DEV_IDLE_EN;
  111. udc_device->dev.platform_data = config;
  112. status = platform_device_register(udc_device);
  113. if (status)
  114. pr_debug("can't register UDC device, %d\n", status);
  115. }
  116. #endif
  117. #if IS_ENABLED(CONFIG_USB_OHCI_HCD)
  118. if (config->otg || config->register_host) {
  119. struct platform_device *ohci_device = config->ohci_device;
  120. int status;
  121. syscon &= ~HST_IDLE_EN;
  122. ohci_device->dev.platform_data = config;
  123. status = platform_device_register(ohci_device);
  124. if (status)
  125. pr_debug("can't register OHCI device, %d\n", status);
  126. }
  127. #endif
  128. #ifdef CONFIG_USB_OTG
  129. if (config->otg) {
  130. struct platform_device *otg_device = config->otg_device;
  131. int status;
  132. syscon &= ~OTG_IDLE_EN;
  133. otg_device->dev.platform_data = config;
  134. status = platform_device_register(otg_device);
  135. if (status)
  136. pr_debug("can't register OTG device, %d\n", status);
  137. }
  138. #endif
  139. pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
  140. omap_writel(syscon, OTG_SYSCON_1);
  141. }
  142. #else
  143. void omap_otg_init(struct omap_usb_config *config) {}
  144. #endif
  145. #if IS_ENABLED(CONFIG_USB_OMAP)
  146. static struct resource udc_resources[] = {
  147. /* order is significant! */
  148. { /* registers */
  149. .start = UDC_BASE,
  150. .end = UDC_BASE + 0xff,
  151. .flags = IORESOURCE_MEM,
  152. }, { /* general IRQ */
  153. .start = INT_USB_IRQ_GEN,
  154. .flags = IORESOURCE_IRQ,
  155. }, { /* PIO IRQ */
  156. .start = INT_USB_IRQ_NISO,
  157. .flags = IORESOURCE_IRQ,
  158. }, { /* SOF IRQ */
  159. .start = INT_USB_IRQ_ISO,
  160. .flags = IORESOURCE_IRQ,
  161. },
  162. };
  163. static u64 udc_dmamask = ~(u32)0;
  164. static struct platform_device udc_device = {
  165. .name = "omap_udc",
  166. .id = -1,
  167. .dev = {
  168. .dma_mask = &udc_dmamask,
  169. .coherent_dma_mask = 0xffffffff,
  170. },
  171. .num_resources = ARRAY_SIZE(udc_resources),
  172. .resource = udc_resources,
  173. };
  174. static inline void udc_device_init(struct omap_usb_config *pdata)
  175. {
  176. /* IRQ numbers for omap7xx */
  177. if(cpu_is_omap7xx()) {
  178. udc_resources[1].start = INT_7XX_USB_GENI;
  179. udc_resources[2].start = INT_7XX_USB_NON_ISO;
  180. udc_resources[3].start = INT_7XX_USB_ISO;
  181. }
  182. pdata->udc_device = &udc_device;
  183. }
  184. #else
  185. static inline void udc_device_init(struct omap_usb_config *pdata)
  186. {
  187. }
  188. #endif
  189. #if IS_ENABLED(CONFIG_USB_OHCI_HCD)
  190. /* The dmamask must be set for OHCI to work */
  191. static u64 ohci_dmamask = ~(u32)0;
  192. static struct resource ohci_resources[] = {
  193. {
  194. .start = OMAP_OHCI_BASE,
  195. .end = OMAP_OHCI_BASE + 0xff,
  196. .flags = IORESOURCE_MEM,
  197. },
  198. {
  199. .start = INT_USB_IRQ_HGEN,
  200. .flags = IORESOURCE_IRQ,
  201. },
  202. };
  203. static struct platform_device ohci_device = {
  204. .name = "ohci",
  205. .id = -1,
  206. .dev = {
  207. .dma_mask = &ohci_dmamask,
  208. .coherent_dma_mask = 0xffffffff,
  209. },
  210. .num_resources = ARRAY_SIZE(ohci_resources),
  211. .resource = ohci_resources,
  212. };
  213. static inline void ohci_device_init(struct omap_usb_config *pdata)
  214. {
  215. if (cpu_is_omap7xx())
  216. ohci_resources[1].start = INT_7XX_USB_HHC_1;
  217. pdata->ohci_device = &ohci_device;
  218. pdata->ocpi_enable = &ocpi_enable;
  219. }
  220. #else
  221. static inline void ohci_device_init(struct omap_usb_config *pdata)
  222. {
  223. }
  224. #endif
  225. #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
  226. static struct resource otg_resources[] = {
  227. /* order is significant! */
  228. {
  229. .start = OTG_BASE,
  230. .end = OTG_BASE + 0xff,
  231. .flags = IORESOURCE_MEM,
  232. }, {
  233. .start = INT_USB_IRQ_OTG,
  234. .flags = IORESOURCE_IRQ,
  235. },
  236. };
  237. static struct platform_device otg_device = {
  238. .name = "omap_otg",
  239. .id = -1,
  240. .num_resources = ARRAY_SIZE(otg_resources),
  241. .resource = otg_resources,
  242. };
  243. static inline void otg_device_init(struct omap_usb_config *pdata)
  244. {
  245. if (cpu_is_omap7xx())
  246. otg_resources[1].start = INT_7XX_USB_OTG;
  247. pdata->otg_device = &otg_device;
  248. }
  249. #else
  250. static inline void otg_device_init(struct omap_usb_config *pdata)
  251. {
  252. }
  253. #endif
  254. static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
  255. {
  256. u32 syscon1 = 0;
  257. if (nwires == 0) {
  258. if (!cpu_is_omap15xx()) {
  259. u32 l;
  260. /* pulldown D+/D- */
  261. l = omap_readl(USB_TRANSCEIVER_CTRL);
  262. l &= ~(3 << 1);
  263. omap_writel(l, USB_TRANSCEIVER_CTRL);
  264. }
  265. return 0;
  266. }
  267. if (is_device) {
  268. if (cpu_is_omap7xx()) {
  269. omap_cfg_reg(AA17_7XX_USB_DM);
  270. omap_cfg_reg(W16_7XX_USB_PU_EN);
  271. omap_cfg_reg(W17_7XX_USB_VBUSI);
  272. omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
  273. omap_cfg_reg(W19_7XX_USB_DCRST);
  274. } else
  275. omap_cfg_reg(W4_USB_PUEN);
  276. }
  277. if (nwires == 2) {
  278. u32 l;
  279. // omap_cfg_reg(P9_USB_DP);
  280. // omap_cfg_reg(R8_USB_DM);
  281. if (cpu_is_omap15xx()) {
  282. /* This works on 1510-Innovator */
  283. return 0;
  284. }
  285. /* NOTES:
  286. * - peripheral should configure VBUS detection!
  287. * - only peripherals may use the internal D+/D- pulldowns
  288. * - OTG support on this port not yet written
  289. */
  290. /* Don't do this for omap7xx -- it causes USB to not work correctly */
  291. if (!cpu_is_omap7xx()) {
  292. l = omap_readl(USB_TRANSCEIVER_CTRL);
  293. l &= ~(7 << 4);
  294. if (!is_device)
  295. l |= (3 << 1);
  296. omap_writel(l, USB_TRANSCEIVER_CTRL);
  297. }
  298. return 3 << 16;
  299. }
  300. /* alternate pin config, external transceiver */
  301. if (cpu_is_omap15xx()) {
  302. printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
  303. return 0;
  304. }
  305. omap_cfg_reg(V6_USB0_TXD);
  306. omap_cfg_reg(W9_USB0_TXEN);
  307. omap_cfg_reg(W5_USB0_SE0);
  308. if (nwires != 3)
  309. omap_cfg_reg(Y5_USB0_RCV);
  310. /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
  311. * may be able to use I2C requests to set those bits along
  312. * with VBUS switching and overcurrent detection.
  313. */
  314. if (nwires != 6) {
  315. u32 l;
  316. l = omap_readl(USB_TRANSCEIVER_CTRL);
  317. l &= ~CONF_USB2_UNI_R;
  318. omap_writel(l, USB_TRANSCEIVER_CTRL);
  319. }
  320. switch (nwires) {
  321. case 3:
  322. syscon1 = 2;
  323. break;
  324. case 4:
  325. syscon1 = 1;
  326. break;
  327. case 6:
  328. syscon1 = 3;
  329. {
  330. u32 l;
  331. omap_cfg_reg(AA9_USB0_VP);
  332. omap_cfg_reg(R9_USB0_VM);
  333. l = omap_readl(USB_TRANSCEIVER_CTRL);
  334. l |= CONF_USB2_UNI_R;
  335. omap_writel(l, USB_TRANSCEIVER_CTRL);
  336. }
  337. break;
  338. default:
  339. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  340. 0, nwires);
  341. }
  342. return syscon1 << 16;
  343. }
  344. static u32 __init omap1_usb1_init(unsigned nwires)
  345. {
  346. u32 syscon1 = 0;
  347. if (!cpu_is_omap15xx() && nwires != 6) {
  348. u32 l;
  349. l = omap_readl(USB_TRANSCEIVER_CTRL);
  350. l &= ~CONF_USB1_UNI_R;
  351. omap_writel(l, USB_TRANSCEIVER_CTRL);
  352. }
  353. if (nwires == 0)
  354. return 0;
  355. /* external transceiver */
  356. omap_cfg_reg(USB1_TXD);
  357. omap_cfg_reg(USB1_TXEN);
  358. if (nwires != 3)
  359. omap_cfg_reg(USB1_RCV);
  360. if (cpu_is_omap15xx()) {
  361. omap_cfg_reg(USB1_SEO);
  362. omap_cfg_reg(USB1_SPEED);
  363. // SUSP
  364. } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
  365. omap_cfg_reg(W13_1610_USB1_SE0);
  366. omap_cfg_reg(R13_1610_USB1_SPEED);
  367. // SUSP
  368. } else if (cpu_is_omap1710()) {
  369. omap_cfg_reg(R13_1710_USB1_SE0);
  370. // SUSP
  371. } else {
  372. pr_debug("usb%d cpu unrecognized\n", 1);
  373. return 0;
  374. }
  375. switch (nwires) {
  376. case 2:
  377. goto bad;
  378. case 3:
  379. syscon1 = 2;
  380. break;
  381. case 4:
  382. syscon1 = 1;
  383. break;
  384. case 6:
  385. syscon1 = 3;
  386. omap_cfg_reg(USB1_VP);
  387. omap_cfg_reg(USB1_VM);
  388. if (!cpu_is_omap15xx()) {
  389. u32 l;
  390. l = omap_readl(USB_TRANSCEIVER_CTRL);
  391. l |= CONF_USB1_UNI_R;
  392. omap_writel(l, USB_TRANSCEIVER_CTRL);
  393. }
  394. break;
  395. default:
  396. bad:
  397. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  398. 1, nwires);
  399. }
  400. return syscon1 << 20;
  401. }
  402. static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
  403. {
  404. u32 syscon1 = 0;
  405. /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
  406. if (alt_pingroup || nwires == 0)
  407. return 0;
  408. if (!cpu_is_omap15xx() && nwires != 6) {
  409. u32 l;
  410. l = omap_readl(USB_TRANSCEIVER_CTRL);
  411. l &= ~CONF_USB2_UNI_R;
  412. omap_writel(l, USB_TRANSCEIVER_CTRL);
  413. }
  414. /* external transceiver */
  415. if (cpu_is_omap15xx()) {
  416. omap_cfg_reg(USB2_TXD);
  417. omap_cfg_reg(USB2_TXEN);
  418. omap_cfg_reg(USB2_SEO);
  419. if (nwires != 3)
  420. omap_cfg_reg(USB2_RCV);
  421. /* there is no USB2_SPEED */
  422. } else if (cpu_is_omap16xx()) {
  423. omap_cfg_reg(V6_USB2_TXD);
  424. omap_cfg_reg(W9_USB2_TXEN);
  425. omap_cfg_reg(W5_USB2_SE0);
  426. if (nwires != 3)
  427. omap_cfg_reg(Y5_USB2_RCV);
  428. // FIXME omap_cfg_reg(USB2_SPEED);
  429. } else {
  430. pr_debug("usb%d cpu unrecognized\n", 1);
  431. return 0;
  432. }
  433. // omap_cfg_reg(USB2_SUSP);
  434. switch (nwires) {
  435. case 2:
  436. goto bad;
  437. case 3:
  438. syscon1 = 2;
  439. break;
  440. case 4:
  441. syscon1 = 1;
  442. break;
  443. case 5:
  444. goto bad;
  445. case 6:
  446. syscon1 = 3;
  447. if (cpu_is_omap15xx()) {
  448. omap_cfg_reg(USB2_VP);
  449. omap_cfg_reg(USB2_VM);
  450. } else {
  451. u32 l;
  452. omap_cfg_reg(AA9_USB2_VP);
  453. omap_cfg_reg(R9_USB2_VM);
  454. l = omap_readl(USB_TRANSCEIVER_CTRL);
  455. l |= CONF_USB2_UNI_R;
  456. omap_writel(l, USB_TRANSCEIVER_CTRL);
  457. }
  458. break;
  459. default:
  460. bad:
  461. printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
  462. 2, nwires);
  463. }
  464. return syscon1 << 24;
  465. }
  466. #ifdef CONFIG_ARCH_OMAP15XX
  467. /* ULPD_DPLL_CTRL */
  468. #define DPLL_IOB (1 << 13)
  469. #define DPLL_PLL_ENABLE (1 << 4)
  470. #define DPLL_LOCK (1 << 0)
  471. /* ULPD_APLL_CTRL */
  472. #define APLL_NDPLL_SWITCH (1 << 0)
  473. static void __init omap_1510_usb_init(struct omap_usb_config *config)
  474. {
  475. unsigned int val;
  476. u16 w;
  477. config->usb0_init(config->pins[0], is_usb0_device(config));
  478. config->usb1_init(config->pins[1]);
  479. config->usb2_init(config->pins[2], 0);
  480. val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
  481. val |= (config->hmc_mode << 1);
  482. omap_writel(val, MOD_CONF_CTRL_0);
  483. printk("USB: hmc %d", config->hmc_mode);
  484. if (config->pins[0])
  485. printk(", usb0 %d wires%s", config->pins[0],
  486. is_usb0_device(config) ? " (dev)" : "");
  487. if (config->pins[1])
  488. printk(", usb1 %d wires", config->pins[1]);
  489. if (config->pins[2])
  490. printk(", usb2 %d wires", config->pins[2]);
  491. printk("\n");
  492. /* use DPLL for 48 MHz function clock */
  493. pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
  494. omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
  495. w = omap_readw(ULPD_APLL_CTRL);
  496. w &= ~APLL_NDPLL_SWITCH;
  497. omap_writew(w, ULPD_APLL_CTRL);
  498. w = omap_readw(ULPD_DPLL_CTRL);
  499. w |= DPLL_IOB | DPLL_PLL_ENABLE;
  500. omap_writew(w, ULPD_DPLL_CTRL);
  501. w = omap_readw(ULPD_SOFT_REQ);
  502. w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
  503. omap_writew(w, ULPD_SOFT_REQ);
  504. while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
  505. cpu_relax();
  506. #if IS_ENABLED(CONFIG_USB_OMAP)
  507. if (config->register_dev) {
  508. int status;
  509. udc_device.dev.platform_data = config;
  510. status = platform_device_register(&udc_device);
  511. if (status)
  512. pr_debug("can't register UDC device, %d\n", status);
  513. /* udc driver gates 48MHz by D+ pullup */
  514. }
  515. #endif
  516. #if IS_ENABLED(CONFIG_USB_OHCI_HCD)
  517. if (config->register_host) {
  518. int status;
  519. ohci_device.dev.platform_data = config;
  520. status = platform_device_register(&ohci_device);
  521. if (status)
  522. pr_debug("can't register OHCI device, %d\n", status);
  523. /* hcd explicitly gates 48MHz */
  524. }
  525. #endif
  526. }
  527. #else
  528. static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
  529. #endif
  530. void __init omap1_usb_init(struct omap_usb_config *_pdata)
  531. {
  532. struct omap_usb_config *pdata;
  533. pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
  534. if (!pdata)
  535. return;
  536. pdata->usb0_init = omap1_usb0_init;
  537. pdata->usb1_init = omap1_usb1_init;
  538. pdata->usb2_init = omap1_usb2_init;
  539. udc_device_init(pdata);
  540. ohci_device_init(pdata);
  541. otg_device_init(pdata);
  542. if (cpu_is_omap7xx() || cpu_is_omap16xx())
  543. omap_otg_init(pdata);
  544. else if (cpu_is_omap15xx())
  545. omap_1510_usb_init(pdata);
  546. else
  547. printk(KERN_ERR "USB: No init for your chip yet\n");
  548. }