mach-mx35_3ds.c 15 KB

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  1. /*
  2. * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
  3. * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
  4. *
  5. * Author: Fabio Estevam <fabio.estevam@freescale.com>
  6. *
  7. * Copyright (C) 2011 Meprolight, Ltd.
  8. * Alex Gershgorin <alexg@meprolight.com>
  9. *
  10. * Modified from i.MX31 3-Stack Development System
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. */
  22. /*
  23. * This machine is known as:
  24. * - i.MX35 3-Stack Development System
  25. * - i.MX35 Platform Development Kit (i.MX35 PDK)
  26. */
  27. #include <linux/types.h>
  28. #include <linux/init.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/memory.h>
  31. #include <linux/gpio.h>
  32. #include <linux/usb/otg.h>
  33. #include <linux/mtd/physmap.h>
  34. #include <linux/mfd/mc13892.h>
  35. #include <linux/regulator/machine.h>
  36. #include <asm/mach-types.h>
  37. #include <asm/mach/arch.h>
  38. #include <asm/mach/time.h>
  39. #include <asm/mach/map.h>
  40. #include <asm/memblock.h>
  41. #include <video/platform_lcd.h>
  42. #include <media/soc_camera.h>
  43. #include "3ds_debugboard.h"
  44. #include "common.h"
  45. #include "devices-imx35.h"
  46. #include "ehci.h"
  47. #include "hardware.h"
  48. #include "iomux-mx35.h"
  49. #define GPIO_MC9S08DZ60_GPS_ENABLE 0
  50. #define GPIO_MC9S08DZ60_HDD_ENABLE 4
  51. #define GPIO_MC9S08DZ60_WIFI_ENABLE 5
  52. #define GPIO_MC9S08DZ60_LCD_ENABLE 6
  53. #define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8
  54. static const struct fb_videomode fb_modedb[] = {
  55. {
  56. /* 800x480 @ 55 Hz */
  57. .name = "Ceramate-CLAA070VC01",
  58. .refresh = 55,
  59. .xres = 800,
  60. .yres = 480,
  61. .pixclock = 40000,
  62. .left_margin = 40,
  63. .right_margin = 40,
  64. .upper_margin = 5,
  65. .lower_margin = 5,
  66. .hsync_len = 20,
  67. .vsync_len = 10,
  68. .sync = FB_SYNC_OE_ACT_HIGH,
  69. .vmode = FB_VMODE_NONINTERLACED,
  70. .flag = 0,
  71. },
  72. };
  73. static struct mx3fb_platform_data mx3fb_pdata __initdata = {
  74. .name = "Ceramate-CLAA070VC01",
  75. .mode = fb_modedb,
  76. .num_modes = ARRAY_SIZE(fb_modedb),
  77. };
  78. static struct i2c_board_info __initdata i2c_devices_3ds[] = {
  79. {
  80. I2C_BOARD_INFO("mc9s08dz60", 0x69),
  81. },
  82. };
  83. static int lcd_power_gpio = -ENXIO;
  84. static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)
  85. {
  86. return !strcmp(chip->label, data);
  87. }
  88. static void mx35_3ds_lcd_set_power(
  89. struct plat_lcd_data *pd, unsigned int power)
  90. {
  91. struct gpio_chip *chip;
  92. if (!gpio_is_valid(lcd_power_gpio)) {
  93. chip = gpiochip_find(
  94. "mc9s08dz60", mc9s08dz60_gpiochip_match);
  95. if (chip) {
  96. lcd_power_gpio =
  97. chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
  98. if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
  99. pr_err("error: gpio already requested!\n");
  100. lcd_power_gpio = -ENXIO;
  101. }
  102. } else {
  103. pr_err("error: didn't find mc9s08dz60 gpio chip\n");
  104. }
  105. }
  106. if (gpio_is_valid(lcd_power_gpio))
  107. gpio_set_value_cansleep(lcd_power_gpio, power);
  108. }
  109. static struct plat_lcd_data mx35_3ds_lcd_data = {
  110. .set_power = mx35_3ds_lcd_set_power,
  111. };
  112. static struct platform_device mx35_3ds_lcd = {
  113. .name = "platform-lcd",
  114. .dev.platform_data = &mx35_3ds_lcd_data,
  115. };
  116. static const struct imxuart_platform_data uart_pdata __initconst = {
  117. .flags = IMXUART_HAVE_RTSCTS,
  118. };
  119. static struct physmap_flash_data mx35pdk_flash_data = {
  120. .width = 2,
  121. };
  122. static struct resource mx35pdk_flash_resource = {
  123. .start = MX35_CS0_BASE_ADDR,
  124. .end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
  125. .flags = IORESOURCE_MEM,
  126. };
  127. static struct platform_device mx35pdk_flash = {
  128. .name = "physmap-flash",
  129. .id = 0,
  130. .dev = {
  131. .platform_data = &mx35pdk_flash_data,
  132. },
  133. .resource = &mx35pdk_flash_resource,
  134. .num_resources = 1,
  135. };
  136. static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
  137. .width = 1,
  138. .hw_ecc = 1,
  139. .flash_bbt = 1,
  140. };
  141. static struct platform_device *devices[] __initdata = {
  142. &mx35pdk_flash,
  143. };
  144. static const iomux_v3_cfg_t mx35pdk_pads[] __initconst = {
  145. /* UART1 */
  146. MX35_PAD_CTS1__UART1_CTS,
  147. MX35_PAD_RTS1__UART1_RTS,
  148. MX35_PAD_TXD1__UART1_TXD_MUX,
  149. MX35_PAD_RXD1__UART1_RXD_MUX,
  150. /* FEC */
  151. MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
  152. MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
  153. MX35_PAD_FEC_RX_DV__FEC_RX_DV,
  154. MX35_PAD_FEC_COL__FEC_COL,
  155. MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
  156. MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
  157. MX35_PAD_FEC_TX_EN__FEC_TX_EN,
  158. MX35_PAD_FEC_MDC__FEC_MDC,
  159. MX35_PAD_FEC_MDIO__FEC_MDIO,
  160. MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
  161. MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
  162. MX35_PAD_FEC_CRS__FEC_CRS,
  163. MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
  164. MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
  165. MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
  166. MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
  167. MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
  168. MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
  169. /* USBOTG */
  170. MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
  171. MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
  172. /* USBH1 */
  173. MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
  174. MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
  175. /* SDCARD */
  176. MX35_PAD_SD1_CMD__ESDHC1_CMD,
  177. MX35_PAD_SD1_CLK__ESDHC1_CLK,
  178. MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
  179. MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
  180. MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
  181. MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
  182. /* I2C1 */
  183. MX35_PAD_I2C1_CLK__I2C1_SCL,
  184. MX35_PAD_I2C1_DAT__I2C1_SDA,
  185. /* Display */
  186. MX35_PAD_LD0__IPU_DISPB_DAT_0,
  187. MX35_PAD_LD1__IPU_DISPB_DAT_1,
  188. MX35_PAD_LD2__IPU_DISPB_DAT_2,
  189. MX35_PAD_LD3__IPU_DISPB_DAT_3,
  190. MX35_PAD_LD4__IPU_DISPB_DAT_4,
  191. MX35_PAD_LD5__IPU_DISPB_DAT_5,
  192. MX35_PAD_LD6__IPU_DISPB_DAT_6,
  193. MX35_PAD_LD7__IPU_DISPB_DAT_7,
  194. MX35_PAD_LD8__IPU_DISPB_DAT_8,
  195. MX35_PAD_LD9__IPU_DISPB_DAT_9,
  196. MX35_PAD_LD10__IPU_DISPB_DAT_10,
  197. MX35_PAD_LD11__IPU_DISPB_DAT_11,
  198. MX35_PAD_LD12__IPU_DISPB_DAT_12,
  199. MX35_PAD_LD13__IPU_DISPB_DAT_13,
  200. MX35_PAD_LD14__IPU_DISPB_DAT_14,
  201. MX35_PAD_LD15__IPU_DISPB_DAT_15,
  202. MX35_PAD_LD16__IPU_DISPB_DAT_16,
  203. MX35_PAD_LD17__IPU_DISPB_DAT_17,
  204. MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
  205. MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
  206. MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
  207. MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
  208. MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
  209. MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
  210. MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
  211. /* CSI */
  212. MX35_PAD_TX1__IPU_CSI_D_6,
  213. MX35_PAD_TX0__IPU_CSI_D_7,
  214. MX35_PAD_CSI_D8__IPU_CSI_D_8,
  215. MX35_PAD_CSI_D9__IPU_CSI_D_9,
  216. MX35_PAD_CSI_D10__IPU_CSI_D_10,
  217. MX35_PAD_CSI_D11__IPU_CSI_D_11,
  218. MX35_PAD_CSI_D12__IPU_CSI_D_12,
  219. MX35_PAD_CSI_D13__IPU_CSI_D_13,
  220. MX35_PAD_CSI_D14__IPU_CSI_D_14,
  221. MX35_PAD_CSI_D15__IPU_CSI_D_15,
  222. MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC,
  223. MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,
  224. MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,
  225. MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,
  226. /*PMIC IRQ*/
  227. MX35_PAD_GPIO2_0__GPIO2_0,
  228. };
  229. /*
  230. * Camera support
  231. */
  232. static phys_addr_t mx3_camera_base __initdata;
  233. #define MX35_3DS_CAMERA_BUF_SIZE SZ_8M
  234. static const struct mx3_camera_pdata mx35_3ds_camera_pdata __initconst = {
  235. .flags = MX3_CAMERA_DATAWIDTH_8,
  236. .mclk_10khz = 2000,
  237. };
  238. static int __init imx35_3ds_init_camera(void)
  239. {
  240. int dma, ret = -ENOMEM;
  241. struct platform_device *pdev =
  242. imx35_alloc_mx3_camera(&mx35_3ds_camera_pdata);
  243. if (IS_ERR(pdev))
  244. return PTR_ERR(pdev);
  245. if (!mx3_camera_base)
  246. goto err;
  247. dma = dma_declare_coherent_memory(&pdev->dev,
  248. mx3_camera_base, mx3_camera_base,
  249. MX35_3DS_CAMERA_BUF_SIZE,
  250. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  251. if (!(dma & DMA_MEMORY_MAP))
  252. goto err;
  253. ret = platform_device_add(pdev);
  254. if (ret)
  255. err:
  256. platform_device_put(pdev);
  257. return ret;
  258. }
  259. static struct i2c_board_info mx35_3ds_i2c_camera = {
  260. I2C_BOARD_INFO("ov2640", 0x30),
  261. };
  262. static struct soc_camera_link iclink_ov2640 = {
  263. .bus_id = 0,
  264. .board_info = &mx35_3ds_i2c_camera,
  265. .i2c_adapter_id = 0,
  266. .power = NULL,
  267. };
  268. static struct platform_device mx35_3ds_ov2640 = {
  269. .name = "soc-camera-pdrv",
  270. .id = 0,
  271. .dev = {
  272. .platform_data = &iclink_ov2640,
  273. },
  274. };
  275. static struct regulator_consumer_supply sw1_consumers[] = {
  276. {
  277. .supply = "cpu_vcc",
  278. }
  279. };
  280. static struct regulator_consumer_supply vcam_consumers[] = {
  281. /* sgtl5000 */
  282. REGULATOR_SUPPLY("VDDA", "0-000a"),
  283. };
  284. static struct regulator_consumer_supply vaudio_consumers[] = {
  285. REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),
  286. };
  287. static struct regulator_init_data sw1_init = {
  288. .constraints = {
  289. .name = "SW1",
  290. .min_uV = 600000,
  291. .max_uV = 1375000,
  292. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  293. .valid_modes_mask = 0,
  294. .always_on = 1,
  295. .boot_on = 1,
  296. },
  297. .num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
  298. .consumer_supplies = sw1_consumers,
  299. };
  300. static struct regulator_init_data sw2_init = {
  301. .constraints = {
  302. .name = "SW2",
  303. .always_on = 1,
  304. .boot_on = 1,
  305. }
  306. };
  307. static struct regulator_init_data sw3_init = {
  308. .constraints = {
  309. .name = "SW3",
  310. .always_on = 1,
  311. .boot_on = 1,
  312. }
  313. };
  314. static struct regulator_init_data sw4_init = {
  315. .constraints = {
  316. .name = "SW4",
  317. .always_on = 1,
  318. .boot_on = 1,
  319. }
  320. };
  321. static struct regulator_init_data viohi_init = {
  322. .constraints = {
  323. .name = "VIOHI",
  324. .boot_on = 1,
  325. }
  326. };
  327. static struct regulator_init_data vusb_init = {
  328. .constraints = {
  329. .name = "VUSB",
  330. .boot_on = 1,
  331. }
  332. };
  333. static struct regulator_init_data vdig_init = {
  334. .constraints = {
  335. .name = "VDIG",
  336. .boot_on = 1,
  337. }
  338. };
  339. static struct regulator_init_data vpll_init = {
  340. .constraints = {
  341. .name = "VPLL",
  342. .boot_on = 1,
  343. }
  344. };
  345. static struct regulator_init_data vusb2_init = {
  346. .constraints = {
  347. .name = "VUSB2",
  348. .boot_on = 1,
  349. }
  350. };
  351. static struct regulator_init_data vvideo_init = {
  352. .constraints = {
  353. .name = "VVIDEO",
  354. .boot_on = 1
  355. }
  356. };
  357. static struct regulator_init_data vaudio_init = {
  358. .constraints = {
  359. .name = "VAUDIO",
  360. .min_uV = 2300000,
  361. .max_uV = 3000000,
  362. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  363. .boot_on = 1
  364. },
  365. .num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),
  366. .consumer_supplies = vaudio_consumers,
  367. };
  368. static struct regulator_init_data vcam_init = {
  369. .constraints = {
  370. .name = "VCAM",
  371. .min_uV = 2500000,
  372. .max_uV = 3000000,
  373. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  374. REGULATOR_CHANGE_MODE,
  375. .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
  376. .boot_on = 1
  377. },
  378. .num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
  379. .consumer_supplies = vcam_consumers,
  380. };
  381. static struct regulator_init_data vgen1_init = {
  382. .constraints = {
  383. .name = "VGEN1",
  384. }
  385. };
  386. static struct regulator_init_data vgen2_init = {
  387. .constraints = {
  388. .name = "VGEN2",
  389. .boot_on = 1,
  390. }
  391. };
  392. static struct regulator_init_data vgen3_init = {
  393. .constraints = {
  394. .name = "VGEN3",
  395. }
  396. };
  397. static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
  398. { .id = MC13892_SW1, .init_data = &sw1_init },
  399. { .id = MC13892_SW2, .init_data = &sw2_init },
  400. { .id = MC13892_SW3, .init_data = &sw3_init },
  401. { .id = MC13892_SW4, .init_data = &sw4_init },
  402. { .id = MC13892_VIOHI, .init_data = &viohi_init },
  403. { .id = MC13892_VPLL, .init_data = &vpll_init },
  404. { .id = MC13892_VDIG, .init_data = &vdig_init },
  405. { .id = MC13892_VUSB2, .init_data = &vusb2_init },
  406. { .id = MC13892_VVIDEO, .init_data = &vvideo_init },
  407. { .id = MC13892_VAUDIO, .init_data = &vaudio_init },
  408. { .id = MC13892_VCAM, .init_data = &vcam_init },
  409. { .id = MC13892_VGEN1, .init_data = &vgen1_init },
  410. { .id = MC13892_VGEN2, .init_data = &vgen2_init },
  411. { .id = MC13892_VGEN3, .init_data = &vgen3_init },
  412. { .id = MC13892_VUSB, .init_data = &vusb_init },
  413. };
  414. static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
  415. .flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
  416. .regulators = {
  417. .num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
  418. .regulators = mx35_3ds_regulators,
  419. },
  420. };
  421. #define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
  422. static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
  423. I2C_BOARD_INFO("mc13892", 0x08),
  424. .platform_data = &mx35_3ds_mc13892_data,
  425. /* irq number is run-time assigned */
  426. };
  427. static void __init imx35_3ds_init_mc13892(void)
  428. {
  429. int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
  430. if (ret) {
  431. pr_err("failed to get pmic irq: %d\n", ret);
  432. return;
  433. }
  434. mx35_3ds_i2c_mc13892.irq = gpio_to_irq(GPIO_PMIC_INT);
  435. i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
  436. }
  437. static int mx35_3ds_otg_init(struct platform_device *pdev)
  438. {
  439. return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
  440. }
  441. /* OTG config */
  442. static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
  443. .operating_mode = FSL_USB2_DR_DEVICE,
  444. .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
  445. .workaround = FLS_USB2_WORKAROUND_ENGCM09152,
  446. /*
  447. * ENGCM09152 also requires a hardware change.
  448. * Please check the MX35 Chip Errata document for details.
  449. */
  450. };
  451. static struct mxc_usbh_platform_data otg_pdata __initdata = {
  452. .init = mx35_3ds_otg_init,
  453. .portsc = MXC_EHCI_MODE_UTMI,
  454. };
  455. static int mx35_3ds_usbh_init(struct platform_device *pdev)
  456. {
  457. return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
  458. MXC_EHCI_INTERNAL_PHY);
  459. }
  460. /* USB HOST config */
  461. static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
  462. .init = mx35_3ds_usbh_init,
  463. .portsc = MXC_EHCI_MODE_SERIAL,
  464. };
  465. static bool otg_mode_host __initdata;
  466. static int __init mx35_3ds_otg_mode(char *options)
  467. {
  468. if (!strcmp(options, "host"))
  469. otg_mode_host = true;
  470. else if (!strcmp(options, "device"))
  471. otg_mode_host = false;
  472. else
  473. pr_info("otg_mode neither \"host\" nor \"device\". "
  474. "Defaulting to device\n");
  475. return 1;
  476. }
  477. __setup("otg_mode=", mx35_3ds_otg_mode);
  478. static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
  479. .bitrate = 100000,
  480. };
  481. /*
  482. * Board specific initialization.
  483. */
  484. static void __init mx35_3ds_init(void)
  485. {
  486. imx35_soc_init();
  487. mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
  488. imx35_add_fec(NULL);
  489. imx35_add_imx2_wdt();
  490. imx35_add_mxc_rtc();
  491. platform_add_devices(devices, ARRAY_SIZE(devices));
  492. imx35_add_imx_uart0(&uart_pdata);
  493. if (otg_mode_host)
  494. imx35_add_mxc_ehci_otg(&otg_pdata);
  495. imx35_add_mxc_ehci_hs(&usb_host_pdata);
  496. if (!otg_mode_host)
  497. imx35_add_fsl_usb2_udc(&usb_otg_pdata);
  498. imx35_add_mxc_nand(&mx35pdk_nand_board_info);
  499. imx35_add_sdhci_esdhc_imx(0, NULL);
  500. imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);
  501. i2c_register_board_info(
  502. 0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));
  503. imx35_add_ipu_core();
  504. platform_device_register(&mx35_3ds_ov2640);
  505. imx35_3ds_init_camera();
  506. }
  507. static void __init mx35_3ds_late_init(void)
  508. {
  509. struct platform_device *imx35_fb_pdev;
  510. if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1)))
  511. pr_warn("Init of the debugboard failed, all "
  512. "devices on the debugboard are unusable.\n");
  513. imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
  514. mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
  515. platform_device_register(&mx35_3ds_lcd);
  516. imx35_3ds_init_mc13892();
  517. }
  518. static void __init mx35pdk_timer_init(void)
  519. {
  520. mx35_clocks_init();
  521. }
  522. static void __init mx35_3ds_reserve(void)
  523. {
  524. /* reserve MX35_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
  525. mx3_camera_base = arm_memblock_steal(MX35_3DS_CAMERA_BUF_SIZE,
  526. MX35_3DS_CAMERA_BUF_SIZE);
  527. }
  528. MACHINE_START(MX35_3DS, "Freescale MX35PDK")
  529. /* Maintainer: Freescale Semiconductor, Inc */
  530. .atag_offset = 0x100,
  531. .map_io = mx35_map_io,
  532. .init_early = imx35_init_early,
  533. .init_irq = mx35_init_irq,
  534. .init_time = mx35pdk_timer_init,
  535. .init_machine = mx35_3ds_init,
  536. .init_late = mx35_3ds_late_init,
  537. .reserve = mx35_3ds_reserve,
  538. .restart = mxc_restart,
  539. MACHINE_END