smp_tlb.c 6.3 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp_tlb.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/preempt.h>
  11. #include <linux/smp.h>
  12. #include <linux/uaccess.h>
  13. #include <asm/smp_plat.h>
  14. #include <asm/tlbflush.h>
  15. #include <asm/mmu_context.h>
  16. /**********************************************************************/
  17. /*
  18. * TLB operations
  19. */
  20. struct tlb_args {
  21. struct vm_area_struct *ta_vma;
  22. unsigned long ta_start;
  23. unsigned long ta_end;
  24. };
  25. static inline void ipi_flush_tlb_all(void *ignored)
  26. {
  27. local_flush_tlb_all();
  28. }
  29. static inline void ipi_flush_tlb_mm(void *arg)
  30. {
  31. struct mm_struct *mm = (struct mm_struct *)arg;
  32. local_flush_tlb_mm(mm);
  33. }
  34. static inline void ipi_flush_tlb_page(void *arg)
  35. {
  36. struct tlb_args *ta = (struct tlb_args *)arg;
  37. unsigned int __ua_flags = uaccess_save_and_enable();
  38. local_flush_tlb_page(ta->ta_vma, ta->ta_start);
  39. uaccess_restore(__ua_flags);
  40. }
  41. static inline void ipi_flush_tlb_kernel_page(void *arg)
  42. {
  43. struct tlb_args *ta = (struct tlb_args *)arg;
  44. local_flush_tlb_kernel_page(ta->ta_start);
  45. }
  46. static inline void ipi_flush_tlb_range(void *arg)
  47. {
  48. struct tlb_args *ta = (struct tlb_args *)arg;
  49. unsigned int __ua_flags = uaccess_save_and_enable();
  50. local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
  51. uaccess_restore(__ua_flags);
  52. }
  53. static inline void ipi_flush_tlb_kernel_range(void *arg)
  54. {
  55. struct tlb_args *ta = (struct tlb_args *)arg;
  56. local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
  57. }
  58. static inline void ipi_flush_bp_all(void *ignored)
  59. {
  60. local_flush_bp_all();
  61. }
  62. #ifdef CONFIG_ARM_ERRATA_798181
  63. bool (*erratum_a15_798181_handler)(void);
  64. static bool erratum_a15_798181_partial(void)
  65. {
  66. asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
  67. dsb(ish);
  68. return false;
  69. }
  70. static bool erratum_a15_798181_broadcast(void)
  71. {
  72. asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
  73. dsb(ish);
  74. return true;
  75. }
  76. void erratum_a15_798181_init(void)
  77. {
  78. unsigned int midr = read_cpuid_id();
  79. unsigned int revidr = read_cpuid(CPUID_REVIDR);
  80. /* Brahma-B15 r0p0..r0p2 affected
  81. * Cortex-A15 r0p0..r3p3 w/o ECO fix affected
  82. * Fixes applied to A15 with respect to the revision and revidr are:
  83. *
  84. * r0p0-r2p1: No fixes applied
  85. * r2p2,r2p3:
  86. * REVIDR[4]: 798181 Moving a virtual page that is being accessed
  87. * by an active process can lead to unexpected behavior
  88. * REVIDR[9]: Not defined
  89. * r2p4,r3p0,r3p1,r3p2:
  90. * REVIDR[4]: 798181 Moving a virtual page that is being accessed
  91. * by an active process can lead to unexpected behavior
  92. * REVIDR[9]: 798181 Moving a virtual page that is being accessed
  93. * by an active process can lead to unexpected behavior
  94. * - This is an update to a previously released ECO.
  95. * r3p3:
  96. * REVIDR[4]: Reserved
  97. * REVIDR[9]: 798181 Moving a virtual page that is being accessed
  98. * by an active process can lead to unexpected behavior
  99. * - This is an update to a previously released ECO.
  100. *
  101. * Handling:
  102. * REVIDR[9] set -> No WA
  103. * REVIDR[4] set, REVIDR[9] cleared -> Partial WA
  104. * Both cleared -> Full WA
  105. */
  106. if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) {
  107. erratum_a15_798181_handler = erratum_a15_798181_broadcast;
  108. } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) {
  109. erratum_a15_798181_handler = erratum_a15_798181_broadcast;
  110. } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) {
  111. if (revidr & 0x10)
  112. erratum_a15_798181_handler =
  113. erratum_a15_798181_partial;
  114. else
  115. erratum_a15_798181_handler =
  116. erratum_a15_798181_broadcast;
  117. } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) {
  118. if ((revidr & 0x210) == 0)
  119. erratum_a15_798181_handler =
  120. erratum_a15_798181_broadcast;
  121. else if (revidr & 0x10)
  122. erratum_a15_798181_handler =
  123. erratum_a15_798181_partial;
  124. } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) {
  125. if ((revidr & 0x200) == 0)
  126. erratum_a15_798181_handler =
  127. erratum_a15_798181_partial;
  128. }
  129. }
  130. #endif
  131. static void ipi_flush_tlb_a15_erratum(void *arg)
  132. {
  133. dmb();
  134. }
  135. static void broadcast_tlb_a15_erratum(void)
  136. {
  137. if (!erratum_a15_798181())
  138. return;
  139. smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
  140. }
  141. static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
  142. {
  143. int this_cpu;
  144. cpumask_t mask = { CPU_BITS_NONE };
  145. if (!erratum_a15_798181())
  146. return;
  147. this_cpu = get_cpu();
  148. a15_erratum_get_cpumask(this_cpu, mm, &mask);
  149. smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
  150. put_cpu();
  151. }
  152. void flush_tlb_all(void)
  153. {
  154. if (tlb_ops_need_broadcast())
  155. on_each_cpu(ipi_flush_tlb_all, NULL, 1);
  156. else
  157. __flush_tlb_all();
  158. broadcast_tlb_a15_erratum();
  159. }
  160. void flush_tlb_mm(struct mm_struct *mm)
  161. {
  162. if (tlb_ops_need_broadcast())
  163. on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
  164. else
  165. __flush_tlb_mm(mm);
  166. broadcast_tlb_mm_a15_erratum(mm);
  167. }
  168. void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
  169. {
  170. if (tlb_ops_need_broadcast()) {
  171. struct tlb_args ta;
  172. ta.ta_vma = vma;
  173. ta.ta_start = uaddr;
  174. on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
  175. &ta, 1);
  176. } else
  177. __flush_tlb_page(vma, uaddr);
  178. broadcast_tlb_mm_a15_erratum(vma->vm_mm);
  179. }
  180. void flush_tlb_kernel_page(unsigned long kaddr)
  181. {
  182. if (tlb_ops_need_broadcast()) {
  183. struct tlb_args ta;
  184. ta.ta_start = kaddr;
  185. on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
  186. } else
  187. __flush_tlb_kernel_page(kaddr);
  188. broadcast_tlb_a15_erratum();
  189. }
  190. void flush_tlb_range(struct vm_area_struct *vma,
  191. unsigned long start, unsigned long end)
  192. {
  193. if (tlb_ops_need_broadcast()) {
  194. struct tlb_args ta;
  195. ta.ta_vma = vma;
  196. ta.ta_start = start;
  197. ta.ta_end = end;
  198. on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
  199. &ta, 1);
  200. } else
  201. local_flush_tlb_range(vma, start, end);
  202. broadcast_tlb_mm_a15_erratum(vma->vm_mm);
  203. }
  204. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  205. {
  206. if (tlb_ops_need_broadcast()) {
  207. struct tlb_args ta;
  208. ta.ta_start = start;
  209. ta.ta_end = end;
  210. on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
  211. } else
  212. local_flush_tlb_kernel_range(start, end);
  213. broadcast_tlb_a15_erratum();
  214. }
  215. void flush_bp_all(void)
  216. {
  217. if (tlb_ops_need_broadcast())
  218. on_each_cpu(ipi_flush_bp_all, NULL, 1);
  219. else
  220. __flush_bp_all();
  221. }