iomd.h 4.3 KB

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  1. /*
  2. * arch/arm/include/asm/hardware/iomd.h
  3. *
  4. * Copyright (C) 1999 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This file contains information out the IOMD ASIC used in the
  11. * Acorn RiscPC and subsequently integrated into the CLPS7500 chips.
  12. */
  13. #ifndef __ASMARM_HARDWARE_IOMD_H
  14. #define __ASMARM_HARDWARE_IOMD_H
  15. #ifndef __ASSEMBLY__
  16. /*
  17. * We use __raw_base variants here so that we give the compiler the
  18. * chance to keep IOC_BASE in a register.
  19. */
  20. #define iomd_readb(off) __raw_readb(IOMD_BASE + (off))
  21. #define iomd_readl(off) __raw_readl(IOMD_BASE + (off))
  22. #define iomd_writeb(val,off) __raw_writeb(val, IOMD_BASE + (off))
  23. #define iomd_writel(val,off) __raw_writel(val, IOMD_BASE + (off))
  24. #endif
  25. #define IOMD_CONTROL (0x000)
  26. #define IOMD_KARTTX (0x004)
  27. #define IOMD_KARTRX (0x004)
  28. #define IOMD_KCTRL (0x008)
  29. #define IOMD_IRQSTATA (0x010)
  30. #define IOMD_IRQREQA (0x014)
  31. #define IOMD_IRQCLRA (0x014)
  32. #define IOMD_IRQMASKA (0x018)
  33. #define IOMD_IRQSTATB (0x020)
  34. #define IOMD_IRQREQB (0x024)
  35. #define IOMD_IRQMASKB (0x028)
  36. #define IOMD_FIQSTAT (0x030)
  37. #define IOMD_FIQREQ (0x034)
  38. #define IOMD_FIQMASK (0x038)
  39. #define IOMD_T0CNTL (0x040)
  40. #define IOMD_T0LTCHL (0x040)
  41. #define IOMD_T0CNTH (0x044)
  42. #define IOMD_T0LTCHH (0x044)
  43. #define IOMD_T0GO (0x048)
  44. #define IOMD_T0LATCH (0x04c)
  45. #define IOMD_T1CNTL (0x050)
  46. #define IOMD_T1LTCHL (0x050)
  47. #define IOMD_T1CNTH (0x054)
  48. #define IOMD_T1LTCHH (0x054)
  49. #define IOMD_T1GO (0x058)
  50. #define IOMD_T1LATCH (0x05c)
  51. #define IOMD_ROMCR0 (0x080)
  52. #define IOMD_ROMCR1 (0x084)
  53. #ifdef CONFIG_ARCH_RPC
  54. #define IOMD_DRAMCR (0x088)
  55. #endif
  56. #define IOMD_REFCR (0x08C)
  57. #define IOMD_FSIZE (0x090)
  58. #define IOMD_ID0 (0x094)
  59. #define IOMD_ID1 (0x098)
  60. #define IOMD_VERSION (0x09C)
  61. #ifdef CONFIG_ARCH_RPC
  62. #define IOMD_MOUSEX (0x0A0)
  63. #define IOMD_MOUSEY (0x0A4)
  64. #endif
  65. #ifdef CONFIG_ARCH_RPC
  66. #define IOMD_DMATCR (0x0C0)
  67. #endif
  68. #define IOMD_IOTCR (0x0C4)
  69. #define IOMD_ECTCR (0x0C8)
  70. #ifdef CONFIG_ARCH_RPC
  71. #define IOMD_DMAEXT (0x0CC)
  72. #endif
  73. #ifdef CONFIG_ARCH_RPC
  74. #define DMA_EXT_IO0 1
  75. #define DMA_EXT_IO1 2
  76. #define DMA_EXT_IO2 4
  77. #define DMA_EXT_IO3 8
  78. #define IOMD_IO0CURA (0x100)
  79. #define IOMD_IO0ENDA (0x104)
  80. #define IOMD_IO0CURB (0x108)
  81. #define IOMD_IO0ENDB (0x10C)
  82. #define IOMD_IO0CR (0x110)
  83. #define IOMD_IO0ST (0x114)
  84. #define IOMD_IO1CURA (0x120)
  85. #define IOMD_IO1ENDA (0x124)
  86. #define IOMD_IO1CURB (0x128)
  87. #define IOMD_IO1ENDB (0x12C)
  88. #define IOMD_IO1CR (0x130)
  89. #define IOMD_IO1ST (0x134)
  90. #define IOMD_IO2CURA (0x140)
  91. #define IOMD_IO2ENDA (0x144)
  92. #define IOMD_IO2CURB (0x148)
  93. #define IOMD_IO2ENDB (0x14C)
  94. #define IOMD_IO2CR (0x150)
  95. #define IOMD_IO2ST (0x154)
  96. #define IOMD_IO3CURA (0x160)
  97. #define IOMD_IO3ENDA (0x164)
  98. #define IOMD_IO3CURB (0x168)
  99. #define IOMD_IO3ENDB (0x16C)
  100. #define IOMD_IO3CR (0x170)
  101. #define IOMD_IO3ST (0x174)
  102. #endif
  103. #define IOMD_SD0CURA (0x180)
  104. #define IOMD_SD0ENDA (0x184)
  105. #define IOMD_SD0CURB (0x188)
  106. #define IOMD_SD0ENDB (0x18C)
  107. #define IOMD_SD0CR (0x190)
  108. #define IOMD_SD0ST (0x194)
  109. #ifdef CONFIG_ARCH_RPC
  110. #define IOMD_SD1CURA (0x1A0)
  111. #define IOMD_SD1ENDA (0x1A4)
  112. #define IOMD_SD1CURB (0x1A8)
  113. #define IOMD_SD1ENDB (0x1AC)
  114. #define IOMD_SD1CR (0x1B0)
  115. #define IOMD_SD1ST (0x1B4)
  116. #endif
  117. #define IOMD_CURSCUR (0x1C0)
  118. #define IOMD_CURSINIT (0x1C4)
  119. #define IOMD_VIDCUR (0x1D0)
  120. #define IOMD_VIDEND (0x1D4)
  121. #define IOMD_VIDSTART (0x1D8)
  122. #define IOMD_VIDINIT (0x1DC)
  123. #define IOMD_VIDCR (0x1E0)
  124. #define IOMD_DMASTAT (0x1F0)
  125. #define IOMD_DMAREQ (0x1F4)
  126. #define IOMD_DMAMASK (0x1F8)
  127. #define DMA_END_S (1 << 31)
  128. #define DMA_END_L (1 << 30)
  129. #define DMA_CR_C 0x80
  130. #define DMA_CR_D 0x40
  131. #define DMA_CR_E 0x20
  132. #define DMA_ST_OFL 4
  133. #define DMA_ST_INT 2
  134. #define DMA_ST_AB 1
  135. /*
  136. * DMA (MEMC) compatibility
  137. */
  138. #define HALF_SAM vram_half_sam
  139. #define VDMA_ALIGNMENT (HALF_SAM * 2)
  140. #define VDMA_XFERSIZE (HALF_SAM)
  141. #define VDMA_INIT IOMD_VIDINIT
  142. #define VDMA_START IOMD_VIDSTART
  143. #define VDMA_END IOMD_VIDEND
  144. #ifndef __ASSEMBLY__
  145. extern unsigned int vram_half_sam;
  146. #define video_set_dma(start,end,offset) \
  147. do { \
  148. outl (SCREEN_START + start, VDMA_START); \
  149. outl (SCREEN_START + end - VDMA_XFERSIZE, VDMA_END); \
  150. if (offset >= end - VDMA_XFERSIZE) \
  151. offset |= 0x40000000; \
  152. outl (SCREEN_START + offset, VDMA_INIT); \
  153. } while (0)
  154. #endif
  155. #endif