this_cpu_ops.txt 11 KB

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  1. this_cpu operations
  2. -------------------
  3. this_cpu operations are a way of optimizing access to per cpu
  4. variables associated with the *currently* executing processor. This is
  5. done through the use of segment registers (or a dedicated register where
  6. the cpu permanently stored the beginning of the per cpu area for a
  7. specific processor).
  8. this_cpu operations add a per cpu variable offset to the processor
  9. specific per cpu base and encode that operation in the instruction
  10. operating on the per cpu variable.
  11. This means that there are no atomicity issues between the calculation of
  12. the offset and the operation on the data. Therefore it is not
  13. necessary to disable preemption or interrupts to ensure that the
  14. processor is not changed between the calculation of the address and
  15. the operation on the data.
  16. Read-modify-write operations are of particular interest. Frequently
  17. processors have special lower latency instructions that can operate
  18. without the typical synchronization overhead, but still provide some
  19. sort of relaxed atomicity guarantees. The x86, for example, can execute
  20. RMW (Read Modify Write) instructions like inc/dec/cmpxchg without the
  21. lock prefix and the associated latency penalty.
  22. Access to the variable without the lock prefix is not synchronized but
  23. synchronization is not necessary since we are dealing with per cpu
  24. data specific to the currently executing processor. Only the current
  25. processor should be accessing that variable and therefore there are no
  26. concurrency issues with other processors in the system.
  27. Please note that accesses by remote processors to a per cpu area are
  28. exceptional situations and may impact performance and/or correctness
  29. (remote write operations) of local RMW operations via this_cpu_*.
  30. The main use of the this_cpu operations has been to optimize counter
  31. operations.
  32. The following this_cpu() operations with implied preemption protection
  33. are defined. These operations can be used without worrying about
  34. preemption and interrupts.
  35. this_cpu_read(pcp)
  36. this_cpu_write(pcp, val)
  37. this_cpu_add(pcp, val)
  38. this_cpu_and(pcp, val)
  39. this_cpu_or(pcp, val)
  40. this_cpu_add_return(pcp, val)
  41. this_cpu_xchg(pcp, nval)
  42. this_cpu_cmpxchg(pcp, oval, nval)
  43. this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
  44. this_cpu_sub(pcp, val)
  45. this_cpu_inc(pcp)
  46. this_cpu_dec(pcp)
  47. this_cpu_sub_return(pcp, val)
  48. this_cpu_inc_return(pcp)
  49. this_cpu_dec_return(pcp)
  50. Inner working of this_cpu operations
  51. ------------------------------------
  52. On x86 the fs: or the gs: segment registers contain the base of the
  53. per cpu area. It is then possible to simply use the segment override
  54. to relocate a per cpu relative address to the proper per cpu area for
  55. the processor. So the relocation to the per cpu base is encoded in the
  56. instruction via a segment register prefix.
  57. For example:
  58. DEFINE_PER_CPU(int, x);
  59. int z;
  60. z = this_cpu_read(x);
  61. results in a single instruction
  62. mov ax, gs:[x]
  63. instead of a sequence of calculation of the address and then a fetch
  64. from that address which occurs with the per cpu operations. Before
  65. this_cpu_ops such sequence also required preempt disable/enable to
  66. prevent the kernel from moving the thread to a different processor
  67. while the calculation is performed.
  68. Consider the following this_cpu operation:
  69. this_cpu_inc(x)
  70. The above results in the following single instruction (no lock prefix!)
  71. inc gs:[x]
  72. instead of the following operations required if there is no segment
  73. register:
  74. int *y;
  75. int cpu;
  76. cpu = get_cpu();
  77. y = per_cpu_ptr(&x, cpu);
  78. (*y)++;
  79. put_cpu();
  80. Note that these operations can only be used on per cpu data that is
  81. reserved for a specific processor. Without disabling preemption in the
  82. surrounding code this_cpu_inc() will only guarantee that one of the
  83. per cpu counters is correctly incremented. However, there is no
  84. guarantee that the OS will not move the process directly before or
  85. after the this_cpu instruction is executed. In general this means that
  86. the value of the individual counters for each processor are
  87. meaningless. The sum of all the per cpu counters is the only value
  88. that is of interest.
  89. Per cpu variables are used for performance reasons. Bouncing cache
  90. lines can be avoided if multiple processors concurrently go through
  91. the same code paths. Since each processor has its own per cpu
  92. variables no concurrent cache line updates take place. The price that
  93. has to be paid for this optimization is the need to add up the per cpu
  94. counters when the value of a counter is needed.
  95. Special operations:
  96. -------------------
  97. y = this_cpu_ptr(&x)
  98. Takes the offset of a per cpu variable (&x !) and returns the address
  99. of the per cpu variable that belongs to the currently executing
  100. processor. this_cpu_ptr avoids multiple steps that the common
  101. get_cpu/put_cpu sequence requires. No processor number is
  102. available. Instead, the offset of the local per cpu area is simply
  103. added to the per cpu offset.
  104. Note that this operation is usually used in a code segment when
  105. preemption has been disabled. The pointer is then used to
  106. access local per cpu data in a critical section. When preemption
  107. is re-enabled this pointer is usually no longer useful since it may
  108. no longer point to per cpu data of the current processor.
  109. Per cpu variables and offsets
  110. -----------------------------
  111. Per cpu variables have *offsets* to the beginning of the per cpu
  112. area. They do not have addresses although they look like that in the
  113. code. Offsets cannot be directly dereferenced. The offset must be
  114. added to a base pointer of a per cpu area of a processor in order to
  115. form a valid address.
  116. Therefore the use of x or &x outside of the context of per cpu
  117. operations is invalid and will generally be treated like a NULL
  118. pointer dereference.
  119. DEFINE_PER_CPU(int, x);
  120. In the context of per cpu operations the above implies that x is a per
  121. cpu variable. Most this_cpu operations take a cpu variable.
  122. int __percpu *p = &x;
  123. &x and hence p is the *offset* of a per cpu variable. this_cpu_ptr()
  124. takes the offset of a per cpu variable which makes this look a bit
  125. strange.
  126. Operations on a field of a per cpu structure
  127. --------------------------------------------
  128. Let's say we have a percpu structure
  129. struct s {
  130. int n,m;
  131. };
  132. DEFINE_PER_CPU(struct s, p);
  133. Operations on these fields are straightforward
  134. this_cpu_inc(p.m)
  135. z = this_cpu_cmpxchg(p.m, 0, 1);
  136. If we have an offset to struct s:
  137. struct s __percpu *ps = &p;
  138. this_cpu_dec(ps->m);
  139. z = this_cpu_inc_return(ps->n);
  140. The calculation of the pointer may require the use of this_cpu_ptr()
  141. if we do not make use of this_cpu ops later to manipulate fields:
  142. struct s *pp;
  143. pp = this_cpu_ptr(&p);
  144. pp->m--;
  145. z = pp->n++;
  146. Variants of this_cpu ops
  147. -------------------------
  148. this_cpu ops are interrupt safe. Some architectures do not support
  149. these per cpu local operations. In that case the operation must be
  150. replaced by code that disables interrupts, then does the operations
  151. that are guaranteed to be atomic and then re-enable interrupts. Doing
  152. so is expensive. If there are other reasons why the scheduler cannot
  153. change the processor we are executing on then there is no reason to
  154. disable interrupts. For that purpose the following __this_cpu operations
  155. are provided.
  156. These operations have no guarantee against concurrent interrupts or
  157. preemption. If a per cpu variable is not used in an interrupt context
  158. and the scheduler cannot preempt, then they are safe. If any interrupts
  159. still occur while an operation is in progress and if the interrupt too
  160. modifies the variable, then RMW actions can not be guaranteed to be
  161. safe.
  162. __this_cpu_read(pcp)
  163. __this_cpu_write(pcp, val)
  164. __this_cpu_add(pcp, val)
  165. __this_cpu_and(pcp, val)
  166. __this_cpu_or(pcp, val)
  167. __this_cpu_add_return(pcp, val)
  168. __this_cpu_xchg(pcp, nval)
  169. __this_cpu_cmpxchg(pcp, oval, nval)
  170. __this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
  171. __this_cpu_sub(pcp, val)
  172. __this_cpu_inc(pcp)
  173. __this_cpu_dec(pcp)
  174. __this_cpu_sub_return(pcp, val)
  175. __this_cpu_inc_return(pcp)
  176. __this_cpu_dec_return(pcp)
  177. Will increment x and will not fall-back to code that disables
  178. interrupts on platforms that cannot accomplish atomicity through
  179. address relocation and a Read-Modify-Write operation in the same
  180. instruction.
  181. &this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)
  182. --------------------------------------------
  183. The first operation takes the offset and forms an address and then
  184. adds the offset of the n field. This may result in two add
  185. instructions emitted by the compiler.
  186. The second one first adds the two offsets and then does the
  187. relocation. IMHO the second form looks cleaner and has an easier time
  188. with (). The second form also is consistent with the way
  189. this_cpu_read() and friends are used.
  190. Remote access to per cpu data
  191. ------------------------------
  192. Per cpu data structures are designed to be used by one cpu exclusively.
  193. If you use the variables as intended, this_cpu_ops() are guaranteed to
  194. be "atomic" as no other CPU has access to these data structures.
  195. There are special cases where you might need to access per cpu data
  196. structures remotely. It is usually safe to do a remote read access
  197. and that is frequently done to summarize counters. Remote write access
  198. something which could be problematic because this_cpu ops do not
  199. have lock semantics. A remote write may interfere with a this_cpu
  200. RMW operation.
  201. Remote write accesses to percpu data structures are highly discouraged
  202. unless absolutely necessary. Please consider using an IPI to wake up
  203. the remote CPU and perform the update to its per cpu area.
  204. To access per-cpu data structure remotely, typically the per_cpu_ptr()
  205. function is used:
  206. DEFINE_PER_CPU(struct data, datap);
  207. struct data *p = per_cpu_ptr(&datap, cpu);
  208. This makes it explicit that we are getting ready to access a percpu
  209. area remotely.
  210. You can also do the following to convert the datap offset to an address
  211. struct data *p = this_cpu_ptr(&datap);
  212. but, passing of pointers calculated via this_cpu_ptr to other cpus is
  213. unusual and should be avoided.
  214. Remote access are typically only for reading the status of another cpus
  215. per cpu data. Write accesses can cause unique problems due to the
  216. relaxed synchronization requirements for this_cpu operations.
  217. One example that illustrates some concerns with write operations is
  218. the following scenario that occurs because two per cpu variables
  219. share a cache-line but the relaxed synchronization is applied to
  220. only one process updating the cache-line.
  221. Consider the following example
  222. struct test {
  223. atomic_t a;
  224. int b;
  225. };
  226. DEFINE_PER_CPU(struct test, onecacheline);
  227. There is some concern about what would happen if the field 'a' is updated
  228. remotely from one processor and the local processor would use this_cpu ops
  229. to update field b. Care should be taken that such simultaneous accesses to
  230. data within the same cache line are avoided. Also costly synchronization
  231. may be necessary. IPIs are generally recommended in such scenarios instead
  232. of a remote write to the per cpu area of another processor.
  233. Even in cases where the remote writes are rare, please bear in
  234. mind that a remote write will evict the cache line from the processor
  235. that most likely will access it. If the processor wakes up and finds a
  236. missing local cache line of a per cpu area, its performance and hence
  237. the wake up times will be affected.
  238. Christoph Lameter, August 4th, 2014
  239. Pranith Kumar, Aug 2nd, 2014